|
|
|
ALTERA
|
Part No. |
EP20K100EQ EP20K100QC EP20K100EQC240-2
|
OCR Text |
...ap terminated (CTT) GTL+ LVCMOS lvttl True-LVDS and LVPECL data pins (in EP20K300E and larger devices) LVDS and LVPECL clock pins (in all BGA and FineLine BGA devices) LVDS and LVPECL data pins up to 156 Mbps (in -1 speed grade devices) HST... |
Description |
Apex 20KE Device Family (1.8V, LVDS Apex 20K Device Family (2.5V)
|
File Size |
585.74K /
116 Page |
View
it Online |
Download Datasheet |
|
|
|
ICS
|
Part No. |
ICS843404
|
OCR Text |
... oscillator interface or LVCMOS/lvttl single-ended reference clock input * 4 independently selectable output frequency on each bank: 318.7MHz, 212.5MHz, 159.375MHz and 106.25MHz * Maximum output frequency: 318.75MHz * Crystal input frequenc... |
Description |
Low phase noise, Fibre Channel LVPECL/LVDS Clock Generator
|
File Size |
235.12K /
16 Page |
View
it Online |
Download Datasheet |
|
|
|
ICS
|
Part No. |
ICS9DB206
|
OCR Text |
...cts PLL Bandwidth input. LVCMOS/lvttl interface levels.
TABLE 1. PIN DESCRIPTIONS
Number 1 2 3 4 5, 6 7, 13, 16, 22 8, 21 9, 10 11, 12 14, 15 17, 18 19, 20 23, 24 25 26 27 28 Name PLL_BW CLK nCLK FS0 PCIEXT0, PCIEXC0 VDD GND PCIEXT1, PC... |
Description |
High Performance 1-to-6 HCSL Jitter Attenuator for PCI Express?
|
File Size |
237.04K /
13 Page |
View
it Online |
Download Datasheet |
|
|
|
MAXIM - Dallas Semiconductor MAXIM[Maxim Integrated Products]
|
Part No. |
MAX9122 MAX9121 MAX9122EUE MAX9121ESE MAX9121EUE MAX9122ESE
|
OCR Text |
...nterconnect Clock Distribution
lvttl/LVCMOS DATA INPUT TX 107 RX
lvttl/LVCMOS DATA OUTPUT
TX
107
RX
TX
107
RX
MAX9123
MAX9122
100 SHIELDED TWISTED CABLE OR MICROSTRIP PC BOARD TRACES
_______________________... |
Description |
Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout
|
File Size |
228.78K /
12 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|