| |
|
 |
List of Unclassifed Manufacturers
ETC[ETC]
Electronic Theatre Controls, Inc.
QuickLogic Corp.
|
| Part No. |
QL2009 QL2009-0PB256C QL2009-0PB256I QL2009-0PF144C QL2009-0PF144I QL2009-0PQ208C QL2009-0PQ208I QL2009-1PB256C QL2009-1PB256I QL2009-1PF144C QL2009-1PF144I QL2009-1PQ208C QL2009-1PQ208I QL2009-2PB256C QL2009-2PB256I QL2009-2PF144C QL2009-2PF144I QL2009-2PQ208C QL2009-2PQ208I QL2009-XPB256C QL2009-XPB256I QL2009-XPF144C QL2009-XPF144I QL2009-XPQ208C QL2009-XPQ208I QUICKLOGICCORP.-QL2009
|
| OCR Text |
...igners who use Cadence, Mentor, synopsys, Viewlogic, Veribest, or other third-party tools for design entry, synthesis, or simulation. FEATURES
Total of 225 I/O Pins
- 217 bidirectional input/output pins, PCI-compliant at 5.0V in -1/-2 s... |
| Description |
3.3V and 5.0V pASIC 2 FPGA combining speed, density, low cost and flexibility.
3.3V and 5.0V pASIC? 2 FPGA Combining Speed Density Low Cost and Flexibility
3.3V and 5.0V pASICò 2 FPGA
3.3V and 5.0V pASIC? 2 FPGA Combining Speed, Density, Low Cost and Flexibility
3.3V and 5.0V pASIC 2 FPGA Combining Speed/ Density/ Low Cost and Flexibility
3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility(高速，高可用密度，低成本、可适应性强.3V.0V pASIC 2系列场可编程逻辑器件)
PT 6C 6#20 PIN RECP
PT 8C 8#20 PIN RECP
3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility 3.3V.0V帕希奇？ 2 FPGA的结合速度，密度，低成本和灵活
|
| File Size |
271.17K /
12 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
ALTERA[Altera Corporation]
|
| Part No. |
EPM3128ATC EPM3256ATC EPM3032ATC EPM3064A EPM3128A EPM3256A EPM3032ATC44-10 EPM3128ATC144 EPM3256ATC144-7 EPM306B4A MAX3000A EPM3512A
|
| OCR Text |
... Logic, Mentor Graphics, OrCAD, synopsys, Synplicity, and VeriBest Programming support with the Altera master programming unit (MPU), MasterBlasterTM communications cable, ByteBlasterMVTM parallel port download cable, BitBlasterTM serial do... |
| Description |
Programmable Logic , 64 Macrocells, 4 Logic Array Blocks, 66 I/o Pins, 10ns
Programmable Logic Device Family
Programmable Logic , 128 Macrocells, 8 Logic Array Blocks, 96 I/o Pins, 10ns
|
| File Size |
323.20K /
42 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
