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  mask-programmable Datasheet PDF File

For mask-programmable Found Datasheets File :: 9835    Search Time::1.937ms    
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    MB81ES123245-10

Fujitsu Media Devices Limited
Part No. MB81ES123245-10
OCR Text ... * Output enable and input data mask * Self burn-in function for TEST * Built In Self Test (BIST) function for TEST 2 MB81ES123245-10 ...PROGRAMMABLE PAGE LENGTH FUNCTION The programmable page length function provides lower operation cu...
Description 128 M-BIT (4-BANK 】 1 M-WORD 】 32-BIT) SINGLE DATA RATE I/F FCRAM Consumer/Embedded Application Specific Memory for SiP

File Size 185.43K  /  42 Page

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    H5TQ4G83AMR H5TQ4G43AMR

Hynix Semiconductor
Part No. H5TQ4G83AMR H5TQ4G43AMR
OCR Text ... (dmu), (dml) input input data mask: dm is an input mask signal for write data. input data is masked when dm is sampled high coincident with that inpu t data during a write access. dm is sampled on both edges of dqs. for x8 device, the ...
Description 4Gb DDR3 SDRAM

File Size 271.59K  /  30 Page

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    WED48S8030E

White Electronic Designs Corporation
Part No. WED48S8030E
OCR Text ... Read and Single Write DATA Mask Control Auto Refresh (CBR) and Self Refresh *4096 refresh cycles across 64ms Automatic and Controlled Precharge Commands Suspend Mode and Power Down Mode Industrial Temperature Range FIG. 1 ...
Description 2M x 8 Bits x 4 Banks Synchronous DRAM

File Size 1,133.21K  /  26 Page

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    HYB18L128160BC-7.5 HYE18L128160BC-7.5 HYB18L128160BF HYB18L128160BF-7.5 HYE18L128160BF-7.5

Qimonda AG
Part No. HYB18L128160BC-7.5 HYE18L128160BC-7.5 HYB18L128160BF HYB18L128160BF-7.5 HYE18L128160BF-7.5
OCR Text ...ta Output Reg. 16 IO Gating DQM Mask Logic 16 Data Input Reg. 2 LDQM UDQM A0-A11 BA0,BA1 14 12 R efre sh C oun ter 2 2 ...programmable. The burst length determines the maximum number of column locations that can be accesse...
Description DRAMs for Mobile Applications 128-Mbit Mobile-RAM

File Size 1,430.43K  /  55 Page

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    H5TQ4G83AMR-XXC

Hynix Semiconductor
Part No. H5TQ4G83AMR-XXC
OCR Text ... (dmu), (dml) input input data mask: dm is an input mask signal for write data. input data is masked when dm is sampled high coincident with that inpu t data during a write access. dm is sampled on both edges of dqs. for x8 device, the ...
Description 4Gb DDR3 SDRAM

File Size 317.27K  /  30 Page

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    Fujitsu Media Devices
Part No. MB90473
OCR Text ...in rom flash versions : 256 kb, mask rom versions : 128 kb/256 kb ? built - in ram 10 kb/16 kb ? general purpose ports 84 ports maximum (in...programmable up to 8 channels) continuous conversion mode (converts selected channels continuously)...
Description (MB90F4xx) 16-Bit Proprietary Microcontroller

File Size 707.33K  /  118 Page

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    T4312816B T4312816B-6SG T4312816B-7S T4312816B-7SG

Taiwan Memory Technology
Part No. T4312816B T4312816B-6SG T4312816B-7S T4312816B-7SG
OCR Text ...ommand. Input Data Input/Output Mask: Controls output buffers in read mode and masks Input data in write mode. Input / Output Data I/O: The DQ0-15 input and output data are synchronized with the positive edges of CLK. The I/Os are maskable ...
Description 8M x 16 SDRAM 2M x 16bit x 4Banks Synchronous DRAM

File Size 683.40K  /  70 Page

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    Mosel Vitelic, Corp.
Part No. V58C265804S
OCR Text ...quency up to 166 mhz n data mask for write control (dm) n four banks controlled by ba0 & ba1 n programmable cas latency: 2, 2.5, 3 n programmable wrap sequence: sequential or interleave n programmable burst length: 2, ...
Description HIGH PERFORMANCE 2.5 VOLT 8M X 8 DDR SDRAM 4 BANKS X 2Mbit X 8 高性能2.5米8 DDR SDRAM银行X 2Mbit的8

File Size 463.97K  /  44 Page

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    Integrated Circuit Solution
Part No. IC43R16800
OCR Text ...m frequency up to 200 MHz Data Mask for Write Control Four Banks controlled by BA0 & BA1 Programmable CAS Latency: 2, 2.5, 3 Programmable Wrap Sequence: Sequential or Interleave Programmable Burst Length: 2, 4, 8 for Sequential Type 2,...
Description 2M x 16bit x 4 Banks DDR SDRAM

File Size 1,222.71K  /  56 Page

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