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For latched Found Datasheets File :: 16896    Search Time::1.172ms    
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    Allegro
Part No. 5910
OCR Text latched DRIVERS OUT 8 OUT 7 OUT 6 CLOCK LOGIC GROUND LOGIC SUPPLY STROBE POWER GROUND OUT 5 OUT 4 1 2 3 LATCHES 4 5 SUB 20 19 VBB 18 CLK REGISTER REGISTER VDD ST LATCHES BLNK 15 VBB 14 13 12 11 17 16 OUT 9 OUT 10 LOAD SUPPLY (6-10) ...
Description HIGH-VOLTAGE BiMOS III 10-BIT SERIAL-INPUT,latched DRIVERS
From old datasheet system

File Size 138.32K  /  8 Page

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    W149

SpectraLinear Inc
Part No. W149
OCR Text ...0:12 13 Notes: 1. Mode input latched at power-up. 2. Internal pull up resistors(*) should not be relied upon for setting I/O pins HIGH. Pin function with parentheses determined by MODE pin resistor strapping. Rev 1.0, November 21, 200...
Description 440BX AGPset Spread Spectrum Frequency Synthesizer

File Size 198.79K  /  15 Page

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    SILICON STORAGE TECHNOLOGY INC
Part No. SST34HF3242C-70-4E-L1PE
OCR Text ...st: 128 bits ? user: 256 bits  latched address and data  fast erase and program (typical): ? sector-erase time: 18 ms ? block-erase time: 18 ms ? chip-erase time: 35 ms ? program time: 7 s  automatic write timing ? internal v pp genera...
Description SPECIALTY MEMORY CIRCUIT, PBGA56

File Size 504.74K  /  40 Page

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    SST26VF016 SST26VF032 SST26VF01613

Silicon Storage Technology, Inc
Silicon Storage Technol...
Part No. SST26VF016 SST26VF032 SST26VF01613
OCR Text ...s, addresses, or input data are latched on the rising edge of the clock input, while output data is shifted out on the falling edge of the clock input. sio[3:0] serial data input/output to transfer commands, addresses, or data serially into...
Description Serial Quad I/O SQI Flash Memory

File Size 382.65K  /  39 Page

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    ICS4320A01L ICS84320A01N

Integrated Device Technology
Part No. ICS4320A01L ICS84320A01N
OCR Text ... the nP_LOAD input, the data is latched and the M divider remains loaded until the next LOW transition on nP_LOAD or until a serial event occurs. As a result, the M and N bits can be hardwired to set the M divider and N output divider to a ...
Description 780MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER

File Size 315.48K  /  21 Page

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    A6278EA-T A6278ELPTR-T A6279ELPTR-T A6279EETTR-T A6278ELWTR-T A6279ELWTR-T A6278ELP-T A6278ELW-T A6279EA-T A627807

Allegro MicroSystems
Part No. A6278EA-T A6278ELPTR-T A6279ELPTR-T A6279EETTR-T A6278ELWTR-T A6279ELWTR-T A6278ELP-T A6278ELW-T A6279EA-T A627807
OCR Text latched LED Drivers with Open LED Detection Features and Benefits 3.0 to 5.5 V logic supply range Schmitt trigger inputs for improved noise immunity Power-On Reset (POR) Up to 90 mA constant-current sinking outputs LED open circu...
Description Serial-Input Constant-Current latched LED Drivers with Open LED Detection

File Size 650.01K  /  18 Page

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    CAT28C513PI-12T CAT28C513PI-15T CAT28C512TI12T CAT28C513TI12T CAT28C513NA-12T CAT28C513NA-15T CAT28C513NA12T CAT28C513NA

http://
Catalyst Semiconductor
NXP Semiconductors N.V.
Atmel, Corp.
Part No. CAT28C513PI-12T CAT28C513PI-15T CAT28C512TI12T CAT28C513TI12T CAT28C513NA-12T CAT28C513NA-15T CAT28C513NA12T CAT28C513NA15T CAT28C513NI-12T CAT28C513NI-15T CAT28C513NI12T CAT28C512NI12T CAT28C512NI15T CAT28C513NI15T CAT28C512NA12T CAT28C512NA15T CAT28C512PI12T CAT28C512PI15T CAT28C512PA12T CAT28C512PA15T CAT28C513TA-12T CAT28C512TI15T CAT28C513TI15T CAT28C513TA-15T CAT28C51201 CAT28C512T14A15T CAT28C513T14A15T CAT28C513PA-12T CAT28C513PA-15T CAT28C513PA12T CAT28C513PA15T CAT28C512 CAT28C513TI-12T CAT28C513TI-15T CAT28C512NI-12T CAT28C512TI-12T CAT28C512TI-15T CAT28C513T14A-12T CAT28C513T14A-15T CAT28C513T14A12T CAT28C513T14I-12T CAT28C513T14I-15T CAT28C513T14I12T CAT28C513T14I15T CAT28C512T14I-12T CAT28C512NI-15T CAT28C512T14I-15T CAT28C512P-15 CAT28C512P-12 CAT28C512T14A-15T CAT28C512T-12T CAT28C512T14-12T CAT28C512T14A-12T CAT28C512TA-12T CAT28C513N-12T CAT28C512N-12T CAT28C512N-15T
OCR Text ...E, with the address input being latched on the falling edge of WE or CE, whichever occurs last. Data, conversely, is latched on the rising edge of WE or CE, whichever occurs first. Once initiated, a byte write cycle automatically erases the...
Description 512K-Bit CMOS PARALLEL EEPROM
128Kx8 EEPROM 128Kx8 EEPROM

File Size 77.69K  /  11 Page

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    Micron Technology, Inc.
Part No. MT4LDT464HX
OCR Text ...ress bits. the row ad- dress is latched by the ras# signal, then the column address is latched by the cas# signal. read and write cycles are selected with the we# input. a logic high on we# dictates read mode, while a logic low on we# dicta...
Description SMALL-OUTLINE DRAM MODULE

File Size 618.85K  /  32 Page

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    ICE3GS03LJG

Infineon Technologies AG
Part No. ICE3GS03LJG
OCR Text ... integrated 500v startup cell ( latched and frequency jitter mode ) pg-dso-8 description the ice3gs03ljg is the 130khz version of the ice3as03ljg which is the latest version of the f3 controller for lowest standby power and low emi features...
Description Of f-Line SMPS Current Mode Controller wi th integrated 500V Startup Cell

File Size 511.35K  /  25 Page

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    HYMD564646AXX

Hynix Semiconductor
Part No. HYMD564646AXX
OCR Text ...ddresses and control inputs are latched on the rising edges of the clock, data, data st robes and write data masks inputs are sampled on both ris- ing and falling edges of it. the data paths are internally pipelined and 2-bit prefetched to ...
Description Unbuffered DDR SDRAM DIMM

File Size 258.99K  /  16 Page

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