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  intrinsic Datasheet PDF File

For intrinsic Found Datasheets File :: 6257    Search Time::2.11ms    
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    ICS1523

Integrated Circuit Systems
Part No. ICS1523
OCR Text ...cs. (pg 18) Changed VCO Output, intrinsic Jitter graph to show slow and fast cases (pg 19) Timing diagram changes to reference t0 to REF and notes on test conditions added (pg 22) Lock Renamed Lock/Ref (Throughout). General cleanup for read...
Description High-Performance Programmable Line-Locked Clock Generator

File Size 941.24K  /  27 Page

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    Zarlink
Part No. MT9041B
OCR Text ...ter tolerance, jitter transfer, intrinsic jitter, frequency accuracy, capture range and phase change slope requirements for these specifications. Applications * * Synchronization and timing control for multitrunk T1 and E1 systems ST-BU...
Description T1/E1 System Synchronizer

File Size 512.83K  /  21 Page

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    ZL30105 ZL30105QDG

Zarlink Semiconductor Inc
Part No. ZL30105 ZL30105QDG
OCR Text ...Hz or 922 Hz Less than 20 psrms intrinsic jitter on the 19.44 MHz output clock, compliant with GR-253-CORE OC-3 and G.813 STM-1 specifications OSCi OSCo TIE_CLR June 2004 Ordering Information ZL30105QDG 64 pin TQFP * * * * -40C t...
Description T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110
Stratum 3 Redundant System Clock Synchronizer for T1/E1/SDH, Advanced TCATM and H.110

File Size 425.74K  /  50 Page

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    zarlink
Part No. ZL30106
OCR Text ...Hz or 922 Hz Less than 20 psrms intrinsic jitter on the 19.44 MHz output clock, compliant with GR-253CORE OC-3 and G.813 STM-1 specifications Less than 0.6 nspp intrinsic jitter on all PDH output clocks and frame pulses Selectable external ...
Description SONET/SDH/PDH Network Interface DPLL

File Size 395.38K  /  46 Page

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    ZL30109 ZL30109QDG

ZARLINK[Zarlink Semiconductor Inc]
Part No. ZL30109 ZL30109QDG
OCR Text ...-40C to +85C Less than 24 psrms intrinsic jitter on the 19.44 MHz output clock, compliant with OC-3 and STM-1 jitter specifications Less than 0.6 nspp intrinsic jitter on all output clocks External master clock source: clock oscillator or c...
Description DS1/E1 system synchronizer with 19.44 MHz output.

File Size 272.84K  /  36 Page

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    IXFR32N80Q3

IXYS Corporation
Part No. IXFR32N80Q3
OCR Text ...n-channel enhancement mode fast intrinsic rectifier avalanche rated features ? silicon chip on direct-copper bond (dcb) substrate ? isolated mounting surface ? low intrinsic gate resistance ? 2500v~ electrical isolation ? fast intrinsic rec...
Description HiperFET Power MOSFET Q3-Class

File Size 138.56K  /  5 Page

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    Allegro MicroSystems, Inc.
ALLEGRO[Allegro MicroSystems]
Part No. A8925 A8925CEB 8925
OCR Text ...(on) for low power dissipation. intrinsic ground clamp and flyback diodes protect the output drivers when switching inductive loads. Thermal shutdown circuitry is provided to protect the device from excessive junction temperature. A transco...
Description 3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER WITH LINEAR CURRENT CONTROL AND POWER DMOS OUTPUTS

File Size 85.49K  /  8 Page

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    IXFR32N100P

IXYS Corporation
Part No. IXFR32N100P
OCR Text ...ement mode avalanche rated fast intrinsic diode symbol test conditions maximum ratings v dss t j = 25 c to 150 c 1000 v v dgr t j = 25 c to 150 c, r gs = 1m 1000 v v gss continuous 30 v v gsm transient 40 v i d25 t c = 25 c18a i ...
Description Polar Power MOSFET HiPerFET

File Size 103.27K  /  4 Page

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    L6204 L620403 L6204D013TR

ST Microelectronics
STMicroelectronics
Part No. L6204 L620403 L6204D013TR
OCR Text ...conduction, the presence of the intrinsic diodes in the POWER DMOS structure causes the generation of current spikes on the sensing terminals. This is due to charge-discharge phenomena in the capacitors C1 & C2 associated with the drain sou...
Description DMOS DUAL FULL BRIDGE DRIVER

File Size 664.36K  /  12 Page

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