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IDT
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| Part No. |
IDT72T55268 IDT72T55258
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| OCR Text |
...read port(s) All I/O are LVTTL/ hstl/ ehstl user selectable 3.3V tolerant inputs in LVTTL mode ERCLK and EREN Echo outputs on all read ports Write Chip Select WCS input for each write port Read Chip Select RCS input for each read port User ... |
| Description |
2.5V QUADMUX DDR FLOW-CONTROL DEVICE
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| File Size |
518.72K /
63 Page |
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Cypress
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| Part No. |
CY7C1303BV25-167BZC
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| OCR Text |
...s 2.5 v core power supply with hstl inputs and outputs available in 165-ball fbga package (13 15 1.4 mm) variable drive hstl output buffers expanded hstl output voltage (1.4 v to 1.9 v) jtag interface variable impedance hstl configu... |
| Description |
18-Mbit Burst of Two-Pipelined SRAM with QDRArchitecture
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| File Size |
447.49K /
26 Page |
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Cypress
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| Part No. |
CY7C1302DV25-167BZC
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| OCR Text |
...s 2.5 v core power supply with hstl inputs and outputs available in 165-ball fbga package (13 15 1.4 mm) variable drive hstl output buffers expanded hstl output voltage (1.4 v?1.9 v) jtag interface configurations cy7c1302dv25 ? 512 k... |
| Description |
9-Mbit Burst of Two Pipelined SRAMs with QDRArchitecture
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| File Size |
519.22K /
25 Page |
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it Online |
Download Datasheet |
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MICREL
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| Part No. |
SY100EP15V
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| OCR Text |
... Input accepts PECL/LVPECL/ECL/hstl logic levels Available in a 16-pin TSSOP package
ECL ProTM
DESCRIPTION
The SY100EP15V is a high-speed, low-skew, PECL/ECL 1:4 precision fanout buffer with a 2:1 mux front end in a small 16-pin TS... |
| Description |
3.3V / 5V 2.5GHz PECL/ECL 1:4 FANOUT BUFFER WITH 2:1 INPUT MUX
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| File Size |
97.57K /
9 Page |
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IDT[Integrated Device Technology]
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| Part No. |
IDT5T93GL0 IDT5T93GL06NLI IDT5T93GL06 IDT5T93GL06NLI8
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| OCR Text |
...erant inputs 3.3V / 2.5V LVTTL, hstl, ehstl, LVEPECL (2.5V), LVPECL (3.3V), CML, or LVDS input interface Selectable differential inputs to six LVDS outputs Power-down mode 2.5V VDD Available in VFQFPN package
APPLICATIONS:
* Clock distr... |
| Description |
2.5V LVDS 1:6 Glitchless Clock Buffer TeraBuffer II
2.5V LVDS 1:6 GLITCHLESS CLOCK BUFFER TERABUFFER-TM II
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| File Size |
105.00K /
15 Page |
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IDT
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| Part No. |
IDT71P71104 IDT71P71204
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| OCR Text |
...pansion through control logic u hstl (1.5v) inputs that can be scaled to receive signals from 1.4v to 1.9v. u scalable output drivers - can drive hstl, 1.8v ttl or any voltage level from 1.4v to 1.9v. - output impedance adjustable from 35 o... |
| Description |
(IDT71P71x04) 18Mb Pipelined DDRII SRAM Burst of 2
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| File Size |
371.53K /
24 Page |
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Maxim Integrated Products, Inc.
MAXIM - Dallas Semiconductor
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| Part No. |
MAX9320A MAX9320 MAX9320EUAT
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| OCR Text |
hstl Clock and Data Drivers
General Description
The MAX9320/MAX9320A are low-skew, 1-to-2 differential drivers designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be ad... |
| Description |
1:2 Differential LVPECL/LVECL/hstl Clock and Data Drivers LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
1:2 Differential LVPECL/ LVECL/hstl Clock and Data Drivers
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| File Size |
165.41K /
9 Page |
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Potato Semiconductor Co...
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| Part No. |
PO100hstl50A
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| OCR Text |
... propagation delay and 1.65ghz hstl output frequency with less than 1.4ns propagation delay. the po 10 0hs tl5 0 a is a low-skew, the small outline 16 pin package and the low skew design to make it ideal for applications which require ... |
| Description |
High Frequency Noise Canncellation Translator
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| File Size |
1,576.37K /
7 Page |
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it Online |
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Price and Availability
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