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Zarlink Semiconductor
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| Part No. |
CLA70000
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| OCR Text |
...
Features
* * * * Low power channelless arrays from 5,000 to 250,000 available gates (5W / gate / MHz) 1 micron (0.8 micron effective) twin well epitaxial process Typical gate delays of 400 ps (NAND2 , Fanout=2) Comprehensive cell libra... |
| Description |
High Density CMOS Gate Arrays
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| File Size |
189.15K /
17 Page |
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OKI electronic
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| Part No. |
MSM13Q
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| OCR Text |
...ive cells are tiled to create a channelless core array, with three comput cells for each drive cell as shown in Figure 2. The 3:1 ratio of compute to drive cells was selected for optimal implementation of emerging applications. Macrocells a... |
| Description |
(MSM13Q / MSM14Q) Sea of Gates Arrays
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| File Size |
148.33K /
20 Page |
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it Online |
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