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1/20 september 2013 vnq690sp-e quad channel high side driver table 1. general features (*) per each channel n output current per channel: 10a n cmos compatible inputs n open load detection (off state) n undervoltage & overvoltage n shut- down n overvoltage clamp n thermal shut-down n current limitation n very low stand-by power dissipation n protection against: n loss of ground & loss of v cc n reverse battery protection (**) n in compliance with the 2002/95/ec european directive description the vnq690sp-e is a monolithic device made by using | stmicroelectronics vipower m0-3 technology, intended for driving resistive or inductive loads with one side connected to ground. this device has four independent channels. built-in thermal shut down and output current limitation protect the chip from over temperature and short circuit. figure 1. package table 2. order codes note: (**) see application schematic at page 9 typ e r ds(on) i out v cc vnq690sp-e 90m w (*) 10a 36v 1 10 powerso-10 ? package tube tape and reel powerso-10 ? vnq690sp-e VNQ690SPTR-E docid10883 rev2
vnq690sp-e 2/20 figure 2. block diagram table 3. absolute maximum ratings symbol parameter value unit v cc supply voltage (continuous) 41 v -v cc reverse supply voltage (continuous) -0.3 v i ou t output current (continuous), per each channel internally limited a i r reverse output current (continuous), per each channel -15 a i in input current +/- 10 ma i stat status current +/- 10 ma i gnd ground current at t c < 25 c (continuous) -200 ma v esd electrostatic discharge (human body model: r=1.5k w; c=100pf) - input - status - output - v cc 4000 4000 5000 5000 v v v v p tot power dissipation at t c =25 c78w e max maximum switching energy (l=0.38mh; r l =0 w ; v bat =13.5v; t jstart =150oc; i l =14a) 53 mj t j junction operating temperature -40 to 150 c t stg storage temperature -65 to 150 c undervoltage overvoltage overtemp. 1 overtemp. 2 i lim2 demag 2 i lim1 demag 1 input 1 input 2 gnd v cc output 1 output 2 driver 2 driver 1 logic overtemp. 3 overtemp. 4 i lim4 demag 4 i lim3 demag 3 input 3 input 4 output 3 output 4 driver 4 driver 3 status status open load off-state
3/20 vnq690sp-e figure 3. configuration diagram (top view) & suggested connections for unused and n.c. pins figure 4. current and voltage conventions table 4. thermal data note: 1. when mounted on a standard single-sided fr-4 board with 0.5cm2 of cu (at least 35 m m thick) note: 2. when mounted on a standard single-sided fr-4 board with 6cm2 of cu (at least 35 m m thick). symbol parameter value unit r thj-case thermal resistance junction-case (max) per channel 2 c/w r tj-amb thermal resistance junction-ambient (max) 52 (1) 37 (2) c/w connection / pin status n.c. output input floating x x x x to ground x through 10k w resistor 1 2 3 4 5 6 7 8 9 10 11 gnd output 4 output 3 output 2 output 1 status input 4 input 3 input 2 input 1 v cc (*) v fn = v ccn - v outn during reverse battery condition i s i gnd v cc gnd input 4 input 3 i out2 i in3 i in4 v in4 v in3 v cc v out2 i out1 v out1 input 1 i in1 input 2 i in2 v in1 v in2 i stat status v stat output 4 output 3 i out3 i out4 v out4 v out3 output 1 output 2 v f1 (*)
vnq690sp-e 4/20 electrical characteristics (v cc =6v up to 24v; -40 c 5/20 vnq690sp-e electrical characteristics (continued) table 7. v cc - output diode table 8. switching (v cc =13v) table 9. openload detection (off state) per each channel table 10. logic input figure 5. status timing waveforms symbol parameter test conditions min typ max unit v f forward on voltage -i out =0.9a; t j =150c 0.6 v symbol parameter test conditions min typ max unit t d(on) turn-on delay time r l =13 w channels 1,2,3,4 30 m s t d(off) turn-off delay time r l =13 w channels 1,2,3,4 30 m s dv out /dt (on) turn-on voltage slope r l =13 w channels 1,2,3,4 see relative diagram v /m s dv out /dt (off) turn-off voltage slope r l =13 w channels 1,2,3,4 see relative diagram v /m s symbol parameter test conditions min typ max unit t sdl status delay see figure 1 (openload detection reading must be performed after t dol ). 20 m s v ol openload voltage detection threshold v in =0v 1.5 2.5 3.5 v t dol openload detection delay at turn off v cc =18v 300 m s symbol parameter test conditions min typ max unit v il input low level voltage 1.25 v v ih input high level voltage 3.25 v v hyst input hysteresis voltage 0.5 v i ih input high level voltage v in =3.25v 10 m a i il input current v in =1.25v 1 m a v icl input clamp voltage i in =1ma i in =-1ma 6 6.8 -0.7 8v v v in v stat t dol openload status timing v in v stat overtemp status timing t sdl t sdl t sdl
vnq690sp-e 6/20 table 11. truth table (per each channel) figure 6. switching characteristics conditions input output sense normal operation l h l h h h overtemperature l h l l h l undervoltage l h l l x x overvoltage l h l l h h current limitation l h l x h h output voltage > v ol l h h h l h t t v load v in 80% 10% dv out /dt (on) t d(off) 90% dv out /dt (off) t d(on) t r
7/20 vnq690sp-e table 12. electrical transient requirements iso t/r 7637/1 test pulse test levels i ii iii iv delays and impedance 1 -25 v -50 v -75 v -100 v 2 ms 10 w 2 +25 v +50 v +75 v +100 v 0.2 ms 10 w 3a -25 v -50 v -100 v -150 v 0.1 m s 50 w 3b +25 v +50 v +75 v +100 v 0.1 m s 50 w 4 -4 v -5 v -6 v -7 v 100 ms, 0.01 w iso t/r 7637/1 test pulse test levels result iiiiiiiv 1cccc 2cccc 3acccc 3bcccc 4cccc 5ceee class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device.
vnq690sp-e 8/20 figure 7. waveforms status input n normal operation undervoltage v cc v usd v usdhyst input n overvoltage v cc v cc >v ov status input n status undefined overtemperature input n status t tsd t r t j load voltage n v cc 9/20 vnq690sp-e figure 8. application schematic gnd protection network against reverse battery solution 1: resistor in the ground line (r gnd only). this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1) r gnd 600mv / (i s(on)max ). 2) r gnd 3 (- v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device?s datasheet. power dissipation in r gnd (when v cc <0: during reverse battery situations) is: p d = (-v cc ) 2 /r gnd this resistor can be shared amongst several different hsd. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not common with the device ground then the r gnd will produce a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift will vary depending on how many devices are on in the case of several high side drivers sharing the same r gnd . if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the st suggests to utilize solution 2 (see below). solution 2: a diode (d gnd ) in the ground line. a resistor (r gnd =1k w) should be inserted in parallel to d gnd if the device will be driving an inductive load. this small signal diode can be safely shared amongst several different hsd. also in this case, the presence of the ground network will produce a shift ( j 600mv) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. this shift will not vary if more than one hsd shares the same diode/resistor network. series resistor in input and status lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. safest configuration for unused input and status pin is to leave them unconnected. load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds v cc max dc rating. the same applies if the device will be subject to transients on the v cc line that are greater than the ones shown in the iso t/r 7637/1 table. v cc d ld +5v r prot status input1 +5v output3 output1 output2 output4 input3 input4 r prot r prot r prot r prot input2 m c gnd d gnd r gnd v gnd note: channels 3 & 4 have the same internal circuit as channel 1 & 2.
vnq690sp-e 10/20 m c i/os protection: if a ground protection network is used and negative transient are present on the v cc line, the control pins will be pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the m c i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of m c and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of m c i/os. -v ccpeak /i latchup r prot (v oh m c -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = - 100v and i latchup 3 20ma; v oh m c 3 4.5v 5k w r prot 65k w . recommended r prot value is 10k w.
11/20 vnq690sp-e figure 9. off state output current figure 10. input high level figure 11. input clamp voltage figure 12. high level input current figure 13. input low level figure 14. input hysteresis voltage -50 -25 0 25 50 75 100 125 150 175 tc (o c ) 1 1.25 1.5 1.75 2 2.25 2.5 2.75 3 3.25 3.5 il(off1) (a) vcc=24v vout=0v -50 -25 0 25 50 75 100 125 150 175 tc (o c ) 2 2.25 2.5 2.75 3 3.25 3.5 3.75 4 vih (v) -50 -25 0 25 50 75 100 125 150 175 tc (o c ) 6 6.25 6.5 6.75 7 7.25 7.5 7.75 8 vicl (v) iin=1ma -50 -25 0 25 50 75 100 125 150 175 tc ( oc ) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 iih (a) vin=3.25v -50 -25 0 25 50 75 100 125 150 175 tc ( oc ) 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 vil (v) -50 -25 0 25 50 75 100 125 150 175 tc ( oc ) 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 vihyst (v)
vnq690sp-e 12/20 figure 15. overvoltage shutdown figure 16. turn-on voltage slope figure 17. i lim vs t case figure 18. openload off state detection threshold figure 19. turn-off voltage slope figure 20. on state resistance vs v cc -50 -25 0 25 50 75 100 125 150 175 tc (o c ) 30 32.5 35 37.5 40 42.5 45 47.5 50 vov (v) -50 -25 0 25 50 75 100 125 150 175 tc (o c) 0 50 100 150 200 250 300 350 400 450 500 dvout/dt(on) (v/ms) vcc=13v ri=13ohm -50 -25 0 25 50 75 100 125 150 175 tc (o c ) 5 7.5 10 12.5 15 17.5 20 22.5 25 ilim (a) vcc=13v -50 -25 0 25 50 75 100 125 150 175 tc ( oc ) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 vol (v) vin=0v -50 -25 0 25 50 75 100 125 150 175 tc (o c) 100 150 200 250 300 350 400 450 500 550 600 dvout/dt(off) (v/ms) vcc=13v ri=13ohm 0 5 10 15 20 25 30 35 40 vcc (v) 20 40 60 80 100 120 140 160 ron (mohm) iout=1a tc= 25oc tc= -40oc tc= 150oc
13/20 vnq690sp-e figure 21. on state resistance vs t case figure 22. status leakage current figure 23. status clamp voltage figure 24. status low output voltage -50 -25 0 25 50 75 100 125 150 175 tc (o c) 0 20 40 60 80 100 120 140 160 ron (mohm) iout=1a vcc=9v; 18v & 36v -50 -25 0 25 50 75 100 125 150 175 tc (o c) 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0.05 ilstat (a) vstat=5v -50 -25 0 25 50 75 100 125 150 175 tc ( oc ) 6.6 6.7 6.8 6.9 7 7.1 7.2 7.3 7.4 vscl (v) istat=1ma -50 -25 0 25 50 75 100 125 150 175 tc ( oc ) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 vstat (v) istat=1.6ma
vnq690sp-e 14/20 figure 25. maximum turn off current versus load inductance a = single pulse at t jstart =150oc b= repetitive pulse at t jstart =100oc c= repetitive pulse at t jstart =125oc conditions: v cc =13.5v values are generated with r l =0 w in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves b and c. 1 10 100 0.01 0.1 1 10 100 l(mh) i lmax (a) a b c v in , i l t demagnetization demagnetization demagnetization
15/20 vnq690sp-e powerso-10? thermal data figure 26. powerso-10? pc board figure 27. r thj-amb vs pcb copper area in open box free air condition layout condition of r th and z th measurements (pcb fr4 area= 58mm x 58mm, pcb thickness=2mm, cu thickness=35 m m, copper areas: from minimum pad lay-out to 8cm 2 ). 30 35 40 45 50 55 0246810 pcb cu heatsink area (cm^2) rthj_amb (c/w) tj-tamb=50c
vnq690sp-e 16/20 figure 28. powerso-10 thermal impedance junction ambient single pulse figure 29. thermal fitting model of a double channel hsd in powerso-10 pulse calculation formula table 13. thermal parameter 0.01 0.1 1 10 100 1000 0.0001 0.001 0.01 0.1 1 10 100 1000 time (s) zt h (c/w) footprint 6 cm 2 t_amb pd1 c1 r4 c3 c4 r3 r1 r6 r5 r2 c5 c6 c2 pd2 r2 c1 c2 r1 tj_1 tj_2 area/island (cm 2 ) footprint 6 r1 (c/w) 0.05 r2 (c/w) 0.3 r3( c/w) 0.3 r4 (c/w) 0.8 r5 (c/w) 12 r6 (c/w) 37 22 c1 (w.s/c) 0.001 c2 (w.s/c) 5.00e-03 c3 (w.s/c) 0.02 c4 (w.s/c) 0.3 c5 (w.s/c) 0.75 c6 (w.s/c) 3 5 z th d r th d z thtp 1 d ? () + = where d t p t =
17/20 vnq690sp-e package mechanical table 14. powerso-10? mechanical data note: (*) muar only poa p013p figure 30. powerso-10? package dimensions symbol millimeters min typ max a 3.35 3.65 a (*) 3.4 3.6 a1 0.00 0.10 b 0.40 0.60 b (*) 0.37 0.53 c 0.35 0.55 c (*) 0.23 0.32 d 9.40 9.60 d1 7.40 7.60 e 9.30 9.50 e2 7.20 7.60 e2 (*) 7.30 7.50 e4 5.90 6.10 e4 (*) 5.90 6.30 e 1.27 f 1.25 1.35 f (*) 1.20 1.40 h 13.80 14.40 h (*) 13.85 14.35 h 0.50 l 1.20 1.80 l (*) 0.80 1.10 a 0o 8o a (*) 2o 8o detail "a" plane seating a l a1 f a1 h a d d1 = = = = e4 0.10 a c a b b detail "a" seating plane e2 10 1 eb he 0.25 p095a
vnq690sp-e 18/20 figure 31. powerso-10 ? suggested pad layout and tube shipment (no suffix) figure 32. tape and reel shipment (suffix tr) 6. 30 10.8 - 11 14.6 - 14.9 9.5 1 2 3 4 5 1.27 0.67 - 0.73 0. 54 - 0. 6 10 9 8 7 6 b a c c a b muar casablanca all dimensions are in mm. base q.ty bulk q.ty tube length ( 0.5) a b c ( 0.1) casablanca 50 1000 532 10.4 16.4 0.8 muar 50 1000 532 4.9 17.2 0.8 reel dimensions all dimensions are in mm. base q.ty 600 bulk q.ty 600 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 24.4 n (min) 60 t (max) 30.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 ( 0.1) 4 component spacing p 24 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 11.5 compartment depth k (max) 6.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed
19/20 vnq690sp-e revision history date revision description of changes oct. 2004 1 - first issue. september 2013 2 - updated disclaimer.
vnq690sp-e 20/20 docid10883 rev2 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. if any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems wi th product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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