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scbs177o ? october 1993 ? revised march 2004 1 post office box 655303 ? dallas, texas 75265 compatible with ieee std 1194.1-1991 (btl) ttl a port, backplane transceiver logic (btl) b port open-collector b -port outputs sink 100 ma bias v cc minimizes signal distortion during live insertion or withdrawal high-impedance state during power up and power down b -port biasing network preconditions the connector and pc trace to the btl high-level voltage ttl-input structures incorporate active clamping to aid in line termination bg v nc v cc gnd 1ao6 1ai6 1ao7 1ai7 gnd 1ao8 1ai8 1ao9 1ai9 gnd 2clk nc 2ao2 2ai2 gnd 2ao3 2ai3 2ao4 2ai4 gnd v cc nc pca package (top view) 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 1b2 gnd 1b3 1b4 gnd 1b5 1b6 gnd 1b7 1b8 gnd 1b9 nc 2clkab gnd 2b2 2b3 gnd 2b4 2b5 gnd 2b6 2b7 gnd 2b8 gnd 2ao6 gnd 2ao7 2ao8 v v cc 2ai7 2clkab 2oea 2leab gnd 2ao9 gnd 1oeb 1oea 1leab 2oeb 2oeb 2leba 2clkba 1clkab 2ai8 gnd 1ao1 gnd 2ai9 cc 2oea 2ai6 cc 1oeb 1leba 1clkba 1oea 1ai1 1ao2 1ai2 1ao3 1ai3 1ao4 1ai4 1ao5 1ai5 2ao5 2ai5 nc ? no internal connection 26 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 1b1 bg gnd nc 2b9 cc bias v copyright ? 2004, texas instruments incorporated please be aware that an important notice concerning avail ability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
scbs177o ? october 1993 ? revised march 2004 2 post office box 655303 ? dallas, texas 75265 description/ordering information the SN74FB1651 contains an 8-bit and 9-bit transceiver with a buffered clock. the clock and the transceivers are designed to translate signals between ttl and backplane transceiver-logic (btl) environments. the device is designed specifically to be compatible with ieee std 1194.1-1991. the b port operates at btl-signal levels. the open-collector b ports are specified to sink 100 ma. two output enables (oeb and oeb ) are provided for the b outputs. when oeb is low, oeb is high, or v cc is less than 2.1 v, the b port is turned off. the a port operates at ttl-signal levels. the a outputs reflect the inverse of the data at the b port when the a-port output enable (oea) is high. when oea is low or when v cc is less than 2.1 v, the a outputs are in the high-impedance state. bias v cc establishes a voltage between 1.62 v and 2.1 v on the btl outputs when v cc is not connected. bg v cc and bg gnd are the supply inputs for the bias generator. ordering information t a package ? orderable part number top-side marking 0 c to 70 c tqfp ? pca tube SN74FB1651pca fb1651 ? package drawings, standard packing quantities, thermal data, symbolization, and pcb design guidelines are available at www.ti.com/sc/package. function tables transceiver inputs function oea oea oeb oeb function x x h l a data to b bus l hxx b data to a bus l hhla data to b bus, b data to a bus x x l x b-bus isolation x xxh b-bus isolation h x x x a-bus isolation x l x x a-bus isolation storage mode inputs function le clk function h x transparent l store data l l storage
scbs177o ? october 1993 ? revised march 2004 3 post office box 655303 ? dallas, texas 75265 functional block diagram to eight other channels 1d c2 c1 1d c2 c1 1oeb 1oeb 1clkab 1leab 1leba 1clkba 1oea 1oea 1ai1 1ao1 1b1 81 80 83 82 85 84 87 86 90 89 76 transceiver
scbs177o ? october 1993 ? revised march 2004 4 post office box 655303 ? dallas, texas 75265 functional block diagram (continued) to seven other channels 2oeb 2oeb 2clkab 2leab 2leba 2clkba 2oea 2oea 2clkab 1d c2 c1 1d c2 c1 2b2 2ai2 2ao2 2clk delay delay 45 46 43 44 41 42 39 40 14 17 16 62 60 transceiver
scbs177o ? october 1993 ? revised march 2004 5 post office box 655303 ? dallas, texas 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) ? supply voltage range, v cc , bias v cc , bg v cc ?0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, v i : except b port ?1.2 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . b port ?1.2 v to 3.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . voltage range applied to any b output in the disabled or power-off state, v o ?0.5 v to 3.5 v . . . . . . . . . . . . . . voltage range applied to any output in the high state, v o ?0.5 v to v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik : except b port ?40 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . b port ?18 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . current applied to any single output in the low state, i o : a port 48 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . b port 200 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . package thermal impedance, ja (see note 1) 22 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg ?65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, a nd functional operation of the device at these or any other conditions beyond those indicated under ?recommended operating conditi ons? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. note 1: the package thermal impedance is calculated in accordance with jesd 51-7. recommended operating conditions (see note 2) min nom max unit v cc, bg v cc , bias v cc supply voltage 4.5 5 5.5 v v ih high-level input voltage b port 1.62 2.3 v v ih high-level input voltage except b port 2 v v il low-level input voltage b port 0.75 1.47 v v il low-level input voltage except b port 0.8 v i ik input clamp current ?18 ma i oh high-level output current a port ?3 ma i ol low-level output current a port 24 ma i ol low-level output current b port 100 ma t a operating free-air temperature 0 70 c note 2: to ensure proper device operation, all unused inputs must be terminated as follows: a and control inputs to v cc (5 v) or gnd, and b inputs to gnd only. refer to the ti application report, implications of slow or floating cmos inputs , literature number scba004.
scbs177o ? october 1993 ? revised march 2004 6 post office box 655303 ? dallas, texas 75265 electrical characteristics over recommended operating free-air temperature range parameter test conditions min typ ? max unit v ik b port v cc = 4.5 v, i i = ?18 ma ?1.2 v v ik except b port v cc = 4.5 v, i i = ?40 ma ?0.5 v v oh ao port v cc = 4.5 v, i oh = ?3 ma 2.5 3.3 v ao port v cc = 4.5 v, i ol = 24 ma 0.35 0.5 v ol b port v cc = 4.5 v i ol = 80 ma 0.75 1.1 v v ol b port v cc = 4.5 v i ol = 100 ma 1.15 v i i except b port v cc = 5.5 v, v i = 5.5 v 50 a i ih ? except b port v cc = 5.5 v, v i = 2.7 v 50 a i il ? except b port v cc = 5.5 v, v i = 0.5 v ?50 a i il ? b port v cc = 5.5 v, v i = 0.75 v ?100 a i ozh ao port v cc = 5.5 v, v o = 2.7 v 50 a i ozl ao port v cc = 5.5 v, v o = 0.5 v ?50 a i ozpu ao port v cc = 0 to 2.1 v, v o = 0.5 v to 2.7 v 50 a i ozpd ao port v cc = 2.1 v to 0, v o = 0.5 v to 2.7 v ?50 a i oh b port v cc = 0 to 5.5 v, v o = 2.1 v 100 a i os a port v cc = 5.5 v, v o = 0 ?30 ?150 ma i cc a port to b port v cc = 5.5 v, i o = 0 100 ma i cc b port to a port v cc = 5.5 v, i o = 0 120 ma c i ai port v i = 0.5 v or 2.5 v 5.5 pf c i control inputs v i = 0.5 v or 2.5 v 5.5 pf c o ao ports v o = 0.5 v or 2.5 v 5.5 pf c io b port per ieee std 1194.1-1991 v cc = 0 to 5.5 v 5.5 pf ? all typical values are at v cc = 5 v, t a = 25 c. ? for i/o ports, the parameters i ih and i il include the off-state output current. not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. live-insertion specifications over recommended operating free-air temperature range parameter test conditions min max unit i cc (bias v cc ) v cc = 0 to 4.5 v v b = 0 to 2 v, v i (bias v cc ) = 4.5 v to 5.5 v 450 a i cc (bias v cc ) v cc = 4.5 v to 5.5 v v b = 0 to 2 v, v i (bias v cc ) = 4.5 v to 5.5 v 10 a v o b port v cc = 0, v i (bias v cc ) = 5 v 1.62 2.1 v v cc = 0 , v b = 1 v, v i (bias v cc ) = 4.5 v to 5.5 v ?1 a i o b port v cc = 0 to 2.2 v, oeb = 0 to 5 v 100 a i o b port v cc = 0 to 5.5 v, oeb = 0 to 0.8 v 1 ma
scbs177o ? october 1993 ? revised march 2004 7 post office box 655303 ? dallas, texas 75265 timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see figure 1) v cc = 5 v, t a = 25 c min max unit min max min max unit f clock clock frequency 150 150 mhz t w pulse duration clk or le 3.3 3.3 ns t su setup time data before le 4.8 4.8 ns t su setup time data before clk 4.9 4.6 ns t h hold time data after le 1.8 1.8 ns t h hold time data after clk 1.1 1.1 ns
scbs177o ? october 1993 ? revised march 2004 8 post office box 655303 ? dallas, texas 75265 switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see figure 1) parameter from (input) to (output) v cc = 5 v, t a = 25 c min max unit parameter (input) (output) min typ max min max unit f max 150 150 mhz t plh ai b 1.8 3.7 5.3 1.8 6.2 ns t phl ai b 2.9 4.4 6 2.9 6.6 ns t plh leab b 2.7 4.2 5.8 2.7 6.4 ns t phl leab b 3.5 5 6.5 3.5 7.3 ns t plh clkab b 2.3 3.9 5.5 2.3 6 ns t phl clkab b 2.9 4.5 6.1 2.9 6.7 ns t plh 2clkab 2clkab 4.6 6.9 8.8 4.6 9.9 ns t phl 2clkab 2clkab 4.9 6.5 8.1 4.9 8.8 ns t plh b ao 3.5 5.9 7.9 3.5 8 ns t phl b ao 2.2 3.7 5.3 2.2 5.7 ns t plh leba ao 1.8 3.2 4.6 1.8 5.1 ns t phl leba ao 1.7 3 4.4 1.7 4.7 ns t plh clkba ao 1.8 3.1 4.6 1.8 5.1 ns t phl clkba ao 1.7 3.1 4.6 1.7 4.9 ns t plh 2clkab 2clk 6.4 9.7 11.8 6.4 13.4 ns t phl 2clkab 2clk 4.1 6.9 8.9 4.1 10.3 ns t plh oeb b 2.7 4.6 6.4 2.7 6.7 ns t phl oeb b 2.9 4.1 5.9 2.9 6.6 ns t plh oeb b 2.6 4.3 6.2 2.6 6.6 ns t phl oeb b 3.4 4.6 6.4 3.4 7 ns t pzh oea ao 1.4 2.9 4.4 1.4 4.9 ns t pzl oea ao 1.4 2.6 4 1.4 4.6 ns t phz oea ao 1.7 3.4 5.1 1.7 5.8 ns t plz oea ao 2.2 3.6 5 2.2 5.5 ns t pzh oea ao 1.7 3.3 4.7 1.7 5.5 ns t pzl oea ao 1.7 3.1 4.4 1.7 5.1 ns t phz oea ao 1.5 2.9 4.5 1.5 5.1 ns t plz oea ao 2 3.1 4.6 2 4.8 ns t sk(p) ? pulse skew, ai to b or b to ao 1 ns t sk(o) ? output skew, ai to b or b to ao 0.5 ns t t b outputs (1.3 v to 1.8 v) 0.9 1.7 0.5 4.6 ns t t transition time ao outputs (10% to 90%) 0.5 2 0.4 4.2 ns b -port input pulse rejection 1 1 ns ? skew values are applicable for through mode only.
scbs177o ? october 1993 ? revised march 2004 9 post office box 655303 ? dallas, texas 75265 parameter measurement information from output under test c l = 50 pf (see note a) load circuit for a outputs s1 500 ? 500 ? from output under test load circuit for b outputs 2.1 v 16.5 ? c l = 30 pf (see note a) test point t phl t plh output 3 v 0 v v oh v ol data input timing input 3 v 0 v 0 v t phl t plh 2 v 1 v v oh v ol voltage waveforms propagation delay times (b to a) voltage waveforms propagation delay times (a to b) voltage waveforms setup and hold times output control output waveform 1 s1 at 7 v (see note b) output waveform 2 s1 at open (see note b) v ol v oh t plz t pzh t pzl t phz 3.5 v 0 v v ol + 0.3 v v oh ? 0.3 v 0 v 3 v t w voltage waveforms pulse duration voltage waveforms enable and disable times (a port) t plh /t phl t plz /t pzl t phz /t pzh open 7 v open test s1 notes: a. c l includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: ttl inputs: prr 10 mhz, z o = 50 ? , t r 2.5 ns , t f 2.5 ns; btl inputs: prr 10 mhz, z o = 50 ? , t r 2.5 ns, t f 2.5 ns. d. the outputs are measured one at a time, with one transition per measurement. 7 v open 1.5 v 1.5 v 1.5 v 3 v 0 v 1.5 v 1.5 v input input 1.5 v 1.5 v 1.55 v 1.55 v output input 1.5 v 1.5 v 1.55 v 1.55 v 1.5 v 1.5 v 1.5 v 1.5 v 3 v gnd t h t su figure 1. load circuits and voltage waveforms
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) SN74FB1651pca active hlqfp pca 100 90 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 3-mar-2006 addendum-page 1
mechanical data mhtq003a january 1995 revised december 1996 post office box 655303 ? dallas, texas 75265 pca (s-pqfp-g100) plastic quad flatpack (die down) 4040288 / b 10/96 50 heat slug 26 gage plane 0,13 nom 0,25 0,45 0,75 seating plane 0,05 min 0,27 51 25 75 1 12,00 typ 0,17 76 100 sq sq 15,80 16,20 13,80 1,60 max 1,45 1,35 14,20 0,08 0,50 m 0,08 0 7 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. thermally enhanced molded plastic package with a heat slug (hsl) d. falls within jedec ms-026
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