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an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. advance information for pre-production products; subject to change without notice. TPS7A26 sbvs290 ? december 2018 TPS7A26 500-ma, 18-v, ultra-low i q , low dropout linear voltage regulator with power good 1 1 features 1 ? ultra-low i q : 2.5 a ? input voltage: 2.4 v to 18 v ? output voltage options available: ? fixed: 1.25 v to 5 v ? adjustable: 1.24 v to 17.45 v ? 1% accuracy over temperature ? low dropout: 550 mv (max) at 500 ma ? open-drain power-good output ? internal soft-start limits inrush current ? thermal shutdown and overcurrent protection ? operating junction temperature: ? 40 c to +125 c ? stable with 1- f output capacitor ? packages: wson-6 2 applications ? home and building automation ? multicell power banks ? smart grid and metering ? portable power tools ? motor drives ? white goods ? portable appliances 3 description the TPS7A26 low-dropout linear voltage regulator (ldo) introduces a unique combination of a 2.4-v to 18-v input voltage range with very-low quiescent current (i q ). these features help modern appliances meet increasingly stringent energy requirements, and help extend battery life in portable-power solutions. the TPS7A26 is available in both fixed and adjustable versions. the fixed-voltage version eliminates external resistors and minimizes printed circuit board (pcb) area. for more flexibility or higher output voltages, the adjustable version uses feedback resistors to set the output voltage from 1.24 v to 17.45 v. both versions have 1% output regulation accuracy that provides precision regulation for most micro-controller units (mcus). the TPS7A26 ldo operates more efficiently than standard linear regulators because the maximum dropout voltage is less than 550 mv at 500 ma of current. this maximum dropout voltage allows for 89% efficiency from a 5.6-v input voltage (v in ) to 5.0-v output voltage (v out ). the power good (pg) indicator can be used to either hold an mcu in reset until power is good, or for sequencing. the pg pin is an open-drain output; therefore, the pin is easily level-shifted for monitoring by a rail other than v out . the built-in current limit and thermal shutdown help to protect the regulator in the event of a load short or fault. device information (1) part number package body size (nom) TPS7A26 wson (6) 2.00 mm 2.00 mm (1) for all available packages, see the package option addendum at the end of the datasheet. typical application circuit TPS7A26 in en gnd fb out c in r 1 r 2 c out v in v out pg r pg v pg advance information tools & software technical documents ordernow productfolder support &community
2 TPS7A26 sbvs290 ? december 2018 www.ti.com product folder links: TPS7A26 submit documentation feedback copyright ? 2018, texas instruments incorporated table of contents 1 features .................................................................. 1 2 applications ........................................................... 1 3 description ............................................................. 1 4 revision history ..................................................... 2 5 pin configuration and functions ......................... 3 6 specifications ......................................................... 4 6.1 absolute maximum ratings ...................................... 4 6.2 esd ratings .............................................................. 4 6.3 recommended operating conditions ....................... 4 6.4 thermal information .................................................. 4 6.5 electrical characteristics ........................................... 5 7 detailed description .............................................. 6 7.1 overview ................................................................... 6 7.2 functional block diagrams ....................................... 6 7.3 feature description ................................................... 7 7.4 device functional modes .......................................... 9 8 application and implementation ........................ 10 8.1 application information ............................................ 10 8.2 typical application ................................................. 12 9 power supply recommendations ...................... 14 10 layout ................................................................... 14 10.1 layout guidelines ................................................. 14 10.2 layout examples ................................................... 14 11 device and documentation support ................. 15 11.1 device support ...................................................... 15 11.2 receiving notification of documentation updates 15 11.3 community resources .......................................... 15 11.4 trademarks ........................................................... 15 11.5 electrostatic discharge caution ............................ 15 11.6 glossary ................................................................ 15 12 mechanical, packaging, and orderable information ........................................................... 15 4 revision history date revision notes december 2018 * initial release. advance information
3 TPS7A26 www.ti.com sbvs290 ? december 2018 product folder links: TPS7A26 submit documentation feedback copyright ? 2018, texas instruments incorporated 5 pin configuration and functions TPS7A26: drv package (adjustable) 6-pin wson top view TPS7A26: drv package (fixed) 6-pin wson top view pin functions pin i/o description name drv (adjustable) drv (fixed) en 4 4 input enable pin. drive en greater than v en(hi) to enable the regulator. drive en less than v en(low) to put the regulator into low-current shutdown. do not float this pin. if not used, connect en to in. fb 2 ? input feedback pin. input to the control-loop error amplifier. this pin is used to set the output voltage of the device with the use of external resistors. for adjustable-voltage version devices only. gnd 5 5 ? ground pin. in 6 6 input input pin. for best transient response and to minimize input impedance, use the recommended value or larger capacitor from in to ground as listed in the recommended operating conditions table. place the input capacitor as close to the in and gnd pins of the device as possible. nc ? 2 ? no internal connection. for fixed-voltage version devices only. float or tie this pin to ground. out 1 1 output output pin. a capacitor is required from out to ground for stability. for best transient response, use the nominal recommended value or larger ceramic capacitor from out to ground. follow the recommended capacitor value as listed in the recommended operating conditions table. place the output capacitor as close to the out and gnd pins of the device as possible. pg 3 3 output power-good pin; open-collector output. pullup this pin externally to the out pin or another voltage rail. the pg pin goes high when v out > v it(pg,rising) in the electrical characteristics table. the pg pin is driven low when v out < v it(pg,falling) in the electrical characteristics table. connect this pin to ground or leave floating if not used. thermal pad pad pad ? exposed pad of the package. connect this pad to ground or leave floating. connect the thermal pad to a large-area ground plane for best thermal performance. advance information 1 out 2 fb 3 pg 4 en 5 gnd 6 in not to scale thermal pad 1 out 2 nc 3 pg 4 en 5 gnd 6 in not to scale thermal pad
4 TPS7A26 sbvs290 ? december 2018 www.ti.com product folder links: TPS7A26 submit documentation feedback copyright ? 2018, texas instruments incorporated (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions . exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) all voltages with respect to gnd. (3) v in + 0.3 v or 20 v (whichever is smaller) 6 specifications 6.1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) (1) min max unit voltage (2) v in ? 0.3 20 v v out (3) ? 0.3 v in + 0.3 v fb ? 0.3 5.5 v en ? 0.3 20 v pg ? 0.3 20 current maximum output internally limited a temperature operating junction, t j ? 50 150 c storage, t stg ? 65 150 (1) jedec document jep155 states that 2-kv hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 500-v cdm allows safe manufacturing with a standard esd control process. 6.2 esd ratings value unit v (esd) electrostatic discharge human body model (hbm), per ansi/esda/jedec js-001 (1) tbd v charged device model (cdm), per jedec specification jesd22-c101 (2) tbd (1) select pullup resistor to limit pg pin sink current when pg output is driven low. see power good section for details. (2) effective output capacitance of 0.47 f minimum required for stability. 6.3 recommended operating conditions min nom max unit v in input voltage 2.4 18 v v out output voltage (adjustable version) 1.24 17.45 v v out output voltage (fixed version) 1.25 5 v i out output current 0 500 ma v en enable voltage 0 18 v v pg (1) power good voltage 0 18 v c in input capacitor 1 f c out (2) output capacitor 1 2.2 f t j operating junction temperature ? 40 125 c (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.4 thermal information thermal metric (1) TPS7A26 unit drv (wson) 6 pins r ja junction-to-ambient thermal resistance 73.3 c/w r jc(top) junction-to-case (top) thermal resistance 90.6 c/w r jb junction-to-board thermal resistance 38.3 c/w jt junction-to-top characterization parameter 3.7 c/w jb junction-to-board characterization parameter 38.4 c/w r jc(bot) junction-to-case (bottom) thermal resistance 14.3 c/w advance information
5 TPS7A26 www.ti.com sbvs290 ? december 2018 product folder links: TPS7A26 submit documentation feedback copyright ? 2018, texas instruments incorporated (1) v out(nom) + 0.8 v or 2.4 v (whichever is greater) (2) v do is measured with v in = 0.97 v out(nom) for fixed output voltage versions. v do is not measured for fixed output voltage versions when v out 2.5v. for adjustable output device, v do is measured with v fb = 0.97 v fb(nom). 6.5 electrical characteristics specified at t j = ? 40 c to + 125 c, v in = v out(nom) + 0.8 v or v in = 2.4 v (whichever is greater), fb tied to out, i out = 1 ma, v en = 2 v, and c in = 1 f, c out = 2.2 f (unless otherwise noted). typical values are at t j = 25 c. parameter test conditions min typ max unit v uvlo(rising) uvlo threshold rising v in rising 1.95 2.15 2.35 v v uvlo(hys) uvlo hysteresis 65 mv v uvlo(falling) uvlo threshold falling v in falling 1.85 2.25 v v fb feedback voltage adjustable version only 1.24 v v out output voltage accuracy adjustable version, v out = v fb 1.228 1.24 1.252 v fixed output versions ? 1 1 % v out( vin) line regulation (1) (v out(nom) + 0.8 v or 2.4 v) v in 18 v ? 0.1 0.1 % v out( iout) load regulation 1 ma i out 500 ma ? 0.5 0.5 % v do dropout voltage (2) i out = 100 ma 60 mv i out = 250 ma 160 i out = 500 ma 330 550 i cl output current limit v out = 0.9 v out(nom) 600 700 860 ma i gnd ground pin current i out = 0 ma, t j = 25 c 2.5 a i out = 0 ma 5 i out = 1 ma 20 i out = 10 ma 100 i out = 150 ma 400 i shutdown shutdown current v en 0.4 v, v in = 2.4 v, i out = 0 ma 250 600 na i fb fb pin current 10 na i en en pin current v en = 18 v 50 na v en(hi) enable pin high-level input voltage device enabled 0.9 v v en(low) enable pin low-level input voltage device disabled 0.4 v it(pg,rising) pg pin threshold rising r pullup = 10 k , v out rising, v in v uvlo(rising) 92 96 %v out v hys(pg) pg pin hysteresis r pullup = 10 k , v out falling, v in v uvlo(rising) 2 v it(pg,falling) pg pin threshold falling r pullup = 10 k , v out falling, v in v uvlo(rising) 84 v ol(pg) pg pin low level output voltage v out < v it(pg,rising) , i pg-sink = 500 a 0.4 v i lkg(pg) pg pin leakage current v out > v it(pg,rising) , v pg = 18 v 50 300 na psrr power-supply rejection ratio f = 10 hz 80 db f = 100 hz 62 f = 1 khz 52 v n output noise voltage bw = 10 hz to 100 khz, v out = 1.2 v 200 v rms t sd(shutdown) thermal shutdown temperature shutdown, temperature increasing 165 c t sd(reset) thermal shutdown reset temperature reset, temperature decreasing 145 advance information
6 TPS7A26 sbvs290 ? december 2018 www.ti.com product folder links: TPS7A26 submit documentation feedback copyright ? 2018, texas instruments incorporated 7 detailed description 7.1 overview the TPS7A26 is an 18-v tolerant, low quiescent current, low-dropout (ldo) linear regulator. the low i q performance makes the TPS7A26 an excellent choice for battery-powered or line-power applications that are expected to meet increasingly stringent standby-power standards. the fixed-output versions have the advantage of providing better accuracy with fewer external components, whereas the adjustable version has the flexibility for a far wider output voltage range. the 1% accuracy over temperature and power-good indication make this device an excellent choice for meeting a wide range of microcontroller power requirements. additionally, the TPS7A26 has an internal soft-start to minimize inrush current into the output capacitance. for increased reliability, the TPS7A26 also incorporates overcurrent and thermal shutdown protection. the operating junction temperature is ? 40 c to +125 c, and adds margin for applications concerned with higher working ambient temperatures. the TPS7A26 is available in a thermally enhanced wson package. 7.2 functional block diagrams figure 1. adjustable version + band-gap reference thermal shutdown uvlo logic current limit in en gnd out pg + pg reference fb TPS7A2601 ( adjustable version) advance information
7 TPS7A26 www.ti.com sbvs290 ? december 2018 product folder links: TPS7A26 submit documentation feedback copyright ? 2018, texas instruments incorporated functional block diagrams (continued) figure 2. fixed version 7.3 feature description 7.3.1 output enable the enable pin for the device is an active-high pin. the output voltage is enabled when the voltage of the enable pin is greater than the high-level input voltage of the en pin and disabled with the enable pin voltage is less than the low-level input voltage of the en pin. if independent control of the output voltage is not needed, connect the enable pin to the input of the device. 7.3.2 dropout voltage dropout voltage (v do ) is defined as the input voltage minus the output voltage (v in ? v out ) at the rated output current (i rated ), where the pass transistor is fully on. i rated is the maximum i out listed in the recommended operating conditions table. the pass transistor is in the ohmic or triode region of operation, and acts as a switch. the dropout voltage indirectly specifies a minimum input voltage greater than the nominal programmed output voltage at which the output voltage is expected to stay in regulation. if the input voltage falls to less than the nominal output regulation, then the output voltage falls as well. for a cmos regulator, the dropout voltage is determined by the drain-source on-state resistance (r ds(on) ) of the pass transistor. therefore, if the linear regulator operates at less than the rated current, the dropout voltage for that current scales accordingly. use equation 1 to calculate the r ds(on) of the device. (1) 7.3.3 current limit the device has an internal current limit circuit that protects the regulator during transient high-load current faults or shorting events. the current limit is a brickwall scheme. in a high-load current fault, the brickwall scheme limits the output current to the current limit (i cl ). i cl is listed in the electrical characteristics table. + band-gap reference thermal shutdown uvlo logic current limit in en gnd out pg + pg reference TPS7A26 (fixed version) r 2 r 1 advance information r = ds(on) v do i rated
8 TPS7A26 sbvs290 ? december 2018 www.ti.com product folder links: TPS7A26 submit documentation feedback copyright ? 2018, texas instruments incorporated feature description (continued) the output voltage is not regulated when the device is in current limit. when a current limit event occurs, the device begins to heat up because of the increase in power dissipation. when the device is in brickwall current limit, the pass transistor dissipates power [(v in ? v out ) i cl ]. if thermal shutdown is triggered, the device turns off. after the device cools down, the internal thermal shutdown circuit turns the device back on. if the output current fault condition continues, the device cycles between current limit and thermal shutdown. for more information on current limits, see the know your limits application report . figure 3 shows a diagram of the current limit. figure 3. current limit 7.3.4 undervoltage lockout (uvlo) the device has an independent undervoltage lockout (uvlo) circuit that monitors the input voltage, allowing a controlled and consistent turn on and off of the output voltage. to prevent the device from turning off if the input drops during turn on, the uvlo has hysteresis as specified in the electrical characteristics table. 7.3.5 thermal shutdown the device contains a thermal shutdown protection circuit to disable the device when the junction temperature (t j ) of the pass transistor rises to t sd(shutdown) (typical). thermal shutdown hysteresis assures that the device resets (turns on) when the temperature falls to t sd(reset) (typical). the thermal time-constant of the semiconductor die is fairly short, thus the device may cycle on and off when thermal shutdown is reached until power dissipation is reduced. power dissipation during startup can be high from large v in ? v out voltage drops across the device or from high inrush currents charging large output capacitors. under some conditions, the thermal shutdown protection disables the device before startup completes. for reliable operation, limit the junction temperature to the maximum listed in the recommended operating conditions table. operation above this maximum temperature causes the device to exceed its operational specifications. although the internal protection circuitry of the device is designed to protect against thermal overall conditions, this circuitry is not intended to replace proper heat sinking. continuously running the device into thermal shutdown or above the maximum recommended junction temperature reduces long-term reliability. 7.3.6 power good the TPS7A26 has a power-good output. the output is an open collector and requires a pullup resistor to pull the output high when power is good. connect the pg pin to ground or leave floating if not used. v out(nom) 0 v 0 ma v out i cl i rated i out brickwall advance information
9 TPS7A26 www.ti.com sbvs290 ? december 2018 product folder links: TPS7A26 submit documentation feedback copyright ? 2018, texas instruments incorporated 7.4 device functional modes 7.4.1 device functional mode comparison the device functional mode comparison table shows the conditions that lead to the different modes of operation. see the electrical characteristics table for parameter values. table 1. device functional mode comparison operating mode parameter v in v en i out t j normal operation v in > v out(nom) + v do and v in > v in(min) v en > v en(hi) i out < i out(max) t j < t sd(shutdown) dropout operation v in(min) < v in < v out(nom) + v do v en > v en(hi) i out < i out(max) t j < t sd(shutdown) disabled (any true condition disables the device) v in < v uvlo v en < v en(low) not applicable t j > t sd(shutdown) 7.4.2 normal operation the device regulates to the nominal output voltage when the following conditions are met: ? the input voltage is greater than the nominal output voltage plus the dropout voltage (v out(nom) + v do ) ? the output current is less than the current limit (i out < i cl ) ? the device junction temperature is less than the thermal shutdown temperature (t j < t sd ) ? the enable voltage has previously exceeded the enable rising threshold voltage and has not yet decreased to less than the enable falling threshold 7.4.3 dropout operation if the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other conditions are met for normal operation, the device operates in dropout mode. in this mode, the output voltage tracks the input voltage. during this mode, the transient performance of the device becomes significantly degraded because the pass transistor is in the ohmic or triode region, and acts as a switch. line or load transients in dropout can result in large output-voltage deviations. when the device is in a steady dropout state (defined as when the device is in dropout, v in < v out(nom) + v do , directly after being in a normal regulation state, but not during startup), the pass transistor is driven into the ohmic or triode region. when the input voltage returns to a value greater than or equal to the nominal output voltage plus the dropout voltage (v out(nom) + v do ), the output voltage can overshoot for a short period of time while the device pulls the pass transistor back into the linear region. 7.4.4 disabled the output of the device can be shutdown by forcing the voltage of the enable pin to less than the maximum en pin low-level input voltage (see the electrical characteristics table). when disabled, the pass transistor is turned off and internal circuits are shutdown. advance information
10 TPS7A26 sbvs290 ? december 2018 www.ti.com product folder links: TPS7A26 submit documentation feedback copyright ? 2018, texas instruments incorporated 8 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 8.1 application information 8.1.1 adjustable device feedback resistors the adjustable-version device requires external feedback divider resistors to set the output voltage. v out is set using the feedback divider resistors, r 1 and r 2 , according to the following equation: v out = v fb (1 + r 1 / r 2 ) (2) to ignore the fb pin current error term in the v out equation, set the feedback divider current to 100x the fb pin current listed in the electrical characteristics table. this setting provides the maximum feedback divider series resistance, as shown in the following equation: r 1 + r 2 v out / (i fb 100) (3) 8.1.2 recommended capacitor types the device is designed to be stable using low equivalent series resistance (esr) ceramic capacitors at the input and output. multilayer ceramic capacitors have become the industry standard for these types of applications and are recommended, but must be used with good judgment. ceramic capacitors that employ x7r-, x5r-, and c0g-rated dielectric materials provide relatively good capacitive stability across temperature, whereas the use of y5v-rated capacitors is discouraged because of large variations in capacitance. regardless of the ceramic capacitor type selected, the effective capacitance varies with operating voltage and temperature. as a rule of thumb, expect the effective capacitance to decrease by as much as 50%. the input and output capacitors recommended in the recommended operating conditions table account for an effective capacitance of approximately 50% of the nominal value. 8.1.3 input and output capacitor requirements although an input capacitor is not required for stability, good analog design practice is to connect a capacitor from in to gnd. this capacitor counteracts reactive input sources and improves transient response, input ripple, and psrr. an input capacitor is recommended if the source impedance is more than 0.5 . a higher value capacitor may be necessary if large, fast rise-time load or line transients are anticipated or if the device is located several inches from the input power source. dynamic performance of the device is improved with the use of an output capacitor. use an output capacitor within the range specified in the recommended operating conditions table for stability. 8.1.4 reverse current excessive reverse current can damage this device. reverse current flows through the intrinsic body diode of the pass transistor instead of the normal conducting channel. at high magnitudes, this current flow degrades the long-term reliability of the device. conditions where reverse current can occur are outlined in this section, all of which can exceed the absolute maximum rating of v out v in + 0.3 v. ? if the device has a large c out and the input supply collapses with little or no load current ? the output is biased when the input supply is not established ? the output is biased above the input supply if reverse current flow is expected in the application, external protection is recommended to protect the device. reverse current is not limited in the device, so external limiting is required if extended reverse voltage operation is anticipated. advance information
11 TPS7A26 www.ti.com sbvs290 ? december 2018 product folder links: TPS7A26 submit documentation feedback copyright ? 2018, texas instruments incorporated application information (continued) figure 4 shows one approach for protecting the device. figure 4. example circuit for reverse current protection using a schottky diode 8.1.5 feed-forward capacitor (c ff ) for the adjustable-voltage version device, a feed-forward capacitor (c ff ) can be connected from the out pin to the fb pin. c ff improves transient, noise, and psrr performance, but is not required for regulator stability. recommended c ff values are listed in the recommended operating conditions table. a higher capacitance c ff can be used; however, the startup time increases. for a detailed description of c ff tradeoffs, see the pros and cons of using a feedforward capacitor with a low-dropout regulator application report. 8.1.6 power dissipation (p d ) circuit reliability requires consideration of the device power dissipation, location of the circuit on the printed circuit board (pcb), and correct sizing of the thermal plane. the pcb area around the regulator must have few or no other heat-generating devices that cause added thermal stress. to first-order approximation, power dissipation in the regulator depends on the input-to-output voltage difference and load conditions. equation 4 calculates power dissipation (p d ). p d = (v in ? v out ) i out (4) note power dissipation can be minimized, and therefore greater efficiency can be achieved, by correct selection of the system voltage rails. for the lowest power dissipation use the minimum input voltage required for correct output regulation. for devices with a thermal pad, the primary heat conduction path for the device package is through the thermal pad to the pcb. solder the thermal pad to a copper pad area under the device. this pad area must contain an array of plated vias that conduct heat to additional copper planes for increased heat dissipation. the maximum power dissipation determines the maximum allowable ambient temperature (t a ) for the device. according to equation 5 , power dissipation and junction temperature are most often related by the junction-to- ambient thermal resistance (r ja ) of the combined pcb and device package and the temperature of the ambient air (t a ). t j = t a + (r ja p d ) (5) thermal resistance (r ja ) is highly dependent on the heat-spreading capability built into the particular pcb design, and therefore varies according to the total copper area, copper weight, and location of the planes. the junction-to-ambient thermal resistance listed in the thermal information table is determined by the jedec standard pcb and copper-spreading area, and is used as a relative measure of package thermal performance. device in out gnd c out c in schottky diode internal body diode advance information
12 TPS7A26 sbvs290 ? december 2018 www.ti.com product folder links: TPS7A26 submit documentation feedback copyright ? 2018, texas instruments incorporated application information (continued) 8.1.7 estimating junction temperature the jedec standard now recommends the use of psi ( ) thermal metrics to estimate the junction temperatures of the linear regulator when in-circuit on a typical pcb board application. these metrics are not thermal resistance parameters and instead offer a practical and relative way to estimate junction temperature. these psi metrics are determined to be significantly independent of the copper area available for heat-spreading. the thermal information table lists the primary thermal metrics, which are the junction-to-top characterization parameter ( jt ) and junction-to-board characterization parameter ( jb ). these parameters provide two methods for calculating the junction temperature (t j ). as described in equation 6 , use the junction-to-top characterization parameter ( jt ) with the temperature at the center-top of device package (t t ) to calculate the junction temperature. as described in equation 7 , use the junction-to-board characterization parameter ( jb ) with the pcb surface temperature 1 mm from the device package (t b ) to calculate the junction temperature. t j = t t + jt p d where: ? p d is the dissipated power ? t t is the temperature at the center-top of the device package (6) t j = t b + jb p d where ? t b is the pcb surface temperature measured 1 mm from the device package and centered on the package edge (7) for detailed information on the thermal metrics and how to use them, see the semiconductor and ic package thermal metrics application report . 8.2 typical application figure 5. generating a 5-v rail from a multicell power bank 8.2.1 design requirements table 2 summarizes the design requirements for figure 5 . table 2. design parameters parameter design values v in 7.2 v v out 5 v 1% i (in) (no load) < 5 a i out (max) 330 ma t a 70 c (max) 8.2.2 detailed design procedure select a 5-v output, fixed or adjustable device to generate the 5-v rail. the fixed-version ldo has internal feedback divider resistors, and thus has lower quiescent current. the adjustable-version ldo requires external feedback divider resistors, and is described in the selecting feedback divider resistors section. TPS7A26 in en gnd fb out c in r 1 r 2 c out v in v out pg r pg v pg advance information
13 TPS7A26 www.ti.com sbvs290 ? december 2018 product folder links: TPS7A26 submit documentation feedback copyright ? 2018, texas instruments incorporated 8.2.2.1 transient response as with any regulator, increasing the output capacitor value reduces over- and undershoot magnitude, but increases transient response duration. 8.2.2.2 selecting feedback divider resistors for this design example, v out is set to 5 v. the following equations set the output voltage: v out = v fb (1 + r 1 / r 2 ) (8) r 1 + r 2 v out / (i fb 100) (9) for improved output accuracy, use equation 9 and i fb(typ) = 10 na as listed in the electrical characteristics table to calculate the upper limit for series feedback resistance, r 1 + r 2 5 m . the control-loop error amplifier drives the fb pin to the same voltage as the internal reference (v fb = 1.24 v as listed in the electrical characteristics table). use equation 8 to determine the ratio of r 1 / r 2 = 3.03. use this ratio and solve equation 9 for r 2 . now calculate the upper limit for r 2 1.24 m . select a standard value resistor of r 2 = 1.18 m . reference equation 8 and solve for r 1 : r 1 = (v out / v fb ? 1) r 2 (10) from equation 10 , r 1 = 3.64 m can be determined. select a standard resistor value for r 1 = 3.6 m . from equation 8 , select v out = 5.023 v. 8.2.2.3 thermal dissipation junction temperature can be determined using the junction-to-ambient thermal resistance (r ja ) and the total power dissipation (p d ). use equation 11 to calculate the power dissipation. multiply p d by r ja and add the ambient temperature (t a ), as equation 12 shows, to calculate the junction temperature (t j ). p d = (i gnd + i out ) (v in ? v out ) (11) t j = r ja p d + t a (12) equation 13 calculates the maximum ambient temperature. equation 14 calculates the maximum ambient temperature. t a(max) = t j(max) ? (r ja p d ) (13) t a(max) = 125 c ? [73.3 c/w (7.2 v ? 5 v) 0.33 a] = 71.8 c (14) advance information
14 TPS7A26 sbvs290 ? december 2018 www.ti.com product folder links: TPS7A26 submit documentation feedback copyright ? 2018, texas instruments incorporated 9 power supply recommendations the device is designed to operate with an input supply range of 2.4 v to 18 v. if the input supply is noisy, additional input capacitors with low esr can help improve output noise performance. 10 layout 10.1 layout guidelines ? place input and output capacitors as close to the device pins as possible ? use copper planes for device connections to optimize thermal performance ? place thermal vias around the device and under the drv thermal pad to distribute heat 10.2 layout examples figure 6. adjustable version layout example figure 7. fixed version layout example represents via used for application-specific connections en 4 65 1 23 v out v in gnd plane gnd c out c in pg gnd r pg advance information represents via used for application-specific connections en 4 65 1 23 fb v out v in gnd plane gnd c in r1 c out r pg pg gnd plane r2
15 TPS7A26 www.ti.com sbvs290 ? december 2018 product folder links: TPS7A26 submit documentation feedback copyright ? 2018, texas instruments incorporated (1) for the most current package and ordering information see the package option addendum at the end of this document, or visit the device product folder at www.ti.com . 11 device and documentation support 11.1 device support 11.1.1 device nomenclature table 3. device nomenclature (1) product v out TPS7A26 xx(x)yyyz xx(x) is the nominal output voltage. for output voltages with a resolution of 100 mv, two digits are used in the ordering number; for output voltages with a resolution of 50 mv, three digits are used (for example, 28 = 2.8 v; 125 = 1.25 v). 01 indicates adjustable output version. yyy is the package designator. z is the package quantity. r is for large quantity reel, t is for small quantity reel. 11.2 receiving notification of documentation updates to receive notification of documentation updates, navigate to the device product folder on ti.com. in the upper right corner, click on alert me to register and receive a weekly digest of any product information that has changed. for change details, review the revision history included in any revised document. 11.3 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 11.4 trademarks e2e is a trademark of texas instruments. all other trademarks are the property of their respective owners. 11.5 electrostatic discharge caution this integrated circuit can be damaged by esd. texas instruments recommends that all integrated circuits be handled with appropriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 11.6 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions. 12 mechanical, packaging, and orderable information the following pages include mechanical, packaging, and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser-based versions of this data sheet, refer to the left-hand navigation. advance information
package option addendum www.ti.com 20-dec-2018 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples pTPS7A2601drvr active wson drv 6 3000 tbd call ti call ti -40 to 125 (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) rohs: ti defines "rohs" to mean semiconductor products that are compliant with the current eu rohs requirements for all 10 rohs substances, including the requirement that rohs substance do not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, "rohs" products are suitable for use in specified lead-free processes. ti may reference these types of products as "pb-free". rohs exempt: ti defines "rohs exempt" to mean products that contain lead but are compliant with eu rohs pursuant to a specific eu rohs exemption. green: ti defines "green" to mean the content of chlorine (cl) and bromine (br) based flame retardants meet js709b low halogen requirements of <=1000ppm threshold. antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
generic package view images above are just a representation of the package family, actual package may vary. refer to the product data sheet for package details. drv 6 wson - 0.8 mm max height plastic small outline - no lead 4206925/f
important notice and disclaimer ti provides technical and reliability data (including datasheets), design resources (including reference designs), application or other design advice, web tools, safety information, and other resources ? as is ? and with all faults, and disclaims all warranties, express and implied, including without limitation any implied warranties of merchantability, fitness for a particular purpose or non-infringement of third party intellectual property rights. these resources are intended for skilled developers designing with ti products. you are solely responsible for (1) selecting the appropriate ti products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. these resources are subject to change without notice. ti grants you permission to use these resources only for development of an application that uses the ti products described in the resource. other reproduction and display of these resources is prohibited. no license is granted to any other ti intellectual property right or to any third party intellectual property right. ti disclaims responsibility for, and you will fully indemnify ti and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. ti ? s products are provided subject to ti ? s terms of sale ( www.ti.com/legal/termsofsale.html ) or other applicable terms available either on ti.com or provided in conjunction with such ti products. ti ? s provision of these resources does not expand or otherwise alter ti ? s applicable warranties or warranty disclaimers for ti products. mailing address: texas instruments, post office box 655303, dallas, texas 75265 copyright ? 2018, texas instruments incorporated

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