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  fn7430 rev 1.00 page 1 of 13 may 13, 2005 fn7430 rev 1.00 may 13, 2005 el5129, el5329 multi-channel buffers datasheet the el5129 and el5329 integrat e multiple gamma buffers and a single v com buffer for use in large panel lcd displays of 10 and greater. the el5129 integrates 6 gamma channels and the el5329 int egrates 10 gamma channels. half of the gamma channels i n each device a re designed to swing to the upper supply rail, with the other half designed to swing to the lower rail. the output capability of each channel is 10ma continuous, with 120ma peak. the gamma buffers feature a 10mhz 3db bandwidth specification and a 9v/s slew rate. the v com amplifier is designed to swing from rail to rail. the output current cap ability of the v com in the el5129 and el5329 is 30ma continuous, 150ma peak and a slew rate of 10v/s. features ? multiple gamma buffers - 6 channels (el5129) - 10 channels (el5329) ?single v com amplifier ? low supply current - 3.5ma (el5129) - 5.5ma (el5329) ? for higher speed or higher output power, see the el5x24 family ? pb-free available (rohs compliant) applications ?tft-lcd monitors ? lcd televisions ? industrial flat panel displays ordering information part number package tape & reel pkg dwg. # el5129ire 20-pin htssop - mdp0048 el5129ire-t7 20-pin htssop 7 mdp0048 EL5129IRE-T13 20-pin htssop 13 mdp0048 el5129irez (see note) 20-pin htssop (pb-free) - mdp0048 el5129irez-t7 (see note) 20-pin htssop (pb-free) 7 mdp0048 el5129irez-t13 (see note) 20-pin htssop (pb-free) 13 mdp0048 el5129irz (see note) 20-pin tssop (pb-free) - mdp0044 el5129irz-t7 (see note) 20-pin tssop (pb-free) 7 mdp0044 el5129irz-t13 (see note) 20-pin tssop (pb-free) 13 mdp0044 el5329irez (see note) 28-pin htssop (pb-free) - mdp0048 el5329irez-t7 (see note) 28-pin htssop (pb-free) 7 mdp0048 el5329irez-t13 (see note) 28-pin htssop (pb-free) 13 mdp0048 el5329irz (see note) 28-pin tssop (pb-free) - mdp0044 el5329irz-t7 (see note) 28-pin tssop (pb-free) 7 mdp0044 el5329irz-t13 (see note) 28-pin tssop (pb-free) 13 mdp0044 note: intersil pb-free products employ special pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termina tion finish, which are rohs compliant and compatible with both snpb and pb-free solder ing operations. intersil pb-free products are msl classified at pb-free peak re flow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020.
el5129, el5329 fn7430 rev 1.00 page 2 of 13 may 13, 2005 pinouts el5129 (20-pin tssop, htssop) top view el5329 (28-pin tssop, htssop) top view 1 2 3 4 16 15 14 13 5 6 7 12 11 9 8 10 20 19 18 17 vs+ out1 out2 out3 out4 out5 out5 nc outcom vs- vs+ in1 in2 in3 in4 in5 in6 nc incom vs- thermal pad* * thermal pad connect ed to pin 10 or 11 (v s -) 1 2 3 4 28 27 26 25 5 6 7 24 23 22 8 21 9 10 20 19 11 12 13 18 17 16 14 15 vs+ nc out1 out2 out3 out4 out5 out6 out7 out8 vs+ nc in1 in2 in3 in4 in5 in6 in7 in8 out9 out10 outcom vs- in9 in10 incom vs- thermal pad* * thermal pad connected to pin 14 or 15 (v s -)
el5129, el5329 fn7430 rev 1.00 page 3 of 13 may 13, 2005 note: all parameters having min/ max specifications are guarantee d. typ values are for information purposes only. unless otherwi se noted, all tests are at the specified temperature and are pulsed tests, therefor e: t j = t c = t a absolute maximum ratings (t a = 25c) supply voltage between v s + and v s - . . . . . . . . . . . . . . . . . . . .+18v input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . v s - -0.5v, v s + +0.5v maximum continuous output current (v out0-9 ) . . . . . . . . . . 15ma maximum continuous output current (v outa ). . . . . . . . . . . 100ma power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see curves maximum die temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125c storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c ambient operating temperature . . . . . . . . . . . . . . . .-4 0c to +85c caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. electrical specifications v s + = +15v, v s - = 0, r l = 10k ? , c l = 10pf to 0v, t a = 25c unless otherwise specified parameter description conditions min typ max unit input characteristics (reference buffers) v os input offset voltage v cm = 0v 2 20 mv tcv os average offset voltage drift (note 1) 5 v/ ? c i b input bias current v cm = 0v 2 50 na r in input impedance 10 m ? c in input capacitance 1.35 pf a v voltage gain 1v ?? v out ?? 14v 0.992 1.008 v/v cmir input voltage range el5129, in1 to in3 1.5 v s +v el5329, in1 to in5 1.5 v s +v el5129, in4 to in6 0 v s + -1.5 v el5329, in6 to in10 0 v s + -1.5 v input characteristics (v com buffer) v os input offset voltage v cm = 7.5v 1 20 mv tcv os average offset voltage drift (note 1) 3 v/ ? c i b input bias current v cm = 7.5v 2 50 na r in input impedance 10 m ? c in input capacitance 1.35 pf v reg load regulation v com = 7.5v, -60ma < i l < 60ma -20 +20 mv cmir com input voltage range v com 0v s +v output characteristics (reference buffers) v oh high output voltage - el5129 & el5329 (output 1) v in = 15v, i o = 5ma 14.85 14.9 v high output voltage - el5129 (output 2, 3), el5329 (output 2-5) 14.8 14.85 v high output voltage - el5129 (output 4-6), el5329 (output 6-10) v in = 13.5v, i o = 5ma 13.45 13.5 v v ol low output voltage - el5129 (output 1-3), el5329 (output 1-5) v in = 1.5v, i o = 5ma 1.5 1.55 v low output voltage - el5129 (output 4-5), el5329 (output 6-9) v in = 0v, i o = 5ma 150 200 mv low output voltage - el5129 (output 6), el5329 (output 10) 100 150 mv i sc short circuit current 100 120 ma
el5129, el5329 fn7430 rev 1.00 page 4 of 13 may 13, 2005 output characteristics (v com buffer) v oh high level saturated output voltage v s + = 15v, i o = -5ma, v i = 15v 14.85 14.9 v v ol low level saturated output voltage v s + = 15v, i o = -5ma, v i = 0v 0.1 0.15 v i sc short circuit current 150 170 ma power supply performance psrr power supply rejection ratio reference buffer v s from 5v to 15v 50 80 db v com buffer, v s from 5v to 15v 55 80 db i s total supply current el5129 3.5 4.5 ma el5329 5.5 7 ma dynamic performance (buffer amplifiers) sr slew rate (note 2) 59 v/s t s settling to +0.1% (a v = +1) (a v = +1), v o = 2v step 500 ns bw -3db bandwidth r l = 10k ? , c l = 10pf 10 mhz cs channel separation f = 5mhz 75 db el5129 & el5329 dynamic performance (v com amplifiers) sr slew rate (note 2) -4v ?? v out ?? 4v, 20% to 80% 7 10 v/s t s settling to +0.1% (a v = +1) (a v = +1), v o = 2v step 350 ns bw -3db bandwidth r l = 10k ? , c l = 10pf 15 mhz cs channel separation f = 5mhz 75 db notes: 1. measured over operating temperature range 2. slew rate is measured on rising and falling edges electrical specifications v s + = +15v, v s - = 0, r l = 10k ? , c l = 10pf to 0v, t a = 25c unless otherwise specified (continued) parameter description conditions min typ max unit
el5129, el5329 fn7430 rev 1.00 page 5 of 13 may 13, 2005 pin descriptions el5129 el5329 pin name pin function 1, 20 1, 28 vs+ positive supply voltage 2 3 out1 output gamma channel 1 3 4 out2 output gamma channel 2 4 5 out3 output gamma channel 3 5 6 out4 output gamma channel 4 6 7 out5 output gamma channel 5 7 8 out6 output gamma channel 6 8, 13 2, 27 nc no connect 9 13 outcom output, v com 10, 11 14, 15 vs- negative supply 12 16 incom input, v com 14 21 in6 input gamma channel 6 15 22 in5 input gamma channel 5 16 23 in4 input gamma channel 4 17 24 in3 input gamma channel 3 18 25 in2 input gamma channel 2 19 26 in1 input gamma channel 1 9 out7 output gamma channel 7 10 out8 output gamma channel 8 11 out9 output gamma channel 9 12 out10 output gamma channel 10 17 in10 input gamma channel 10 18 in9 input gamma channel 9 19 in8 input gamma channel 8 20 in7 input gamma channel 7
el5129, el5329 fn7430 rev 1.00 page 6 of 13 may 13, 2005 block diagram v com v s + column driver el5129 figure 1. frequency response for various r load (buffer) figure 2. frequency response for various c load (buffer) 100 1k 10k 100k 1m 10m 100m frequency (hz) gain (db) 5 3 1 -1 -3 -5 r l =150 ? r l =562 ? r l =1k ? v s =7.5v c l =10pf r l =10k ? ???? ??? ? ?
el5129, el5329 fn7430 rev 1.00 page 7 of 13 may 13, 2005 figure 3. large signal transient r esponse (buffer) figure 4. small signal transient response (buffer) figure 5. input noise special density vs frequency (buffer) figure 6. psrr vs frequency (buffer) figure 7. overshoot vs capacitance load (buffer) figure 8. frequen cy response for various r load (v com ) typical performance curves (continued) v s =7.5v r l =10k ? c l =8pf 1s/div 2v/div v in v out v s =7.5v r l =10k ? c l =8pf 100ns/div 50mv/div v in v out 10k 100k 1m 10m 100m frequency (hz) voltage noise (nv/ ? hz) 100 10 v s =7.5v 1k 10k 100k 1m 10m frequency (hz) psrr (db) 0 -60 psrr+ psrr- v s =7.5v r l =1k ? c l =1.5pf -20 -40 -80 20 v s =7.5v r l =10k ? v opp =1v 0 500 1k 1.5k 2k c load (pf) voltage noise (nv/ ? hz) 50 10 60 30 40 0 20 100 1k 10k 100k 1m 10m 100m frequency (hz) gain (db) 5 3 1 -1 -3 -5 r l =150 ? r l =562 ? r l =1k ? r l =10k ? v s =7.5v c l =10pf
el5129, el5329 fn7430 rev 1.00 page 8 of 13 may 13, 2005 figure 9. frequency response for various c load (v com ) figure 10. frequency response for various c load (v com ) figure 11. large sign al transient response (v com ) figure 12. small sign al transient response (v com ) figure 13. psrr vs frequency (v com ) figure 14. input noise special density vs frequency (v com ) typical performance curves (continued) 1k 10k 100k 1m 10m 100m 1g frequency (hz) gain (db) 10 6 2 -2 -6 -10 c l =12pf c l =47pf c l =100pf v s =7.5v r l =10k ? ???? ??? ? ? c l =47pf v s =7.5v r l =10k ? c l =8pf 1s/div 2v/div v in v out v s =7.5v r l =10k ? c l =8pf 100ns/div 50mv/div v in v out 1k 10k 100k 1m 10m frequency (hz) psrr (db) 0 -60 psrr+ psrr- v s =7.5v r l =1k ? c l =1.5pf -20 -40 -80 -20 10k 100k 1m 10m 100m frequency (hz) voltage noise (nv/ ? hz) 100 10 v s =7.5v
el5129, el5329 fn7430 rev 1.00 page 9 of 13 may 13, 2005 figure 15. overshoot vs capacitance load (v com ) figure 16. output impedance vs frequency figure 17. settling time vs step size figure 18. total harmonic di stortion vs output voltage figure 19. package power dissipation vs ambient temperature figure 20. package power dissipation vs ambient temperature typical performance curves (continued) v s =7.5v r l =10k ? v opp =1v 0 200 400 600 800 c load (pf) overshoot (%) 10 50 30 40 0 20 1k 10k 100k 1m 10m frequency (hz) output impedance ( ? ) 1k 100 10 1 0 buffer v s =5v v com v s =7.5v r l =10k ? c l =8pf 23456 step size (+v) settling time (ns) 300 800 500 600 200 400 700 buffer v com v s =5v a v =+1 r l =1k ? freq=200khz buffer v com 13 6810 v opp (v) thd (db) -70 0 -40 -20 -80 -60 -10 279 45 -50 -30 jedec jesd51-3 low effective thermal conductivity test board 1 0.9 0.6 0.4 0.3 0.2 0.1 0 0 255075100 150 ambient temperature (c) power dissipation (w) 85 0.8 0.5 0.7 125 909mw 714mw ? ja =110c/w htssop28 ? ja =120c/w tssop28 ? ja =125c/w htssop20 833mw 800mw ? ja =140c/w tssop20 jedec jesd51-7 high effective thermal conductivity test board - htssop exposed diepad soldered to pcb per jesd51-5 3.5 3 2.5 1.5 1 0.5 0 0 255075100 150 ambient temperature (c) power dissipation (w) 3.333w 2.857w 125 85 2 1.333w 1.111w ? ja =30c/w htssop28 ? ja =35c/w htssop20 ? ja =75c/w tssop28 ? ja =90c/w tssop20
el5129, el5329 fn7430 rev 1.00 page 10 of 13 may 13, 2005 description of operat ion and application information product description the el5129 and el5329 are fabricated using a high voltage cmos process. they exhibit ra il to rail input and output capability and have very low power consumption. when driving a load of 10k and 12pf , the buffers have a -3db bandwidth of 10mhz and e xhibit 9v/s slew rate. the v com amplifier has a -3db bandwidth of 12mhz and exhibit 10v/s slew rate. input, output, and supply voltage range the el5129 and el5329 are specified with a single nominal supply voltage from 5v to 15v o r a split supply with its total range from 5v to 15v. correct operation is gua ranteed for a supply range from 4.5v to 16.5v. the input common-mode volta ge range of t he el5129 and el5329 within 500mv beyond the supply rails. the output swings of the buffers and v com amplifier typically extend to within 100mv of the positive and negative supply rails with loa d currents of 5ma. decreasing load currents will extend the output voltage even closer to each supply rails. output phase reversal the el5129 and el5329 are immune to phase reversal as long as the input volt age is limited from v s - -0.5v to v s + +0.5v. although the device's output will not change phase, the input's over-voltage should be avoided. if an input voltage exceeds supply voltage by more than 0.6v, electrostatic protection diode placed in the input stage of the device begin to conduct and over-volt age damage could occur. output drive capability the el5129 and el5329 do not hav e internal short-circuit protection circuitry. the buffers will limit the short circuit current to 120ma and the v com amplifier will limit the short circuit current to 170ma if the outputs are directly s horted to the positive or the negative supply . if the output is shorted indefinitely, the power dissipation could easily increase such that the part will b e destroyed. maximum reliability is maintained if the output conti nuous current never exceeds 15ma for the buffers and 100ma for the v com amplifier. these limits are set by the design of the internal metal interconnections. the unused buffers it is recommended that any unu sed buffers should have their inputs tied to ground plane. power dissipation with the high-output drive capability of the el5129 and el5329, it is possible to exceed the 125c absolute-maximum junction temperature under certain load current conditions. therefore, it is important to ca lculate the maximum junction temperature for the application to determine if load conditions need to be modified for the buffer to remain in the safe operating area. the maximum power dissipation allowed in a package is determined according to: where: ?t jmax = maximum junction temperature ?t amax = maximum ambien t temperature ? ? ja = thermal resistance of the package ?p dmax = maximum power dissipation in the package the maximum power dissipation actually produced by an ic is the total quiescent supply curr ent times the total power supply voltage, plus the power in the ic due to the loads, or: when sourcing, and: when sinking. where: ? i = 1 to total number of buffers ?v s = total supply voltage of buffer and v com ?i smax = total quiescent current ?v out i = maximum output volt age of the application ?v out = maximum output voltage of v com ?i load i = load current of buffer ?i la = load current of v com if we set the two p dmax equations equal to each other, we can solve for the r load 's to avoid device ov erheat. the package power dissipation curves provide a convenient way to see if the device will overheat. the maximum safe power dissipation can be found graphically, based o n the package t ype and the ambient temperature. by using t he previous equation, it is a simple matter to see if p dmax exceeds the device's power derating curves. p dmax t jmax - t amax ? ja -------------------------------------------- - = ? iv s + ? ? v out i ? i load i ? v s + ? v out ? i la ? C + ? C ? + ? = ? iv ? out i ? v s - ? i load i ? v out ? v s - ? i la ? C + ? C ? + ? =
el5129, el5329 fn7430 rev 1.00 page 11 of 13 may 13, 2005 power supply bypassing and printed circuit board layout as with any high frequency device, good printed circuit board layout is necessary for optim um performance. ground plane construction is highly recommend ed, lead lengths should be as short as possible, and the power supply pins must be well bypassed to reduce the risk of o scillation. for normal single supply operation, where the v s - pin is connected to ground, one 0.1f ceramic capacitor s hould be placed from the v s + pin to ground. a 4.7f tantalu m capacitor should then be connected from the v s + pin to ground. o ne 4.7f capacitor may be used for mu ltiple devices. this same capacitor combination should be placed at each supp ly pin to ground if split supplies are to be used. important note: the metal plane used for heat sinking of the device is electrically conn ected to the negative supply potential (v s -). if v s - is tied to ground, the thermal pad can be connected to ground. otherwise, the thermal pad must be isolated from any other power planes.
el5129, el5329 fn7430 rev 1.00 page 12 of 13 may 13, 2005 tssop package outline drawing
fn7430 rev 1.00 page 13 of 13 may 13, 2005 el5129, el5329 intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description on ly. intersil may modify the circuit design an d/or specifications of products at any time without notice, provided that such modification does not, in intersil's sole judgment, affect the form, fit or function of the product. accordingly, the reader is cautioned to verify that datasheets are current before placing orders. information fu rnished by intersil is believed to be accu rate and reliable. however, no responsib ility is assumed by intersil or its subsidiaries for its use; nor for any infrin gements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com for additional products, see www.intersil.com/en/products.html ? copyright intersil americas llc 2005. all rights reserved. all trademarks and registered trademarks are the property of their respective owners. htssop package outline drawing note: the package drawing shown he re may not be the latest vers ion. to check the latest revisi on, please refer to the intersil website at


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