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unisonic technologies co., ltd l16b45a preliminary cmos ic www.unisonic.com.tw 1 of 12 copyright ? 2015 unisonic technologies co., ltd qw-r102-071.a 16-bit constant current led sink driver ? description the utc l16b45a is designed for led displays. utc l16b45a contains a serial buffer and data latches which convert serial input data into parallel output format. at utc l16b45a output stage, sixteen regulated current ports are designed to provide uniform and constant current sinks for driving leds within a large range of v f variations. utc l16b45a provides users with great flexibility and device performance while using utc l16b45a in their system design for led display applications, e.g. led panels. users may adjust the output current from 3ma to 45ma through an external resistor, r ext , which gives users flexibility in cont rolling the light intensity of leds. utc l16b45a guarantees to endure maximum 17v at the output port. the high clock frequency, 25mhz, also satisfies the system requirements of high volume data transmission. ? features * 16 constant-current output channels * constant output current inva riant to load voltage change constant output current range: 3~45ma @ v dd =5v 3~30ma @ v dd =3.3v * excellent output current accuracy: between channels: 2.5% (max.), between ics: 3.0% (max.) * output current adjusted through an external resistor * fast response of output current, oe (min.): 70ns @ v dd =3.3v * 25mhz clock frequency * schmitt trigger input * 3.3v/5v supply voltage * halogen free ? ordering information ordering number package packing L16B45AG-R24-R ssop-24 tape reel
l16b45a preliminary cmos ic unisonic technologies co., ltd 2 of 12 www.unisonic.com.tw qw-r102-071.a ? marking ? pin configuration ? pin description pin no. pin name description 1 gnd ground terminal for control logic and current sink 2 sdi serial-data input to the shift register 3 clk clock input terminal for data shift on rising edge 4 le data strobe input terminal serial data is transferred to the output latch when le is high. the data is latched when le goes low. 5~20 0 out ~ 15 out constant current output terminals 21 oe output enable terminal when (active) low, the output drivers are enabled; when high, all output drivers are turned off (blanked). 22 sdo serial-data output to the following sdi of next driver ic 23 r-ext input terminal used to connect an external re sistor for setting up output current for all output channels 24 v dd 3.5v/5v supply voltage terminal
l16b45a preliminary cmos ic unisonic technologies co., ltd 3 of 12 www.unisonic.com.tw qw-r102-071.a ? block diagram
l16b45a preliminary cmos ic unisonic technologies co., ltd 4 of 12 www.unisonic.com.tw qw-r102-071.a ? absolute maximum rating parameter symbol ratings unit supply voltage v dd 0~7.0 v input voltage v in -0.4~v dd +0.4 v output current i out +45 ma output voltage v ds -0.5~+17.0 v gnd terminal current i gnd 720 ma power dissipation (on pcb, t a =25c) p d 1.37 w thermal resistance (on pcb, t a =25c) ja 91 c/w junction temperature t j 150 c operating temperature t opr -40~+85 c storage temperature t stg -55~+150 c note: absolute maximum ratings are those values beyond which the device could be permanently damaged. absolute maximum ratings are stress ratings only and functional device oper ation is not implied. ? dc electrical characteristics (v dd =5.0v) parameter symbol test conditions min typ max unit supply voltage v dd 4.5 5.0 5.5 v output voltage v ds 0 out ~ 15 out 17.0 v i out dc test circuit 3 45 ma i oh sdo -1.0 ma output current i ol sdo 1.0 ma ?h? level v ih t a =-40~85c 0.7v dd v dd v input voltage ?l? level v il t a =-40~85c gnd 0.3v dd v output leakage current i oh v ds =17.0v 0.5 a v ol i ol =+1.0ma 0.4 v output voltage sdo v oh i oh =-1.0ma 4.6 v output current 1 i out1 v ds =1.0v, r ext =6000 ? 3.1 ma current skew di out1 i ol =3.1ma, v ds =1.0v, r ext =6000 ? 2.5 % output current 2 i out2 v ds =1.0v, r ext =720 ? 25.8 ma current skew di out2 i ol =25.8ma, v ds =1.0v, r ext =720 ? 2 % output current vs. output voltage regulation %/dv ds v ds =1.0~3.0v 0.1 %/v output current vs. supply voltage regulation %/dv dd v dd =4.5~5.5v 1.0 %/v pull-up resistor r in (up) oe 250 500 800 k ? pull-down resistor r in (down) le 250 500 800 k ? i dd (off) 1 r ext =open, 0 out ~ 15 out =off 2 2.8 ma i dd (off) 2 r ext =1240 ? , 0 out ~ 15 out =off 4 4.8 ma ?off? i dd (off) 3 r ext =620 ? , 0 out ~ 15 out =off 6 6.8 ma i dd (on) 1 r ext =1240 ? , 0 out ~ 15 out =on 5.2 8.2 ma supply current ?on? i dd (on) 2 r ext =620 ? , 0 out ~ 15 out =on 6.5 9.5 ma
l16b45a preliminary cmos ic unisonic technologies co., ltd 5 of 12 www.unisonic.com.tw qw-r102-071.a ? dc electrical characteristics (v dd =3.3v) parameter symbol test conditions min typ max unit supply voltage v dd 3.0 3.3 4.5 v output voltage v ds 0 out ~ 15 out 17.0 v i out dc test circuit 3 30 ma i oh sdo -1.0 ma output current i ol sdo 1.0 ma ?h? level v ih t a =-40~85c 0.7v dd v dd v input voltage ?l? level v il t a =-40~85c gnd 0.3v dd v output leakage current i oh v ds =17.0v 0.5 a v ol i ol =+1.0ma 0.4 v output voltage sdo v oh i oh =-1.0ma 2.9 v output current 1 i out1 v ds =1.0v, r ext =6000 ? 3.1 ma current skew di out1 i ol =3.1ma, v ds =1.0v, r ext =6000 ? 2.5 % output current 2 i out2 v ds =1.0v, r ext =720 ? 25.8 ma current skew di out2 i ol =25.8ma, v ds =1.0v, r ext =720 ? 2 % output current vs. output voltage regulation %/dv ds v ds =1.0~3.0v 0.1 %/v output current vs. supply voltage regulation %/dv dd v dd =3.0~3.6v 1.0 %/v pull-up resistor r in (up) oe 250 500 800 k ? pull-down resistor r in (down) le 250 500 800 k ? i dd (off) 1 r ext =open, 0 out ~ 15 out =off 1.7 2.3 ma i dd (off) 2 r ext =1851 ? , 0 out ~ 15 out =off 3.9 4.5 ma ?off? i dd (off) 3 r ext =748 ? , 0 out ~ 15 out =off 5.2 5.8 ma i dd (on) 1 r ext =1851 ? , 0 out ~ 15 out =on 3.9 5.0 ma supply current ?on? i dd (on) 2 r ext =748 ? , 0 out ~ 15 out =on 5.2 5.8 ma
l16b45a preliminary cmos ic unisonic technologies co., ltd 6 of 12 www.unisonic.com.tw qw-r102-071.a ? switching electrical characteristics (v dd =5.0v) parameter symbol test conditions min typ max unit clk- n 2 out 50 70 ns clk- 1 + n 2 out t plh1 35 55 ns le- n 2 out 50 70 ns le- 1 + n 2 out t plh2 35 55 ns oe - n 2 out 50 70 ns oe - 1 + n 2 out t plh3 35 55 ns propagation delay time (?l? to ?h?) clk-sdo t plh 20 40 ns clk- n 2 out 90 110 ns clk- 1 + n 2 out t phl1 75 95 ns le- n 2 out 90 110 ns le- 1 + n 2 out t phl2 75 95 ns oe - n 2 out 90 110 ns oe - 1 + n 2 out t phl3 75 95 ns propagation delay time (?h? to ?l?) clk-sdo t phl 20 40 ns clk t w(clk) 20 ns le t w(l) 20 ns pulse width oe t w(oe) 70 100 ns hold time for le t h(l) 30 ns setup time for le t su(l) 5 ns hold time for sdi t h(d) 5 ns setup time for sdi t su(d) 3 ns maximum clk rise time t r 500 ns maximum clk fall time t f 500 ns sdo rise time t r, sdo 10 ns sdi fall time t f, sdo 10 ns output rise time of i out t or 40 ns output fall time of i out t of v dd =5.0v, v ds =1.0v, v ih =v dd, v il =gnd r ext =930 ? , v l =4.5v, r l =162 ? , c l =10pf 55 ns
l16b45a preliminary cmos ic unisonic technologies co., ltd 7 of 12 www.unisonic.com.tw qw-r102-071.a ? switching electrical characteristics (v dd =3.3v) parameter symbol test conditions min typ max unit clk- n 2 out 50 70 ns clk- 1 + n 2 out t plh1 35 55 ns le- n 2 out 50 70 ns le- 1 + n 2 out t plh2 35 55 ns oe - n 2 out 50 70 ns oe - 1 + n 2 out t plh3 35 55 ns propagation delay time (?l? to ?h?) clk-sdo t plh 20 40 ns clk- n 2 out 115 135 ns clk- 1 + n 2 out t phl1 100 120 ns le- n 2 out 115 135 ns le- 1 + n 2 out t phl2 100 120 ns oe - n 2 out 105 125 ns oe - 1 + n 2 out t phl3 90 110 ns propagation delay time (?h? to ?l?) clk-sdo t phl 20 40 ns clk t w(clk) 20 ns le t w(l) 20 ns pulse width oe t w(oe) 100 130 ns hold time for le t h(l) 30 ns setup time for le t su(l) 5 ns hold time for sdi t h(d) 5 ns setup time for sdi t su(d) 3 ns maximum clk rise time t r 500 ns maximum clk fall time t f 500 ns sdo rise time t r, sdo 10 ns sdi fall time t f, sdo 10 ns output rise time of i out t or 40 ns output fall time of i out t of v dd =3.3v, v ds =1.0v, v ih =v dd, v il =gnd r ext =930 ? , v l =3.0v, r l =100 ? , c l =10pf 65 ns
l16b45a preliminary cmos ic unisonic technologies co., ltd 8 of 12 www.unisonic.com.tw qw-r102-071.a ? application information constant current to design led displays, utc l16b45a provides nearly no variations in current from channel to channel and from ic to ic. this can be achieved by: 1) the maximum current variation between channels is less than 2.5%, and that between ics is less than 3%. 2) in addition, the current characterist ic of output stage is flat and users can refer to the figure as shown below. the output current can be kept c onstant regardless of the variat ions of led forward voltages (v f ). this performs as a perfection of load regulation. adjusting output current the output current of each channel (i out ) is set by an external resistor, r ext . the relationship between i out and r ext is shown in the following figure. also, the output current can be calculated from the equation: v r-ext =1.24v; i out =v r-ext *( 1/rext )x15; r ext =(v r-ext /i out )x15 where r ext is the resistance of the external resi stor connected to r-ext terminal and v r-ext is the voltage of r-ext terminal. the magnitude of current (as a function of r ext ) is around 25ma at 744 ? and 10ma at 1860 ? .
l16b45a preliminary cmos ic unisonic technologies co., ltd 9 of 12 www.unisonic.com.tw qw-r102-071.a ? test circuit for dc electrical characteristics v ih , v il i ih , i il i dd v dd v dd oe clk le sdi i ref r-ext gnd out0 out15 sdo i out v ds ? test circuit for switching electrical characteristics
l16b45a preliminary cmos ic unisonic technologies co., ltd 10 of 12 www.unisonic.com.tw qw-r102-071.a ? timing diagram n=0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 d14 d15 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 sdi clk le oe out0 out1 out2 out3 out15 sdo don?t care d0 d1 d2 d15 d15 off on off on off on off on off on ? truth table clk le oe sdi 0 out ? 7 out ? 15 out sdo h l d n n d ?? 7 - n d ?. 15 - n d d n-15 l l d n+1 no change d n-14 h l d n+2 2 + n d ?? 5 - n d?. 13 - n d d n-13 x l d n+3 2 + n d ?? 5 - n d?. 13 - n d d n-13 x h d n+3 off d n-13
l16b45a preliminary cmos ic unisonic technologies co., ltd 11 of 12 www.unisonic.com.tw qw-r102-071.a ? timing waveform t w(oe 50% 50% 50% 50% 90% 10% 90% 10% t phl3 t plh3 t of t or oe outn
l16b45a preliminary cmos ic unisonic technologies co., ltd 12 of 12 www.unisonic.com.tw qw-r102-071.a ? equivalent circuits of inputs and outputs in v dd in v dd in v dd v dd out oe terminal terminal clk, sdi terminal le terminal sdo utc assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all utc products described or contained herein. utc products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.

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