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1 for more information www.linear.com/LTM8056 typical application features description 58v in , 48v out buck-boost module regulator the lt m ? 8056 is a 58v in , buck- boost module ? (micromodule) regulator. included in the package are the switching controller, power switches, inductor and support components. a resistor to set the switching frequency, a resistor divider to set the output voltage, and input and output capacitors are all that are needed to complete the design. other features such as input and output average current regulation may be implemented with just a few components. the LTM8056 operates over an input volt - age range of 5v to 58v, and can regulate output voltages between 1.2v and 48v. the sync input and clkout output allow easy synchronization. the LTM8056 is housed in a compact overmolded ball grid array (bga) package suitable for automated assembly by standard surface mount equipment. the LTM8056 is available with snpb or rohs compliant terminal finish. buck-boost selection table ltm8054 ltm8055 LTM8056 v in (operation) 36 36 58 v in abs max 40 40 60 v out abs max 40 40 60 i out (peak) 24v in , 12v out 5.4 8.5 5.5 package 15 11.25mm 3.42mm bga 15 15mm 4.92mm bga pin and function compatible 24v out from 7v in to 58v in buck-boost regulator applications n complete buck-boost switch mode power supply n wide input voltage range: 5v to 58v n 12v/1.7a output from 6v in n 12v/3.4a output from 12v in n 12v/5.4a output from 24v in n up to 96% efficient n adjustable input and output average current limits n input and output current monitors n parallelable for increased output current n wide output voltage range: 1.2v to 48v n selectable switching frequency: 100khz to 800khz n synchronization from 200khz to 700khz n 15mm 15mm 4.92mm bga package n high power battery-operated devices n industrial control n solar powered voltage regulator n solar powered battery charging l, lt , lt c , lt m , linear technology, the linear logo, module and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. max output current and efficiency vs v in v in sv in i in LTM8056 i out v out clkout i inmon i outmon fb run ctl ss sync comp rt 5.23k 8056 ta01a 22f 25v 33f 35v v out 24v 2.2f 100v 3 v in 7v to 58v 43.2k f sw = 525khz 100k gnd mode ll v in (v) 0 efficiency at max output current (%) max output current (a) 95 93 92 94 91 90 7 6 4 2 5 3 1 0 8056 ta01b 50 20 30 10 40 efficiency max output current ltm 8056 8056fa
2 for more information www.linear.com/LTM8056 pin configuration absolute maximum ratings v in , sv in , v out , run , i in , i out voltage ..................... 60 v fb , sync , ctl , mode voltage ................................... 6 v i inmon , i outmon voltage ............................................. 6 v ll voltage ................................................................. 15 v maximum junction temperature ( notes 2, 3) ....... 125 c storage temperature .............................. C55 c to 125 c peak solder reflow body temperature ................. 245 c (note 1) bank 2 v out a iout ll clkout rt fb ss mode sync comp ctl 1 11 10 9 8 7 6 5 4 3 2 k j l h g f e d c b bga package 121-lead (15mm 15mm 4.92mm) bank 1 gnd bank 3 v in top view sv in i in run i inmon i outmon gnd t jmax = 125c, ja = 16.4c/w, jcbottom = 5.35c/w, jctop = 15.3c/w, jb = 5.9c/w, weight = 2.8g, values determined per jedec jesd51-9, 51-12 order information part number ball finish part marking* package type msl rating temperature range (note 2) device finish code LTM8056ey#pbf sac305 (rohs) LTM8056y e1 bga 3 C40c to 125c LTM8056iy#pbf sac305 (rohs) LTM8056y e1 bga 3 C40c to 125c LTM8056iy snpb (63/37) LTM8056y e0 bga 3 C40c to 125c LTM8056 mpy #pbf sac305 (rohs) LTM8056y e1 bga 3 C55c to 125c LTM8056 mpy snpb (63/37) LTM8056y e0 bga 3 C55c to 125c consult marketing for parts specified with wider operating temperature ranges. *device temperature grade is indicated by a label on the shipping container. pad or ball finish code is per ipc/jedec j-std-609. ? terminal finish part marking: www.linear.com/leadfree ? recommended lga and bga pcb assembly and manufacturing procedures: www.linear.com/umodule/pcbassembly ? lga and bga package and tray drawings: www.linear.com/packaging http://www .linear.com/product/LTM8056#orderinfo ltm 8056 8056fa
3 for more information www.linear.com/LTM8056 electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. run = 1.5v unless otherwise noted. (note 2) parameter conditions min typ max units minimum input voltage v in = sv in l 5.0 v output dc voltage fb = v out through 100k i out = 0.1a, r fb = 100k/2.55k 1.2 48 v v output dc current v in = 6v, v out = 12v v in = 48v, v out = 12v 1.7 4 a a quiescent current into v in ( tied to sv in ) run = 0.3v (disabled) no load, mode = 0.3v (dcm) no load, mode = 1.5v (fcm) 0.1 8 45 1 30 100 a ma ma output voltage line regulation 5v < v in < 58v, i out = 1a 0.5 % output voltage load regulation v in = 12v, 0.1a < i out < 3.5a 0.5 % output rms voltage ripple v in = 24v, i out = 3a 25 mv switching frequency r t = 453k r t = 24.9k 100 800 khz khz voltage at fb pin l 1.188 1.176 1.212 1.220 v v run falling threshold LTM8056 stops switching l 1.15 1.25 v run hysteresis LTM8056 starts switching 25 mv run low threshold LTM8056 disabled 0.3 v run pin current run = 1v run = 1.6v 2 3 5 100 a na i in bias current 90 a input current sense threshold (i in -v in ) l 44 56 mv i out bias current 20 a output current sense threshold (v out -i out ) v ctl = open l 54.5 53 61.5 63 mv mv i inmon voltage LTM8056 in input current limit 0.96 1.04 v i outmon voltage LTM8056 in output current limit 1.14 1.26 v ctl input bias current v ctl = 0v 22 a ss pin current v ss = 0v 35 a clkout output high 10k to gnd 4 v clkout output low 10k to 5v 0.7 v sync input low threshold 0.3 v sync input high threshold 1.5 v sync bias current sync = 1v 11 a mode input low threshold 0.3 v mode input high threshold 1.5 v note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LTM8056e is guaranteed to meet performance specifications from 0c to 125c internal. specifications over the full C40c to 125c internal operating temperature range are assured by design, characterization and correlation with statistical process controls. the LTM8056i is guaranteed to meet specifications over the full C40c to 125c internal operating temperature range. the LTM8056mp is guaranteed to meet specifications over the full C55c to 125c internal operating temperature range. note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. note 3: the LTM8056 contains overtemperature protection that is intended to protect the device during momentary overload conditions. the internal temperature exceeds the maximum operating junction temperature when the overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. ltm 8056 8056fa
4 for more information www.linear.com/LTM8056 typical performance characteristics efficiency vs output current (12v out ) efficiency vs output current (18v out ) efficiency vs output current (24v out ) efficiency vs output current (36v out ) efficiency vs output current (48v out ) input current vs output current (3.3v out ) efficiency vs output current (3.3v out ) efficiency vs output current (5v out ) efficiency vs output current (8v out ) t a = 25c, unless otherwise noted. output current (a) 0 efficiency (%) 100 80 60 40 8056 g01 6 2 4 5v in 12v in 24v in output current (a) 0 efficiency (%) 100 80 60 40 8056 g02 6 2 4 5v in 12v in 22v in output current (a) 0 efficiency (%) 100 80 60 40 8056 g03 6 2 4 5v in 12v in 24v in output current (a) 0 efficiency (%) 100 80 90 70 8056 g04 2 4 6 5v in 12v in 24v in 36v in output current (a) 0 efficiency (%) 100 90 80 70 8056 g05 2 4 6 6v in 12v in 24v in 48v in output current (a) efficiency (%) 100 90 85 80 95 75 8056 g06 4 0 2 6 7v in 12v in 24v in 36v in 48v in output current (a) efficiency (%) 100 95 90 85 8056 g07 4 0 2 6 9v in 12v in 24v in 36v in 48v in output current (a) input current (a) 4 3 2 1 0 8056 g09 4 0 2 6 5v in 12v in 24v in output current (a) efficiency (%) 100 95 90 85 8056 g08 2 0 1 4 3 13v in 24v in 36v in 48v in ltm 8056 8056fa
5 for more information www.linear.com/LTM8056 typical performance characteristics input current vs output current (18v out ) input current vs output current (24v out ) input current vs output current (36v out ) input current vs output current (48v out ) maximum output current vs v in maximum output current vs v in input current vs output current (5v out ) input current vs output current (8v out ) input current vs output current (12v out ) t a = 25c, unless otherwise noted. output current (a) input current (a) 4 3 2 1 0 8056 g10 4 0 2 6 5v in 12v in 22v in output current (a) input current (a) 5 4 3 2 1 0 8056 g11 4 0 2 6 5v in 12v in 24v in output current (a) input current (a) 4 3 2 1 0 8056 g12 6 0 2 4 5v in 12v in 24v in 36v in output current (a) input current (a) 5 4 3 2 1 0 8056 g13 6 0 2 4 6v in 12v in 24v in 48v in output current (a) input current (a) 5 4 3 2 1 0 8056 g14 6 0 2 4 7v in 12v in 24v in 36v in 48v in output current (a) input current (a) 5 4 3 2 1 0 8056 g15 4 6 0 2 9v in 12v in 24v in 36v in 48v in output current (a) input current (a) 4 3 2 1 0 8056 g16 2.5 3.0 3.5 0 0.5 1.0 1.5 2.0 13v in 24v in 36v in 48v in v in (v) output current (a) 6 5 4 3 2 8056 g17 20 30 0 10 3.3v out 5v out 8v out v in (v) output current (a) 6 5 4 0 3 2 1 8056 g18 30 40 50 0 10 20 12v out 18v out 24v out ltm 8056 8056fa
6 for more information www.linear.com/LTM8056 typical performance characteristics temperature rise vs output current (8v out ) temperature rise vs output current (12v out ) temperature rise vs output current (18v out ) temperature rise vs output current (24v out ) temperature rise vs output current (36v out ) temperature rise vs output current (48v out ) maximum output current vs v in temperature rise vs output current (3.3v out ) temperature rise vs output current (5v out ) t a = 25c, unless otherwise noted. v in (v) output current (a) 6 4 2 0 8056 g19 20 30 40 50 0 10 36v out 48v out output current (a) temperature rise (c) 80 60 40 20 0 8056 g20 6 0 2 4 5v in 12v in 24v in output current (a) temperature rise (c) 100 80 60 40 20 0 8056 g21 6 0 2 4 5v in 12v in 22v in output current (a) temperature rise (c) 100 80 60 40 20 0 8056 g22 4 6 0 2 5v in 12v in 24v in output current (a) temperature rise (c) 100 80 60 40 20 0 8056 g23 4 6 0 2 5v in 12v in 24v in 36v in output current (a) temperature rise (c) 100 80 60 40 20 0 8056 g24 6 0 2 4 6v in 12v in 24v in 48v in output current (a) temperature rise (c) 100 80 60 40 20 0 8056 g25 6 0 2 4 7v in 12v in 24v in 36v in 48v in output current (a) temperature rise (c) 100 80 60 40 20 0 8056 g26 6 0 2 4 9v in 12v in 24v in 36v in 48v in output current (a) temperature rise (c) 100 80 60 40 20 0 8056 g27 4 0 1 2 3 13v in 24v in 36v in 48v in ltm 8056 8056fa
7 for more information www.linear.com/LTM8056 typical performance characteristics maximum output current vs ctl voltage dc2154a demo board,48v in soft-start waveforms for various c ss values 24v in , 3a resistive load, dc2154a demo board output ripple, stock dc2154a demo board, 24v out t a = 25c, unless otherwise noted. pin functions gnd (bank 1, pin l1): tie these gnd pins to a local ground plane below the LTM8056 and the circuit components. in most applications, the bulk of the heat flow out of the LTM8056 is through these pads, so the printed circuit design has a large impact on the thermal performance of the part. see the pcb layout and thermal considerations sections for more details. return the r fb1 /r fb2 feedback divider to this net. v out (bank 2): power output pins. apply output filter capacitors between these pins and gnd pins. v in (bank 3): input power. the v in pin supplies current to the LTM8056 s internal power switches and to one terminal of the optional input current sense resistor. this pin must be locally bypassed with an external, low esr capacitor; see table 1 for recommended values. i out (pin d1): output current sense. tie this pin to the output current sense resistor. the output average current sense threshold is 58mv, so the LTM8056 will regulate the output current to 58mv/r sense , where r sense is the value of the output current sense resistor in ohms. the load is powered through the sense resistor connected at this pin. tie this pin to v out if no output current sense resistor is used. keep this pin within 0.5v of v out under all conditions. ll (pin f1): light load indicator. this open drain pin indicates that the output current, as sensed through the resistor connected between v out and i out , is approxi - mately equivalent to 6mv or less. its state is meaningful only if a current sense resistor is applied between v out and i out . this is useful to change the switching behavior of the LTM8056 in light load conditions. sv in (pins f10, f11): controller power input. apply a separate voltage above 5v if the LTM8056 is required to operate when the main power input (v in ) is below 5v. bypass these pins with a high quality, low esr capacitor. if a separate supply is not used, connect these pins to v in . clkout (pin g1): clock output. use this pin as a clock source when synchronizing other devices to the switch - ing frequency of the LTM8056. when this function is not used, leave this pin open. mode (pin g2): switching mode input. the LTM8056 operates in forced continuous mode when mode is open, and can operate in discontinuous switching mode when mode is low. in discontinuous switching mode, the LTM8056 will block reverse inductor current. this pin is normally left open or tied to ll. this pin may be tied to gnd for the purpose of blocking reverse current if no output sense resistor is used. ctl voltage (v) output current (a) 4 3 2 1 0 8056 g28 1.4 0 0.4 0.7 1.1 v out 5v/div 8056 g29 500s/div c ss = 22nf c ss = 100nf c ss = 220nf 24v in , 3a load (buck-b00st), 100mv/div 48v in , 3a load (buck), 100mv/div 12v in , 1.5a load (b00st), 100mv/div measured across c17 on dc2154a with hp461 amplifier, 150mhz bandwidth 8056 g30 1s/div ltm 8056 8056fa
8 for more information www.linear.com/LTM8056 pin functions rt ( pin h 1): timing resistor. the rt pin is used to program the switching frequency of the LTM8056 by connecting a resistor from this pin to ground. the range of oscillation is 100khz to 800khz. the applications information section of the data sheet includes a table to determine the resistance value based on the desired switching frequency. minimize capacitance at this pin. a resistor to ground must be ap - plied under all circumstances. sync (pin h2): external synchronization input. the sync pin has an internal pull-down resistor. see the synchroni - zation section in applications information for details. tie this pin to gnd when not used. fb (pin j1): output voltage feedback. the LTM8056 regulates the fb pin to 1.2v. connect the fb pin to a resistive divider between the output and gnd to set the output voltage. see table 1 for recommended fb divider resistor values. comp (pin j2): compensation pin. the LTM8056 is equipped with internal compensation that works well with most applications. in some cases, the performance of the LTM8056 can be enhanced by modifying the control loop compensation by applying a capacitor or rc network to this pin. ss (pin k1): soft-start. connect a capacitor from this pin to gnd to increase the soft-start time. soft-start reduces the input power source s surge current by gradually in - creasing the controllers current limit. larger values of the soft-start capacitor result in longer soft-start times. if no soft-start is required, leave this pin open. ctl (pin k2): current sense adjustment. apply a voltage below 1.2v to reduce the current limit threshold of i out . drive ctl to less than about 50mv to stop switching. the ctl pin has an internal pull-up resistor to 2v. if not used, leave this pin open. i outmon (pin l2): output current monitor. this pin pro - duces a voltage that is proportional to the voltage between v out and i out . i outmon will equal 1.2v when v out C i out = 58mv. this feature is generally useful only if a current sense resistor is applied between v out and i out . this is a high impedance output. use a buffer to drive a load. i inmon ( pin l3): input current monitor. this pin produces a voltage that is proportional to the voltage between i in and v in . i inmon will equal 1v when i in -v in = 50 mv. this feature is generally useful only if a current sense resistor is applied between v in and i in . run ( pin l 4): LTM8056 enable. raise the run pin voltage above 1.2v for normal operation. above 1.2v (typical), but below 6v, the run pin input bias current is less than 1a. below 1.2v and above 0.3v, the run pin sinks 3a so the user can define the hysteresis with the external resis - tor selection. this will also reset the soft-start function. if run is 0.3v or less, the LTM8056 is disabled and the sv in quiescent current is below 1a. i in (pin l9): input current sense. tie this pin to the input current sense resistor. the input average current sense threshold is 50mv, so the LTM8056 will regulate the input current to 50mv/r sense , where r sense is the value of the input current sense resistor in ohms. tie to v in when not used. keep this pin within 0.5v of v in under all conditions. ltm 8056 8056fa
9 for more information www.linear.com/LTM8056 block diagram 0.2f 6.8h 0.1f 100v 0.1f ctl comp rt sync 100k 2v 100k i outmon 8056 bd i inmon clkout fb i out v out ss gnd run i in v in sv in buck-boost controller ll mode ltm 8056 8056fa
10 for more information www.linear.com/LTM8056 operation the LTM8056 is a standalone nonisolated buck-boost switching dc/dc power supply. the buck-boost topol - ogy allows the LTM8056 to regulate its output voltage for input voltages both above and below the magnitude of the output, and the maximum output current depends upon the input voltage. higher input voltages yield higher maximum output current. this converter provides a precisely regulated output volt - age programmable via an external resistor divider from 1.2v to 48v. the input voltage range is 5v to 58v, but the LTM8056 may be operated at lower input voltages if sv in is powered by a voltage source above 5v. a simplified block diagram is given on the previous page. the LTM8056 contains a current mode controller, power switching elements, power inductor and a modest amount of input and output capacitance. the LTM8056 is a fixed frequency pwm regulator. the switching frequency is set by connecting the appropriate resistor value from the rt pin to gnd. the output voltage of the ltm 8056 is set by connecting the fb pin to a resistor divider between the output and gnd. in addition to regulating its output voltage, the LTM8056 is equipped with average current control loops for both the input and output. add a current sense resistor between i in and v in to limit the input current below some maximum value. the i inmon pin reflects the current flowing though the sense resistor between i in and v in . a current sense resistor between v out and i out allows the LTM8056 to accurately regulate its output current to a maximum value set by the value of the sense resistor. in general, the LTM8056 should be used with an output sense resistor to limit the maximum output current, as buck-boost regulators are capable of delivering large cur- rents when the output voltage is lower than the input, if demanded. furthermore, while the LTM8056 does not require an output sense resistor to operate, it uses information from the sense resistor to optimize its performance . if an out- put sense resistor is not used, the efficiency or output ripple may degrade, especially if the current through the integrated inductor is discontinuous. in some cases, an output sense resistor is required to adequately protect the LTM8056 against output overload or short- circuit. a voltage less than 1.2v applied to the ctl pin reduces the maximum output current if an output current sense resistor is used. drive ctl to less than about 50mv to stop switching. the current flowing through the sense resistor is reflected by the output voltage of the i outmon pin. driving the sync pin will synchronize the LTM8056 to an external clock source . the clkout pin sources a signal that is the same frequency but approximately 180 out of phase with the internal oscillator. if more output current is required than a single LTM8056 can provide, multiple devices may be operated in parallel. refer to the parallel operation section of applications information for more details. an internal regulator provides power to the control circuitry and the gate driver to the power mosfets . this internal regulator draws power from the sv in pin. the run pin is used to place the LTM8056 in shutdown, disconnecting the output and reducing the input current to less than 1a. the LTM8056 is equipped with a thermal shutdown that inhibits power switching at high junction temperatures. the activation threshold of this function is above 125c to avoid interfering with normal operation, so prolonged or repetitive operation under a condition in which the thermal shutdown activates may damage or impair the reliability of the device. ltm 8056 8056fa
11 for more information www.linear.com/LTM8056 applications information for most applications, the design process is straight for- ward, summarized as follows: 1. look at table 1 and find the row that has the desired input range and output voltage. 2. apply the recommended c in , c out , r fb1 /r fb2 and r t values. 3. apply the output sense resistor to set the output current limit. the output current is limited to 58mv/r sense , where r sense is the value of the output current sense resistor in ohms. while these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. bear in mind that the maximum output current is limited by junction temperature, the rela - tionship between the input and output voltage magnitude and other factors. please refer to the graphs in the typical performance characteristics section for guidance. the maximum frequency (and attendant r t value) at which the LTM8056 should be allowed to switch is given in table 1 in the f max column, while the recommended frequency (and r t value) for optimal efficiency over the given input condition is given in the f optimal column. there are additional conditions that must be satisfied if the synchronization function is used. please refer to the synchronization section for details. note that table 1 calls out both ceramic and electrolytic output capacitors. both of the capacitors called out in the table must be applied to the output. the electrolytic capacitors in table 1 are described by voltage rating, value and esr. the voltage rating of the capacitor may be increased if the application requires a higher voltage stress derating. the LTM8056 can tolerate variation in the esr; other capacitors with different esr may be used, but the user must verify proper operation over line, load and environmental conditions. table 2 gives the description and part numbers of electrolytic capacitors used in the LTM8056 development testing and design validation. table 1. recommended component values and configuration (t a = 25c) v in range v out c in c out r fb1 /r fb2 f optimal (khz) r t( optimal) f max (khz) r t(max) 5v to 24v 3.3v 2 4.7f, 50v, 0805 22f, 6.3v, x5r, 0805 100f, 6v, 75m, electrolytic 100k/56.2k 650 31.6k 800 24.9k 5v to 22v 5v 2 4.7f, 50v, 0805 22f, 6.3v, x5r, 0805 100f, 6v, 75m, electrolytic 100k/31.6k 450 53.6k 800 24.9k 5v to 28v 8v 2 4.7f, 50v, 0805 22f, 10v, x7r, 1206 100f, 16v, 100m, electrolytic 100k/17.4k 500 45.3k 800 24.9k 5v to 41v 12v 2 4.7f, 50v, 0805 22f, 25v, x5r, 0805 68f, 16v, 200m, electrolytic 100k/11k 650 31.6k 800 24.9k 5.8v to 58v 18v 3 2.2f, 100v, 1206 22f, 25v, x5r, 0805 47f, 25v, 900m, electrolytic 100k/6.98k 650 31.6k 800 24.9k 7v to 58v 24v 3 2.2f, 100v, 1206 22f, 25v, x5r, 0805 33f, 35v 300m, electrolytic 100k/5.23k 525 43.2k 800 24.9k 8.5v to 58v 36v 3 2.2f, 100v, 1206 10f, 50v, x5r, 1206 10f, 50v 120m, electrolytic 100k/3.40k 500 45.3k 800 24.9k 12.5v to 58v 48v 3 2.2f, 100v, 1206 10f, 50v, x5r, 1206 10f, 63v 120m, electrolytic 100k/2.55k 475 49.9k 800 24.9k notes: an input bulk capacitor is required. the output capacitance uses a combination of a ceramic and electrolytic in parallel. other combinations of resistor values for the rfb network are acceptable. ltm 8056 8056fa
12 for more information www.linear.com/LTM8056 applications information capacitor selection considerations the c in and c out capacitor values in table 1 are the minimum recommended values for the associated oper - ating conditions. applying capacitor values below those indicated in table 1 is not recommended, and may result in undesirable operation. using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary . again, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. ceramic capacitors are small, robust and have very low esr. however, not all ceramic capacitors are suitable. x5r and x7r types are stable over temperature and ap - plied voltage and give dependable service . other types, including y5v and z5u have very large temperature and voltage coefficients of capacitance. in an application cir - cuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. a final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LTM8056. a ceramic input capacitor combined with trace or cable inductance forms a high q (underdamped) tank circuit . if the LTM8056 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possi - bly exceeding the devices rating. this situation is easily avoided; see the hot-plugging safely section. frequency selection the LTM8056 uses a constant frequency pwm architec - ture that can be programmed to switch from 100khz to 800khz by tying a resistor from the rt pin to ground. table 3 provides a list of r t resistor values and their re- sultant frequencies. table 3. switching frequency vs r t value frequency r t value (k) 100 453 200 147 300 84.5 400 59 500 45.3 600 36.5 700 29.4 800 24.9 an external resistor within the range stated in table 3 from rt to gnd is required. even when synchronizing to an external clock. when synchronizing the switching of the LTM8056 to an external signal source , the frequency range is 200khz to 700khz. operating frequency trade-offs it is recommended that the user apply the optimal r t value given in table 1 for the input and output operating condition. system level or other considerations, however, may necessitate another operating frequency. while the LTM8056 is flexible enough to accommodate a wide range of operating frequencies, a haphazardly chosen one may result in undesirable operation under certain operating or fault conditions. a frequency that is too high can reduce efficiency, generate excessive heat or even damage the table 2. electrolytic caps used in LTM8056 testing description manufacturer part number 100f, 6v, 75m, tantalum c case avx tpsc107m006r0075 100f, 16v, 100m, tantalum y case avx tpsy107m016r0100 68f, 16v, 200m, tantalum c case avx tpsc686m016r0200 47f, 25v, 900m, tantalum d case avx tajd 476m025r 33f, 35v, 300m, tantalum d case avx tpsd336m035r0300 10f, 50v, 120m, aluminum 6.3 6mm case suncon 50hvp10m 10f, 63v, 120m, aluminum 6.3 5.8mm case panasonic eehza1j100p ltm 8056 8056fa
13 for more information www.linear.com/LTM8056 applications information LTM8056 if the output is overloaded or short circuited . a frequency that is too low can result in a final design that has too much output ripple or too large of an output capacitor or is even unstable. parallel operation tw o or more LTM8056s may be combined to provide increased output current by configuring them as a mas - ter and a slave, as shown in figure 1. each LTM8056 is equipped with an i outmon and a ctl pin. the i outmon pins 0v to 1.2v signal reflects the current passing through the output sense resistor, while a voltage less than 1.2v applied to the ctl pin will limit the current passing through the output sense resistor. by applying the voltage of the masters i outmon pin to the slaves ctl pin, the two units will source the same current to the load, assuming each LTM8056 output current sense resistor is the same value. 2. apply a fb resistor network to the individual slaves so that the resulting output is higher than the desired output voltage. 3. apply the appropriate output current sense resistors between v out and i out . if the same value is used for the master and slave units, they will share current equally. 4. connect the master i outmon to the slaves ctl pin through a unity gain buffer. the unity gain buffer is required to isolate the output impedance of the LTM8056 from the integrated pull-up on the ctl pins. 5. tie the outputs together. note that this configuration does not require the inputs to be tied together, making it simple to power a single heavy load from multiple input sources . ensure that each input power source has sufficient voltage and current sourcing capability to provide the necessary power. please refer to the maximum output current vs v in and input current vs output current curves in the typical performance characteristics section for guidance. paralleled LTM8056s should normally be allowed to switch in discontinuous mode enabled to prevent current from flowing from the output of one unit into another; that is, the mode pin should be tied to ll. in some cases, operat - ing the master in forced continuous (mode open) and the slaves in discontinuous mode (mode = ll) is desirable. if so, current from the output can flow into the masters input. please refer to input precaution in this section for a discussion of this behavior. minimum input voltage and run the LTM8056 needs a minimum of 5v for proper opera - tion, but system parameters may dictate that the device operate only above some higher input voltage. for ex- ample, a LTM8056 may be used to produce 12v out , but the input power source may not be budgeted to provide enough current if the input supply voltage is below 8v. the run pin has a typical falling voltage threshold of 1.2v and a typical hysteresis of 25mv. in addition, the pin sinks 3a below the run threshold. based upon the figure 1. tw o or more LTM8056s may be connected in a master/slave configuration for increased output current i out master i outmon output current sense resistor to load v out i out ctl slave v out unity gain buffer 8056 f01 output current sense resistor the design of a master-slave configuration is straight- forward : 1. apply the fb resistor network to the master, choosing the proper values for the desired output voltage. sug - gested values for popular output voltages are provided in table 1. ltm 8056 8056fa
14 for more information www.linear.com/LTM8056 above information and the circuit shown in figure 2, the v in rising (turn-on) threshold is: v i n = 3a ? r 1 ( ) + 1.225v r 1 + r 2 r 2 and the v in falling turn-off threshold is: v i n = 1.2 r 1 + r 2 r 2 when the voltage v out -i out reaches 58mv. the current limit is: i o u t ( l i m ) = 58m v r s e n s e where r sense is the value of the sense resistor in ohms. most applications should use an output sense resistor as shown in figure 3, if practical. the internal buck-boost power stage is current limited, but is nonetheless capable of delivering large amounts of current in an overload condition, especially when the output voltage is much lower than the input and the power stage is operating as a buck converter. applications information run LTM8056 v in r1 r2 8056 f02 figure 2. this simple resistor network sets the minimum operating input voltage threshold with hysteresis i out LTM8056 v out r sense 8056 f03 load figure 3. set the LTM8056 output current limit with an external sense resistor minimum input voltage and sv in the minimum input voltage of the LTM8056 is 5v, but this is only if v in and sv in are tied to the same voltage source . if sv in is powered from a power source at or above 5vdc, v in can be allowed to fall below 5v and the LTM8056 can still operate properly. some examples of this are provided in the typical applications section. soft-start soft- start reduces the input power sources surge currents by gradually increasing the controller s current. as indicated in the block diagram, the LTM8056 has an internal soft- start rc network. depending upon the load and operating conditions, the internal network may be sufficient for the application. to increase the soft-start time, simply add a capacitor from ss to gnd. output current limit (i out ) the LTM8056 features an accurate average output current limit set by an external sense resistor placed between v out and i out as shown in figure 3. v out and i out internally connect to a differential amplifier that limits the current when the voltage across the output sense resistor falls to about 1/10 th of full scale, the ll pin pulls low. if there is no output sense resistor, and i out is tied to v out , ll will be active low. applying an output sense resistor and tying the ll and mode pins together can improve perfor - mancesee switching mode in this section. in high step-down voltage regulator applications, the internal current limit can be quite high to allow proper operation. this can potentially damage the LTM8056 in overload or short- circuit conditions. apply an output current sense resistor to set an appropriate current limit to protect the LTM8056 against these fault conditions. output current limit control (ctl) use the ctl input to reduce the output current limit from the value set by the external sense resistor applied between v out and i out . the typical control range is between 0v and 1.2v. the ctl pin does not directly affect the input ltm 8056 8056fa
15 for more information www.linear.com/LTM8056 current limit. if this function is not used, leave ctl open. drive ctl to less than about 50mv to stop switching. the ctl pin has an internal pull-up resistor to 2v. input current limit (i in ) some applications require that the LTM8056 draw no more than some predetermined current from the power source . current limited power sources and power sharing are two examples. the LTM8056 features an accurate input current limit set by an external sense resistor placed between i in and v in as shown in figure 4. v in and i in internally connect to a differential amplifier that limits the current when the voltage i in -v in reaches 50mv. the current limit is: i i n ( l i m ) = 50m v r s e n s e where r sense is the value of the sense resistor in ohms. if input current limiting is not required, simply tie i in to v in . synchronization the LTM8056 switching frequency can be synchronized to an external clock using the sync pin. driving sync with a 50% duty cycle waveform is a good choice, otherwise maintain the duty cycle between about 10% and 90%. when synchronizing, a valid resistor value (that is, a value that results in a free-running frequency of 100khz to 800khz) must be connected from rt to gnd. while an rt resistor is required for proper operation, the value of this resistor is independent of the frequency of the externally applied sync signal. be aware, however, that the LTM8056 will switch at the frequency prescribed by the rt value if the sync signal terminates, so choose an appropriate resistor value. clkout the clkout signal reflects the internal switching clock of the ltm 8056 . it is phase shifted by approximately 180 with respect to the leading edge of the internal clock. if clkout is connected to the sync input of another LTM8056, the two devices will switch about 180 out of phase. input precaution in applications where the output voltage is deliberately pulled up above the set regulation voltage or the fb pin is abruptly driven to a new voltage, the LTM8056 may attempt to regulate the voltage by removing energy from the load for a short period of time after the output is pulled up. since the LTM8056 is a synchronous switching converter, it delivers this energy to the input. if there is nothing on the LTM8056 input to consume this energy, the input voltage may rise. if the input voltage rises without intervention , it may rise above the absolute maximum rating, damaging the part. carefully examine the input voltage behavior to see if the application causes it to rise. in many cases, the system load on the LTM8056 input bus will be sufficient to absorb the energy delivered by the module regulator. the power required by other devices will consume more than enough to make up for what applications information figure 4. set the LTM8056 input current limit with an external sense resistor i in LTM8056 r sense v in power source 8056 f04 input current monitor (i inmon ) the i inmon pin produces a voltage equal to approximately 20 times the voltage of i in -v in . since the LTM8056 input current limit engages when i in -v in = 50mv, i inmon will be 1v at maximum input current. output current monitor (i outmon ) the i outmon pin produces a voltage proportional to the voltage of v out -i out . since the LTM8056 output current limit engages when v out -i out = 58mv, i outmon will be 1.2v at maximum output current. ltm 8056 8056fa
16 for more information www.linear.com/LTM8056 the LTM8056 delivers. in cases where the LTM8056 is the largest or only power converter, this may not be true and some means may need to be devised to prevent the LTM8056s input from rising too high. figure 5a shows a passive crowbar circuit that will dissipate energy during momentary input overvoltage conditions. the break- down voltage of the zener diode is chosen in conjunction with the resistor r to set the circuit s trip point. the trip point is typically set well above the maximum v in voltage under normal operating conditions. this circuit does not have a precision threshold, and is subject to both part-to-part and temperature variations, so it is most suitable for ap - plications where the maximum input voltage is much less than the 60v in absolute maximum. as stated earlier, this type of circuit is best suited for momentary overvoltages . figure 5a is a crowbar circuit , which attempts to prevent the input voltage from rising above some level by dumping energy to gnd through a power device. in some cases, it is possible to simply turn off the LTM8056 when the input voltage exceeds some threshold. an example of this circuit is shown in figure 5b. when the power source on the output drives v in above a predetermined threshold, the comparator pulls down on the run pin and stops switching in the LTM8056. when this happens, the input capacitance needs to absorb the energy stored within the LTM8056s internal inductor, resulting in an additional voltage rise. this voltage rise depends upon the input capacitor size and how much current is flowing from the LTM8056 output to input. switching mode the mode pin allows the user to select either discontinuous mode or forced continuous mode switching operation. in forced continuous mode, the LTM8056 will not skip cycles, even when the internal inductor current falls to zero or even reverses direction. this has the advantage of operating at the same fixed frequency for all load conditions, which can be useful when designing to emi or output noise speci - fications. forced continuous mode, however, uses more current at light loads, and allows current to flow from the load back into the input if the output is raised above the regulation point. this reverse current can raise the input voltage and be hazardous if the input is allowed to rise uncontrollably. please refer to input precautions in this section for a discussion of this behavior. forced continuous operation may provide improved output regulation when the LTM8056 transitions from buck, buck-boost or boost operating modes, especially at lighter loads. in such a case, it can be desirable to oper - ate in forced continuous mode except when the internal inductor current is about to reverse. if so, apply a current sense resistor between v out and i out and tie the ll and mode pins together. the ll pin is low when the current through the output sense resistor is about one-tenth the full-scale maximum. when the output current falls to this level, the ll pin will pull the mode pin down, putting the LTM8056 in discontinuous mode, preventing reverse cur - rent from flowing from the output to the input. in the case applications information v in zener diode r q 8056 f05a LTM8056 load current gnd v out sourcing load v in run 8056 f05b 10f LTM8056 load current gnd v out sourcing load external reference voltage + ? figure 5a. the mosfet q dissipates momentary energy to gnd. the zener diode and resistor are chosen to ensure that the mosfet turns on above the maximum v in voltage under normal operation figure 5b. this comparator circuit turns off the LTM8056 if the input rises above a predetermined threshold. when the LTM8056 turns off, the energy stored in the internal inductor will raise v in a small amount above the threshold ltm 8056 8056fa
17 for more information www.linear.com/LTM8056 where mode and ll are tied together, a small capacitor (~0.1f) from these pins to gnd may improve the light load transient response by delaying the transition from the discontinuous to forced continuous switching modes. mode may be tied to gnd for the purpose of blocking reverse current if no output current sense resistor is used. fb resistor divider and load regulation the LTM8056 regulates its fb pin to 1.2v, using a resistor divider to sense the output voltage. the location at which the output voltage is sensed affects the load regulation. if there is a current sense resistor between v out and i out , and the output is sensed at v out , the voltage at the load will drop by the value of the current sense resistor multiplied by the output current. if the output voltage can be sensed at i out , the load regulation may be improved. pcb layout most of the headaches associated with pcb layout have been alleviated or even eliminated by the high level of integration of the LTM8056. the LTM8056 is neverthe - less a switching power supply, and care must be taken to minimize emi and ensure proper operation. even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. see figure 6 for a suggested layout. ensure that the grounding and heat sinking are acceptable. a few rules to keep in mind are: 1. place the r fb and r t resistors as close as possible to their respective pins. 2. place the c in capacitor as close as possible to the v in and gnd connection of the LTM8056. 3. place the c out capacitor as close as possible to the v out and gnd connection of the LTM8056. 4. minimize the trace resistance between the optional output current sense resistor, r out , and v out . minimize the loop area of the i out trace and the trace from v out to r out . 5. minimize the trace resistance between the optional input current sense resistor (r in ) and v in . minimize the loop area of the i in trace and the trace from v in to r in . 6. place the c in and c out capacitors such that their ground current flow directly adjacent or underneath the LTM8056. 7. connect all of the gnd connections to as large a copper pour or plane area as possible on the top layer. avoid breaking the ground connection between the external components and the LTM8056. 8. use vias to connect the gnd copper area to the boards internal ground planes. liberally distribute these gnd vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. pay attention to the location and density of the thermal vias in figure 6. the LTM8056 can benefit from the heat sinking afforded by vias that connect to internal gnd planes at these locations, due to their proximity to internal power handling components. the optimum number of thermal vias depends upon the printed circuit board design. for example, a board might use very small via holes. it should employ more thermal vias than a board that uses larger holes. hot-plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of the LTM8056. however, these capaci - tors can cause problems if the LTM8056 is plugged into a live supply (see linear technology application note ?88 for a complete discussion). the low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit , and the volt - age at the v in pin of the LTM8056 can ring to more than twice the nominal input voltage, possibly exceeding the ltm 8056 s rating and damaging the part . if the input supply applications information ltm 8056 8056fa
18 for more information www.linear.com/LTM8056 is poorly controlled or the LTM8056 is hot-plugged into an energized supply, the input network should be designed to prevent this overshoot. this can be accomplished by installing a small resistor in series with v in , but the most popular method of controlling input voltage overshoot is to add an electrolytic bulk capacitor to the v in net. this capacitors relatively high equivalent series resistance damps the circuit and eliminates the voltage overshoot. the extra capacitor improves low frequency ripple filter - ing and can slightly improve the efficiency of the circuit , though it is likely to be the largest component in the circuit . thermal considerations the LTM8056 output current may need to be derated if it is required to operate in a high ambient temperature or deliver a large amount of continuous power. the amount of current derating is dependent upon the input voltage, output power and ambient temperature. the temperature rise curves given in the typical performance character - istics section can be used as a guide. these curves were generated by a LTM8056 mounted to a 58cm 2 4-layer fr4 printed circuit board. boards of other sizes and layer count applications information figure 6. layout showing suggested external components, gnd plane and thermal vias to v out gnd gnd/thermal vias gnd input r in input sense 8056 f06 c out v out v in c in sv in ll rt mode sync run fb i in r out output sense i out i out ltm 8056 8056fa
19 for more information www.linear.com/LTM8056 applications information can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended system s line, load and environmental operating conditions. the thermal resistance numbers listed in the pin configura - tion of the data sheet are based on modeling the module package mounted on a test board specified per jesd 51-9 ( test boards for area array surface mount package thermal measurements). the thermal coefficients provided on this page are based on jesd 51-12 (guidelines for reporting and using electronic package thermal information). for increased accuracy and fidelity to the actual application, many designers use fea to predict thermal performance . to that end, the pin configuration of the data sheet typi - cally gives four thermal coefficients: ja C thermal resistance from junction to ambient. jcbottom C thermal resistance from junction to the bottom of the product case. jctop C thermal resistance from junction to top of the product case. jb C thermal resistance from junction to the printed circuit board. while the meaning of each of these coefficients may seem to be intuitive, jedec has defined each to avoid confusion and inconsistency. these definitions are given in jesd 51-12, and are quoted or paraphrased below: ja is the natural convection junction- to- ambient air thermal resistance measured in a one cubic foot sealed enclosure. this environment is sometimes referred to as still air although natural convection causes the air to move. this value is determined with the part mounted to a jesd 51-9 defined test board, which does not reflect an actual application or viable operating condition. jcbottom is the thermal resistance between the junction and bottom of the package with all of the component power dissipation flowing through the bottom of the package. in the typical module converter, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient environment. as a result, this thermal resistance value may be useful for comparing packages but the test conditions dont generally match the users application. jctop is determined with nearly all of the component power dissipation flowing through the top of the package. as the electrical connections of the typical module converter are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junc - tion to the top of the part . as in the case of jcbottom , this value may be useful for comparing packages but the test conditions dont generally match the users application. jb is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the module converter and into the board, and is really the sum of the jcbottom and the thermal resistance of the bottom of the part through the solder joints and through a portion of the board. the board temperature is measured a specified distance from the package, using a 2-sided, 2-layer board. this board is described in jesd 51-9. given these definitions, it should now be apparent that none of these thermal coefficients reflects an actual physical operating condition of a module converter. thus, none of them can be individually used to accurately predict the thermal performance of the product. likewise, it would be inappropriate to attempt to use any one coefficient to correlate to the junction temperature versus load graphs given in the products data sheet. the only appropriate way to use the coefficients is when running a detailed thermal analysis, such as fea, which considers all of the thermal resistances simultaneously. ltm 8056 8056fa
20 for more information www.linear.com/LTM8056 a graphical representation of these thermal resistances is given in figure 7. the blue resistances are contained within the module converter, and the green are outside. the die temperature of the LTM8056 must be lower than the maximum rating of 125c, so care should be taken in the layout of the circuit to ensure good heat sinking of the LTM8056. the bulk of the heat flow out of the LTM8056 is through the bottom of the module converter and the bga pads into the printed circuit board. consequently a poor printed circuit board design can cause excessive heating, resulting in impaired performance or reliability. please refer to the pcb layout section for printed circuit board design suggestions. 8056 f07 module converter junction-to-case (top) resistance junction-to-board resistance junction-to-ambient resistance (jesd 51-9 defined board) case (top)-to-ambient resistance board-to-ambient resistance junction-to-case (bottom) resistance junction ambient case (bottom)-to-board resistance figure 7 applications information ltm 8056 8056fa
21 for more information www.linear.com/LTM8056 typical applications 18v out fan power from 3v in to 58v in with analog current control and 2a input current limiting maximum output current vs ctl voltage 12v in output voltage vs output current 24v out from 9v in to 58v in with 1.1a accurate current limit v in sv in i in gnd ll mode fan control LTM8056 i out 0.05 v out clkout i inmon i outmon fb run comp ss sync ctl rt 0.022 6.98k 100k 8056 ta02a 22f 25v 47f 25v v out 18v max fan 2.2f 100v 3 1f 100v v in 3v to 58v 31.6k f sw = 650khz dac + v in sv in i in gnd ll mode LTM8056 i out 0.05 v out clkout i inmon i outmon fb run ctl ss sync comp rt 5.23k 8056 ta03a 22f 25v 33f 35v v out 24v 2.2f 100v 3 v in 9v to 58v 43.2k f sw = 525khz 100k + ctl voltage (v) 0 output current (a) 1.2 0.8 0.6 1.0 0.4 0.2 0 8056 ta02b 1.2 0.6 0.8 0.2 0.4 1 output current (a) 0 output voltage (v) 25 15 20 10 5 0 8056 ta03b 1.5 1 0.5 12v in 24v in 36v in 48v in ltm 8056 8056fa
22 for more information www.linear.com/LTM8056 18v out from 18v in to 58v in with 2.5a accurate current limit and output current monitor typical applications tw o LTM8056s paralleled to get more output current. the tw o modules are synchronized and switching 180 out of phase v in sv in i in gnd ll mode LTM8056 i out 0.022 v out clkout i inmon i outmon fb run ctl ss sync comp rt 6.98k 8056 ta04a 22f 25v 47f 25v v out 18v output current monitor 2.2f 100v 3 v in 18v to 58v 31.6k f sw = 650khz 100k + output voltage vs output current output current per channel vs total output current output current (a) note: lines are superimposed 0 output voltage (v) 20 14 18 16 12 10 8 4 2 6 0 8056 ta04b 3 2 2.5 1 0.5 1.5 24v in 36v in 48v in v in sv in i in gnd ll mode LTM8056 i out 0.015 v out i inmon i outmon fb run ctl ss sync comp rt clkout v out 18v 2.2f 100v 4 1f v in 7v to 58v 30.9k v in sv in i in gnd LTM8056 i out 0.015 v out ctl clkout i inmon i outmon fb run comp ss sync rt 6.98k lt6015 100k 6.34k 8056 ta05a 2.2f 100v 4 1f 30.9k f sw = 680khz ll mode 51 100k 22f 25v 47f 25v 22f 25v 47f 25v + + total output current (a) 0 channel current (a) 4 2 3 1 0 8056 ta05b 8 4 2 6 master slave note: lines are superimposed ltm 8056 8056fa
23 for more information www.linear.com/LTM8056 typical applications tw o LTM8056s powered from different input sources to run a single load. each LTM8056 draws no more than 1.1a from its respective power sources, and are synchronized 180 out of phase with each other v in sv in i in gnd ll mode LTM8056 i out v out i inmon i outmon fb run ctl ss sync comp rt clkout 22f 25v 47f 35v v out 18v 2.2f 100v 3 supply 1 6v to 58v in supply 2 6v to 58v in 31.6k v in 0.045 0.045 sv in i in gnd LTM8056 i out v out clkout i inmon i outmon fb run ctl ss sync comp rt 6.98k 8056 ta06a 22f 25v 2.2f 100v 3 31.6k f sw = 650khz ll mode 100k + output current (a) 0 channel input current (a) 1.2 0.6 0.8 1.0 0.4 0.2 0 8056 ta06b 7 3 1 2 6 5 4 channel 1 channel 2 input current per channel vs total output current ltm 8056 8056fa
24 for more information www.linear.com/LTM8056 package description table 4. LTM8056 pin assignment (arranged by pin number) pin id function pin id function pin id function pin id function pin id function pin id function a1 v out b1 v out c1 v out d1 i out e1 gnd f1 ll a2 v out b2 v out c2 v out d2 gnd e2 gnd f2 gnd a3 v out b3 v out c3 v out d3 gnd e3 gnd f3 gnd a4 v out b4 v out c4 v out d4 gnd e4 gnd f4 gnd a5 v out b5 v out c5 v out d5 gnd e5 gnd f5 gnd a6 v out b6 v out c6 v out d6 gnd e6 gnd f6 gnd a7 gnd b7 gnd c7 gnd d7 gnd e7 gnd f7 gnd a8 gnd b8 gnd c8 gnd d8 gnd e8 gnd f8 gnd a9 gnd b9 gnd c9 gnd d9 gnd e9 gnd f9 gnd a10 gnd b10 gnd c10 gnd d10 gnd e10 gnd f10 sv in a11 gnd b11 gnd c11 gnd d11 gnd e11 gnd f11 sv in pin id function pin id function pin id function pin id function pin id function g1 clkout h1 rt j1 fb k1 ss l1 gnd g2 mode h2 sync j2 comp k2 ctl l2 i outmon g3 gnd h3 gnd j3 gnd k3 gnd l3 i inmon g4 gnd h4 gnd j4 gnd k4 gnd l4 run g5 gnd h5 gnd j5 gnd k5 gnd l5 gnd g6 gnd h6 gnd j6 gnd k6 gnd l6 gnd g7 gnd h7 gnd j7 gnd k7 gnd l7 gnd g8 gnd h8 gnd j8 gnd k8 gnd l 8 gnd g9 gnd h9 gnd j9 gnd k9 gnd l9 i in g10 v in h10 v in j10 v in k10 v in l10 v in g11 v in h11 v in j11 v in k11 v in l11 v in ltm 8056 8056fa
25 for more information www.linear.com/LTM8056 package photo ltm 8056 8056fa
26 for more information www.linear.com/LTM8056 package description package top view 4 pin ?a1? corner y x aaa z aaa z detail a package bottom view 3 see notes l k j h g f e d c b a 1 2 3 8 9 10 11 4 5 6 7 pin 1 bga package 121-lead (15.00mm 15.00mm 4.92mm) (reference ltc dwg# 05-08-1891 rev a) notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters ball designation per jesd ms-028 and jep95 5. primary datum -z- is seating plane 6. solder ball composition can be 96.5% sn/3.0% ag/0.5% cu or sn pb eutectic 4 3 details of pin #1 identifier are optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or marked feature detail a ?b (121 places) detail b substrate a a1 b1 ccc z detail b package side view mold cap z m x y z ddd m z eee symbol a a1 a2 b b1 d e e f g h1 h2 aaa bbb ccc ddd eee min 4.72 0.50 4.22 0.71 0.610 0.27 3.95 nom 4.92 0.60 4.32 0.78 0.635 15.00 15.00 1.27 12.70 12.70 0.32 4.00 max 5.12 0.70 4.42 0.85 0.660 0.37 4.05 0.15 0.10 0.20 0.30 0.15 notes dimensions total number of balls: 121 a2 d e e b f g suggested pcb layout top view 0.000 3.810 5.080 3.810 6.350 5.080 6.350 2.540 1.270 2.540 1.270 6.350 5.080 1.270 6.350 5.080 3.810 2.540 1.270 0.3175 0.3175 3.810 2.540 0.000 // bbb z z h2 h1 0.635 0.025 ? 121x ltmxxxxxx module bga 121 1112 rev a tray pin 1 bevel package in tray loading orientation component pin ?a1? 7 package row and column labeling may vary among module products. review each package layout carefully ! 7 see notes please refer to http://www .linear.com/product/LTM8056#packaging for the most recent package drawings. ltm 8056 8056fa
27 for more information www.linear.com/LTM8056 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 11/16 added text to i outmon (pin l2) added buck-boost selection table 8 1 ltm 8056 8056fa
28 for more information www.linear.com/LTM8056 ? linear technology corporation 2015 lt 1116 rev a ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/LTM8056 design resources subject description module design and manufacturing resources design: ? selector guides ? demo boards and gerber files ? free simulation tools manufacturing: ? quick start guide/demo manual ? pcb design, assembly and manufacturing guidelines ? package and board level reliability module regulator products search 1. sort table of products by parameters and download the result as a spread sheet. 2. search using the quick power search parametric table. techclip videos quick videos detailing how to bench test electrical and thermal performance of module products. digital power system management linear technologys family of digital power supply management ics are highly integrated solutions that offer essential functions, including power supply monitoring, supervision, margining and sequencing, and feature eeprom for storing user configurations and fault logging. part number description comments ltm8055 higher power, pin compatible 8.5a, 5v v in 36v ltm4605 higher power buck-boost (up to 60w) external inductor, synchronous switching buck-boost; up to 36v in , 0.8v v out 16v ltm4607 higher power buck-boost (up to 60w) external inductor, synchronous switching buck-boost; up to 36v in , 0.8v v out 24v ltm4609 higher power buck-boost (up to 60w) external inductor, synchronous switching buck-boost; up to 36v in , 0.8v v out 34v ltm8045 smaller, lower power sepic and inverting; 700ma, 6.25mm 11.25mm 4.92mm bga ltm8046 isolated, lower power flyback topology, 550ma (5v out , 24v in ), ul60950, 2 kvac related parts typical application 14.4v, 3a lead-acid battery charger input current limited to 2a maximum input and output current vs input voltage v in sv in i in gnd ll mode LTM8056 i out 0.018 v out clkout i inmon i outmon fb run ctl ss sync comp rt 0.022 9.09k 100k 8056 ta07a 22f 25v 47f 25v v out 14.4v 1f 100v 2.2f 100v 3 v in 3v to 58v 31.6k f sw = 650khz + input voltage (v) output input 0 input current (a) output current (a) 3.5 2.0 2.5 3.0 1.5 1.0 0.5 0 3.5 2.0 2.5 3.0 1.5 1.0 0.5 0 8056 ta07b 60 20 40 ltm 8056 8056fa

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