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this is information on a product in full production. november 2013 docid018850 rev 2 1/34 VNQ5E160MK-E quad channel high-side driver with analog current sense for automotive application datasheet - production data features ? general ? very low standby current ? 3.0 v cmos-compatible inputs ? optimized electromagnetic emissions ? very low electromagnetic susceptibility ? compliant with european directive 2002/95/ec ? very low current sense leakage ? diagnostic functions ? proportional load current sense ? high current sense precision for wide currents range ? current sense disable ? thermal shutdown indication ? overload and short to ground (power limitation) indication ? protection ? undervoltage shutdown ? overvoltage clamp ? load current limitation ? self limiting of fast thermal transients ? protection against loss of ground and loss of v cc ? over temperature shutdown with auto- restart (thermal shutdown) ? reverse battery protected ? electrostatic discharge protection ? inrush current active management by power limitation application ? all types of resistive, inductive and capacitive loads ? suitable as led driver description the VNQ5E160MK-E is a double channel high- side driver manufactured using st proprietary vipower ? m0-5 technology and housed in powersso-24 package. the device is designed to drive 12 v automotive grounded loads, and to provide protection and diagnostics. it also implement a 3 v and 5 v cmos-compatible interface for use with any microcontroller. the device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with auto-restart and over voltage active clamp. a dedicated analog current sense pin is associated with every output channel providing enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication and over temperature indication. the current sensing and diagnostic feedback of the whole device can be disabled by pulling the cs_dis pin high to share the external sense resistor with similar devices. max supply voltage v cc 41v operating voltage range v cc 4.5 to 28 v max on-state resistance (per ch.) r on 160 m current limitation (typ) i limh 10 a off-state supply current i s 2 a (1) 1. typical value with all loads connected. 0ower33/ ("1($'5 www.st.com
contents VNQ5E160MK-E 2/34 docid018850 rev 2 contents 1 block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.5 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22 3.1.1 solution 1: resistor in the ground line (rgnd only) . . . . . . . . . . . . . . . . 22 3.1.2 solution 2 : diode (dgnd) in the ground line . . . . . . . . . . . . . . . . . . . . 23 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.3 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4 current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.5 maximum demagnetization energy (vcc = 13.5 v) . . . . . . . . . . . . . . . . . 25 4 package and pc board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.1 powersso-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.2 powersso-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.3 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6 order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
docid018850 rev 2 3/34 VNQ5E160MK-E list of tables 3 list of tables table 1. pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 6. switching (vcc = 13 v; tj = 25 c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. logic inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 8. protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 9. current sense (8 v < v cc < 18 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 10. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 11. electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 12. electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 13. electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 14. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 15. powersso-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 16. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 table 17. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
list of figures VNQ5E160MK-E 4/34 docid018850 rev 2 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 6. output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. delay response time between rising edge of ouput current and rising edge of current sense (cs enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 8. i out / i sense vs i out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 9. maximum current sense ratio drift vs load current (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 10. normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 11. overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 12. intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 13. t j evolution in overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 14. off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 15. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 16. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 17. input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 18. input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 19. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 20. on-state resistance vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 21. on-state resistance vs v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 22. undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 23. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 24. i limh vs t case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 25. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 26. cs_dis high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 27. cs_dis clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 28. cs_dis low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 29. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 30. current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 31. maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 25 figure 32. powersso-24 pc board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 33. r thj-amb vs pcb copper area in open box free air condition (one channel on) . . . . . . . . . 26 figure 34. powersso-24 thermal impedance junction ambient single pulse (one channel on). . . . . 27 figure 35. thermal fitting model of a double channel hsd in powersso-24 . . . . . . . . . . . . . . . . . . . 27 figure 36. powersso-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 37. powersso-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 38. powersso-24 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
docid018850 rev 2 5/34 VNQ5E160MK-E block diagram and pin configuration 33 1 block diagram and pin configuration figure 1. block diagram table 1. pin functions name function v cc battery connection output n power output gnd ground connection. must be reverse battery protected by an external diode/resistor network input n voltage controlled input pin with hysteresis, cmos compatible. controls output switch state current sense n analog current sense pin, delivers a current proportional to the load current cs_dis active high cmos compatible pin, to disable the current sense pin 9 && &+ &rqwuro 'ldjqrvwlf /2*,& '5,9(5 9 21 /lplwdwlrq &xuuhqw /lplwdwlrq 3rzhu &odps 2yhu whps 8qghuyrowdjh 9 6(16(+ &xuuhqw 6hqvh &+ &+ &+ 29(5/2$'3527(&7,21 $&7,9(32:(5/,0,7$7 ,21 ,1 ,1 ,1 ,1 &6 &6 &6 &6 &6b ',6 *1' 287 287 287 287 6ljqdo&odps &21752/ ',$*1267,& &kdqqhov ("1($'5
block diagram and pin configuration VNQ5E160MK-E 6/34 docid018850 rev 2 figure 2. configuration diagram (top view) table 2. suggested connections for unused and not connected pins connection / pin current sense n.c. output input cs_dis floating not allowed x x x x to ground through 1 k resistor xnot allowed through 10 k resistor through 10 k resistor ).054 &855(176(16( *1' ,1387 &855(176(16( &6b',6 9 && &855(176(16( ,1387 ,1387 &855(176(16( 287387 287387 287387 287387 287387 287387 287387 287387 287387 287387 287387 287387 7$ % 9 && 9 && ("1($'5
docid018850 rev 2 7/34 VNQ5E160MK-E electrical specifications 33 2 electrical specifications figure 3. current and voltage conventions 1. v fn = v outn - v cc during reverse battery condition. 2.1 absolute maximum ratings stressing the device above the rating listed in ta ble 3 may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to the conditions in table below for extended periods may affect device reliability. 6 ,1q 287387q &855(17 6(16(q &6b',6 ,1387q , ,1q , &6' , *1' 9 6(16(q 9 287q 9 && 9 )q , 6 , 287q , 6(16(q 9 && 9 &6' *$3*&)7 *1' table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage 41 v -v cc reverse dc supply voltage 0.3 v -i gnd dc reverse ground pin current 200 ma i out dc output current internally limited a -i out reverse dc output current 6 a i in dc input current -1 to 10 ma i csd dc current sense disable input current -1 to 10 ma -i csense dc reverse cs pin current 200 ma v csense current sense maximum voltage v cc -41 +v cc v v e max maximum switching energy (single pulse) (l = 12 mh; r l = 0 ; v bat = 13.5 v; t jstart = 150 c; i out = i liml (typ.) ) 34 mj
electrical specifications VNQ5E160MK-E 8/34 docid018850 rev 2 2.2 thermal data v esd electrostatic discharge (human body model: r = 1.5 k ; c = 100 pf) ? input ? current sense ? cs_dis ? output ?v cc 4000 2000 4000 5000 5000 v v v v v v esd charge device model (cdm-aec-q100-011) 750 v t j junction operating temperature -40 to 150 c t stg storage temperature -55 to 150 c table 3. absolute maximum ratings (continued) symbol parameter value unit table 4. thermal data symbol parameter maximum value unit r thj-case thermal resistance junction-case (with one channel on) 8 c/w r thj-amb thermal resistance junction-ambient see figure 33 in the thermal section c/w
docid018850 rev 2 9/34 VNQ5E160MK-E electrical specifications 33 2.3 electrical characteristics values specified in this section are for 8 v < v cc < 28 v, -40 c < t j < 150 c, unless otherwise stated. table 5. power section symbol parameter test conditions min. typ. max. unit v cc operating supply voltage 4.5 13 28 v v usd undervoltage shutdown 3.5 4.5 v v usdhyst undervoltage shutdown hysteresis 0.5 v r on on-state resistance (2) i out = 1 a; t j = 25 c 160 m i out = 1 a; t j = 150 c 320 m i out = 1 a; v cc = 5 v; t j = 25 c 210 m v clamp clamp voltage i s = 20 ma 41 46 52 v i s supply current off-state; v cc = 13 v; t j = 25 c; v in = v out = v sense = v csd = 0 v 2 (1) 1. powermos leakage included. 5 (1) a on-state; v cc = 13 v; v in = 5 v; i out = 0 a 814ma i l(off1) off-state output current (2) 2. for each channel. v in = v out =0 v; v cc = 13 v; t j = 25 c 00.013 a v in = v out = 0 v; v cc = 13 v; t j = 125 c 05a v f output - v cc diode voltage (2) -i out =1 a; t j = 150 c 0.7 v table 6. switching (v cc = 13 v; t j = 25 c) symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time r l = 13 (see figure 5 )? 20 ? s t d(off) turn-off delay time r l = 13 (see figure 5 )? 10 ? s (dv out /dt) on turn-on voltage slope r l = 13 ? see figure 23 ?v / s (dv out /dt) off turn-off voltage slope r l = 13 ? see figure 25 ?v / s w on switching energy losses during t won r l = 13 (see figure 5 )? 0.05 ? mj w off switching energy losses during t woff r l = 13 (see figure 5 )? 0.03 ? mj
electrical specifications VNQ5E160MK-E 10/34 docid018850 rev 2 table 7. logic inputs symbol parameter test conditions min. typ. max. unit v il input low level voltage 0.9 v i il low level input current v in = 0.9 v 1 a v ih input high level voltage 2.1 v i ih high level input current v in = 2.1 v 10 a v i(hyst) input hysteresis voltage 0.25 v v icl input clamp voltage i in = 1 ma 5.5 7 v i in = -1 ma -0.7 v v csdl cs_dis low level voltage 0.9 v i csdl low level cs_dis current v csd = 0.9 v 1 a v csdh cs_dis high level voltage 2.1 v i csdh high level cs_dis current v csd = 2.1 v 10 a v csd(hyst) cs_dis hysteresis voltage 0.25 v v cscl cs_dis clamp voltage i csd = 1 ma 5.5 7 v i csd = -1 ma -0.7 v table 8. protections and diagnostics (1) 1. to ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper so ftware strategy. if the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. symbol parameter test conditions min. typ. max. unit i limh dc short circuit current v cc = 13 v 7 10 14 a 5 v < v cc < 28 v 14 a i liml short circuit current during thermal cycling v cc = 13 v; t r < t j < t tsd 2.5 a t tsd shutdown temperature 150 175 200 c t r reset temperature t rs + 1 t rs + 5 c t rs thermal reset of status 135 c t hyst thermal hysteresis (t tsd -t r ) 7c v demag turn-off output voltage clamp i out = 1 a; v in = 0; l = 20 mh v cc - 41 v cc - 46 v cc -52 v v on output voltage drop limitation i out = 0.03 a; t j = -40 c...150 c (see figure 6 ) 25 mv
docid018850 rev 2 11/34 VNQ5E160MK-E electrical specifications 33 table 9. current sense (8 v < v cc < 18 v) symbol parameter test conditions min. typ. max. unit k 0 i out /i sense i out = 0.025 a; v sense = 0.5 v; v csd = 0 v; t j = -40 c to 150 c 330 600 870 k 1 i out /i sense i out = 0.35 a; v sense = 0.5 v; v csd = 0 v; t j = -40 c to 150 c t j = 25 c to 150 c 337 395 475 475 642 555 dk 1 /k 1 (1) current sense ratio drift i out = 0.35 a; v sense = 0.5 v; v csd = 0 v; t j = -40 c to 150 c - 12 12 % k 2 i out /i sense i out = 0.5 a; v sense = 4 v; v csd = 0 v; t j = -40 c to 150 c t j = 25 c to 150 c 375 407 470 470 583 544 dk 2 /k 2 (1) current sense ratio drift i out = 0.5 a; v sense = 4 v; v csd = 0 v; t j = -40 c to 150 c - 8 8 % k 3 i out /i sense i out = 1.5 a; v sense = 4 v; v csd = 0 v; t j = -40 c to 150 c t j = 25 c to 150 c 425 435 465 465 505 495 dk 3 /k 3 (1) current sense ratio drift i out = 1.5 a; v sense = 4 v; v csd = 0 v; t j = -40 c to 150 c - 6 6 % i sense0 analog sense leakage current i out = 0 a; v sense = 0 v; v csd = 5 v; v in = 0 v; t j = -40 c to 150 c 01a v csd = 0 v; v in = 5 v; t j = -40 c to 150 c 02a i out = 1 a; v sense = 0 v; v csd = 5 v; v in = 5 v; t j = -40 c to 150 c 01a i ol openload on-state current detection threshold v in = 5 v; i sense = 5 a 1 5 ma v sense max analog sense output voltage i out = 1.5 a; v csd = 0 v 5 v v senseh analog sense output voltage in fault condition (2) v cc = 13 v; r sense = 3.9 k ; 8v i senseh (2) analog sense output current in fault condition (2) v cc = 13 v; v sense = 5 v; 9 ma t dsense1h delay response time from falling edge of cs_dis pin v sense < 4 v; 0.025 a < i out < 1.5 a; i sense = 90 % of i sense max (see figure 4 ) 40 100 s
electrical specifications VNQ5E160MK-E 12/34 docid018850 rev 2 figure 4. current sense delay characteristics t dsense1l delay response time from rising edge of cs_dis pin v sense < 4 v; 0.025 a < i out < 1.5 a; i sense = 10 % of i sense max (see figure 4 ) 520s t dsense2h delay response time from rising edge of input pin v sense < 4 v; 0.025 a < i out < 1.5 a; i sense = 90 % of i sense max (see figure 4 ) 120 300 s t dsen se 2h delay response time between rising edge of output current and rising edge of current sense v sense < 4 v; i sense = 90% of i sensemax ; i out = 90% of i outmax i outmax = 1.5 a (see figure 7 ) 110 s t dsense2l delay response time from falling edge of input pin v sense < 4 v; 0.025 a < i out < 1.5 a i sense = 10 % of i sense max (see figure 4 ) 80 250 s 1. parameter guaranteed by design; it is not tested 2. fault condition includes: power limitation and overtemperature. table 9. current sense (8 v < v cc < 18 v) (continued) symbol parameter test conditions min. typ. max. unit 6(16(&855(17 ,1387 /2$'&855(17 &6b',6 w '6(16(+ w '6(16(/ w '6(16(/ w '6(16(+ $*9
docid018850 rev 2 13/34 VNQ5E160MK-E electrical specifications 33 figure 5. switching characteristics figure 6. output voltage drop limitation g9 287 gw rq w u w grq ,1387 w w 9 287 w :rq w :rii g9 287 gw rii w i w grii $*9 9 21 , 287 7 m ?& 7 m ?& 7 m ?& 9 21 5 21 7 9 && 9 287 $*9
electrical specifications VNQ5E160MK-E 14/34 docid018850 rev 2 figure 7. delay response time between rising edge of ouput current and rising edge of current sense (cs enabled) figure 8. i out / i sense vs i out 9 ,1 , 287 , 6(16(0$; ?w '6(16(+ w w w , 6(16(0$; , 2870$; , 2870$; , 6(16( $*9 * pvu * tfotf * 065 "
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docid018850 rev 2 15/34 VNQ5E160MK-E electrical specifications 33 figure 9. maximum current sense ratio drift vs load current (1) 1. parameter guaranteed by design; it is not tested. table 10. truth table conditions input output sense (v csd = 0 v) (1) 1. if the v csd is high, the sense output is at a high impedance, its potential depends on leakage currents and external circuit. normal operation l h l h 0 nominal overtemperature l h l l 0 v senseh undervoltage l h l l 0 0 overload h h x (no power limitation) cycling (power limitation) nominal v senseh short circuit to gnd (power limitation) l h l l 0 v senseh negative output voltage clamp ll0 ell
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electrical specifications VNQ5E160MK-E 16/34 docid018850 rev 2 table 11. electrical transient requirements (part 1) iso 7637-2: 2004(e) test pulse test levels (1) 1. the above test levels must be considered referred to v cc = 13.5 v except for pulse 5b. number of pulses or test times burst cycle/pulse repetition time delays and impedance iii iv min. max. 1 -75v -100v 5000 pulses 0.5s 5s 2 ms, 10 2a +37v +50v 5000 pulses 0.2s 5s 50s, 2 3a -100v -150v 1h 90ms 100ms 0.1s, 50 3b +75v +100v 1h 90ms 100ms 0.1s, 50 4 -6v -7v 1 pulse 100ms, 0.01 5b (2) 2. valid in case of external load dump clamp: 40 v maximum referred to ground. +65v +87v 1 pulse 400ms, 2 table 12. electrical transient requirements (part 2) iso 7637-2: 2004e test pulse test level results iii vi 1c c 2a c c 3a c c 3b c c 4c c 5b (1) 1. the above test levels must be considered referred to v cc = 13.5v except for pulse 5b. cc table 13. electrical transient requirements (part 3) class contents c all functions of the device performed as designed after exposure to disturbance. e one or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
docid018850 rev 2 17/34 VNQ5E160MK-E electrical specifications 33 2.4 waveforms figure 10. normal operation figure 11. overload or short to gnd , 287 9 6(16( 9 &6b',6 ,1387 1rplqdoordg 1rplqdoordg 1rupdorshudwlrq $*9 3rzhu/lplwdwlrq , /lp+ ! , /lp/ ! 7khupdof\folqj 2yhuordgru6kruwwr*1' , 287 9 6(16( 9 &6b',6 ,1387 $*9
electrical specifications VNQ5E160MK-E 18/34 docid018850 rev 2 figure 12. intermittent overload figure 13. t j evolution in overload or short to gnd ! 1rplqdoordg ,qwhuplwwhqw2yhuordg ! 2yhuordg ! , 287 9 6(16( 9 &6b',6 ,1387 9 6(16(+ , /lp+ , /lp/ $*9 7 - hyroxwlrqlq 2yhuordgru6kruwwr*1' , /lp+ ! 3rzhu/lplwdwlrq 6hoiolplwdwlrqriidvwwkhupdowudqvlhqwv ,1387 7 - , 287 7 -b67$57 7 5 7 76' 7 +<67 , /lp/ $*9
docid018850 rev 2 19/34 VNQ5E160MK-E electrical specifications 33 2.5 electrical characteristics curves figure 14. off-state output current figure 15. high level input current figure 16. input clamp voltage figure 17. input low level voltage figure 18. input high level voltage figure 19. input hysteresis voltage 7f ?& ,oriip$ 2ii 6w dw h 9ff 9 9lq 9rxw 9 ("1($'5 7f ?& ,lk?$ 9lq 9 ("1($'5 7f ?& 9lfo9 olq p$ ("1($'5 7f ?& 9lo9 ("1($'5 7f ?& 9lk9 ("1($'5 7f?& 9lk\vw9 ("1($'5
electrical specifications VNQ5E160MK-E 20/34 docid018850 rev 2 figure 20. on-state resistance vs t case figure 21. on-state resistance vs v cc figure 22. undervoltage shutdown figure 23. turn-on voltage slope figure 24. i limh vs t case figure 25. turn-off voltage slope 7f ?& 5rq2kp ,rxw $ 9ff 9 ("1($'5 9ff9 5rq2kp 7f ?& 7f ?& 7f ?& 7f ?& ("1($'5 7f ?& 9xvg9 ("1($'5 7f?& g9rxwgw2q9pv 9ff 9 5, 2kp ("1($'5 7f ?& ,olpk$ 9ff 9 ("1($'5 7f?& g9rxwgw2ii9pv 9ff 9 5, 2kp ("1($'5
docid018850 rev 2 21/34 VNQ5E160MK-E electrical specifications 33 figure 26. cs_dis high level voltage figure 27. cs_dis clamp voltage figure 28. cs_dis low level voltage 7f ?& 9fvgk9 ("1($'5 7f ?& 9fvgfo9 ,lq p$ ("1($'5 7f ?& 9fvgo9 ("1($'5
application information VNQ5E160MK-E 22/34 docid018850 rev 2 3 application information figure 29. application schematic 1. channel 2, 3, 4 have the same internal circuit as channel 1. 3.1 gnd protection network against reverse battery this section provides two solutions for implementing a ground protection network against reverse battery. 3.1.1 solution 1: resistor in the ground line (r gnd only) this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1. r gnd 600 mv / (i s(on)max ) 2. r gnd (? v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. power dissipation in r gnd (when v cc < 0: during reverse battery situations) is: p d = (-v cc ) 2 /r gnd this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not shared by the device ground then the r gnd produces a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift varies depending on how many devices are on in the case of several high side drivers sharing the same r gnd . 6 && *1' 287387 ' *1' 5 *1' ' og 0 &8 9 9 *1' &6b',6 ,1387 5 surw 5 surw &855(176(16( 5 6(16( 5 surw & (;7 ("1($'5
docid018850 rev 2 23/34 VNQ5E160MK-E application information 33 if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then st suggests to utilize solution 2 (see below). 3.1.2 solution 2 : diode (d gnd ) in the ground line a resistor (r gnd = 1 k ) should be inserted in parallel to d gnd if the device drives an inductive load. this small signal diode can be safely shared amongst several different hsds. also in this case, the presence of the ground network produces a shift ( 600 mv) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. this shift not varies if more than one hsd shares the same diode/resistor network. 3.2 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the v cc max dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in the iso 7637-2: 2004(e) table. 3.3 mcu i/os protection if a ground protection network is used and negative transient are present on the v cc line, the control pins are pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the microcontroller i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of microcontroller and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of microcontroller i/os: -v ccpeak /i latchup r prot (v oh c - v ih - v gnd ) / i ihmax calculation example: for v ccpeak = -100 v and i latchup 20 ma; v ohc 4.5 v 5 k r prot 180 k recommended values: r prot = 10 k , c ext = 10 nf.
application information VNQ5E160MK-E 24/34 docid018850 rev 2 3.4 current sense and diagnostic the current sense pin performs a double function (see figure 30: current sense and diagnostic ): ? current mirror of the load current in normal operation, delivering a current proportional to the load one according to a known ratio k x . the current i sense can be easily converted to a voltage v sense by means of an external resistor r sense . linearity between i out and v sense is ensured up to 5v minimum (see parameter v sense in table 9: current sense (8 v < v cc < 18 v) ). the current sense accuracy depends on the output current (refer to current sense electrical characteristics table 9: current sense (8 v < v cc < 18 v) ). ? diagnostic flag in fault conditions , delivering a fixed voltage v senseh up to a maximum current i senseh in case of the following fault conditions (refer to ): ? power limitation activation ? over-temperature a logic level high on cs_dis pin sets at the same time all the current sense pins of the device in a high impedance state, thus disabling the current monitoring and diagnostic detection. this feature allows multiplexing of the microcontroller analog inputs by sharing of sense resistance and adc line among different devices. figure 30. current sense and diagnostic 0dlq026q 9 287q 5 6(16( 5 3527 7rx&$'& 3zub/lp 9 6( 6 ( 1 6 ( 2yhuwhpshudwxuh &855(17 6(16(q , 287 . ; , 6(16(+ 9 %$7 9 6(16(+ /rdg 9 && *1' &6b',6 ("1($'5
docid018850 rev 2 25/34 VNQ5E160MK-E application information 33 3.5 maximum demagnetization energy (v cc = 13.5 v) figure 31. maximum turn-off current versus inductance (for each channel) 1. values are generated with r l = 0 . in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves a and b. c: t jstart = 125 c repetitive pulse a: t jstart = 150 c single pulse b: t jstart = 100 c repetitive pulse / p + , $ $ % & ("1($'5 'hpdjqhwl]dwlrq 'hpdjqhwl]dwlrq 'hpdjqhwl]dwlrq w 9 ,1 , / *$3*&)7
package and pc board thermal data VNQ5E160MK-E 26/34 docid018850 rev 2 4 package and pc board thermal data 4.1 powersso-24 thermal data figure 32. powersso-24 pc board 1. layout condition of r th and z th measurements (pcb: double layer, thermal vias, fr4 area = 77 mm x 86 mm, pcb thickness = 1.6 mm, cu thickness = 70 mm (front and back side), copper areas: from minimum pad lay-out to 8 cm 2 ). figure 33. r thj-amb vs pcb copper area in open box free air condition (one channel on) ("1($'5 5 7 + m b d p e ? & : 3 & % & x k h d w v l q n d u h d f p a *$3*&)7
docid018850 rev 2 27/34 VNQ5E160MK-E package and pc board thermal data 33 figure 34. powersso-24 thermal impedance junction ambient single pulse (one channel on) figure 35. thermal fitting model of a double channel hsd in powersso-24 1. the fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cyc ling during thermal shutdown) are not triggered. 7lphv =7+ ?& : &oo tpr int fp fp ("1($'5
package and pc board thermal data VNQ5E160MK-E 28/34 docid018850 rev 2 equation 1 : pulse calculation formula : where = t p /t table 14. thermal parameters area/island (cm 2 ) footprint 2 8 r1 = r7 = r9 = r11 (c/w) 1.2 r2 = r8 = r10 = r12 (c/w) 6 r3 (c/w) 6 r4 (c/w) 7.7 r5 (c/w) 9 9 8 r6 (c/w) 28 17 10 c1 = c7 = c9 = c11 (w.s/c) 0.0008 c2 = c8 = c10 = c12 (w.s/c) 0.0016 c3 (w.s/c) 0.025 c4 (w.s/c) 0.75 c5 (w.s/c) 1 4 9 c6 (w.s/c) 2.2 5 17 z th r th z thtp 1 ? () + ? =
docid018850 rev 2 29/34 VNQ5E160MK-E package and packing information 33 5 package and packing information 5.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 5.2 powersso-24 mechanical data figure 36. powersso-24 package dimensions ("1($'5
package and packing information VNQ5E160MK-E 30/34 docid018850 rev 2 table 15. powersso-24 mechanical data (1)(2) 1. no intrusion allowed inwards the leads. 2. flash or bleeds on exposed die pad shall not exceed 0.4 mm per side symbol millimeters min. typ. max. a 2.50 a2 2.15 2.40 a1 0 0.10 b 0.33 0.51 c 0.23 0.32 d (3) 3. ?d and e? do not include mold flash or protusions. mold flash or protusions shall not exceed 0.15 mm. 10.10 10.50 e (3) 7.40 7.60 e0.8 e3 8.8 f2.3 g 0.1 g1 0.06 h 10.1 10.5 h 0.4 k5o l0.6 1 o1.2 q0.8 s2.9 t3.65 u1 n 10o x4.1 4.7 y 6.5 4.9 (4) 4. variations for small window leadframe option. 7.1 5.5 (4)
docid018850 rev 2 31/34 VNQ5E160MK-E package and packing information 33 5.3 packing information figure 37. powersso-24 tube shipment (no suffix) figure 38. powersso-24 tape and reel shipment (suffix ?tr?) ! & % all dimensions are in mm. base q.ty 49 bulk q.ty 1225 tube length ( 0.5) 532 a 3.5 b 13.8 c ( 0.1) 0.6 %dvh4w\ %xon4w\ $pd[ % p l q &? ) * 1plq 7p d[ 5h h o g l p h q vl r q v 7dshglphqvlrqv $ffruglqjwr(ohfwurqlf,qgxvwulhv$vvrfldwlrq (,$6wdqgduguhy$)he $ooglphqvlrqvduhlqpp 7dshzlgwk : 7ds h+r o h6s dfl q j 3? &rpsrqhqw6sdflq j3 +roh'ldphwhu '? +roh'ldphwhu 'plq +roh3rvlwlrq )? &rpsduwphqw'hswk .pd[ +roh6sdflqj 3? 7r s fryhu wdsh (qg 6wduw 1rfrpsrqhqwv 1rfrpsrqhqwv &rpsrqhqwv ppplq ppplq (psw\frpsrqhqwvsrfnhwv vdohgzlwkfryhuwdsh 8vhugluhfwlrqriihhg ("1($'5
order codes VNQ5E160MK-E 32/34 docid018850 rev 2 6 order codes table 16. device summary package order codes tube tape and reel powersso-24 VNQ5E160MK-E vnq5e160mktr-e
docid018850 rev 2 33/34 VNQ5E160MK-E revision history 33 7 revision history table 17. document revision history date revision changes 25-may-2011 1 initial release. 04-nov-2013 2 updated disclaimer.
VNQ5E160MK-E 34/34 docid018850 rev 2 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statem ents and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or register ed trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - swed en - switzerland - united kingdom - united states of america www.st.com

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