p p j q2800 november 16,2015 - rev.01 page 1 2 0 v n - c hannel enhancement mode mosfet voltage 2 0 v current 5.2 a dfn 2 020 - 6 l f eatures ? rds(on) , vgs@ 4.5 v , id@ 5.2 a< 32m ? ? rds(on) , vgs@ 2.5 v, id@ 3.2 a< 45 m ? ? rds(on) , vgs@ 1.8 v, id@ 2.0 a< 65m ? ? advanced trench process technology ? high density cell design for ultra low on - resistance ? esd protected ? lead free in compliance with eu rohs 2011/65/eu directive . ? green molding compound as per iec61249 std. (halogen free) mechanical data ? case: dfn2020 - 6l package ? terminals : solderable per mil - std - 750, method 2026 ? approx. weight: 0.00032 ounces, 0.0093 grams ? marking: 800 parameter symbol limit units drain - source voltage v ds 20 v gate - source voltage v gs + 8 v continuous drain curre nt i d 5.2 a pulsed drain current i dm 20.8 a power dissipation t a =25 o c p d 1. 4 5 w derate above 25 o c 1 1.6 m w/ o c operatin g junction an d storage temperature range t j ,t stg - 55~150 o c typical thermal resistance - j unction to ambient (note 3 ) r ja 86 o c /w maximum ratings and thermal characteristics (t a =25 o c unless otherwise noted)
p p j q2800 november 16,2015 - rev.01 page 2 e lectrical c haracteristics (t a =25 o c unless otherwise noted) parameter symbol test condition min. typ. max. units static drain - source breakdown voltage bv dss v gs = 0 v, i d = 25 0ua 2 0 - - v gate threshold voltage v gs(th) v ds =v gs , i d = 250 ua 0. 4 0.6 8 0.9 v drain - source on - state resistance r ds(on) v gs = 4.5 v, i d = 5.2 a - 24 32 m gs = 2.5 v, i d = 3.2 a - 3 0 45 v gs = 1.8 v, i d = 2.0 a - 40 65 zero gate voltage drain curre nt i dss v ds = 20 v, v gs =0v - - 0.01 1 u a gate - source leakage current i gss v gs = + 8 v, v ds =0v - + 3 + 10 u a dynamic total gate charge q g v ds = 10 v, i d = 5.2 a, v gs = 4.5v (note 1 , 2 ) - 6 . 3 - nc gate - source charge q gs - 1. 2 - gate - drain charge q gd - 1.0 - input cap acitance ciss v ds = 10 v, v gs = 0 v, f=1.0mhz - 515 - pf output capacitance coss - 6 0 - reverse transfer capacitance crss - 47 - switching turn - on delay time t d (on) v dd = 10 v, i d = 5.2 a, v g s = 4.5v, r g = 6 (note 1 , 2 ) - 7 - ns turn - on rise time tr - 43 - turn - o ff delay time t d (off) - 170 - turn - o ff fall time tf - 1 3 - drain - source diode maximum continuous drain - source diode forward current i s --- - - 1. 5 a diode forward voltage v sd i s = 1.0 a, v gs = 0 v - 0.7 7 1.2 v notes : 1. pulse width < 300us, duty cycle < 2% 2. essentially independent of operating temperature typical characteristics . 3. r ? ja is the sum of the junction - to - case and case - to - ambient thermal resistance where the case thermal reference is define d as the solder mounting surface of the drain pins m ounted on a 1 inch fr - 4 with 2oz . square pad of copper 4. the maximum current rating is package limited
p p j q2800 november 16,2015 - rev.01 page 3 t ypical characteristic curves fig.1 on - region characteristics fig. 2 transfer characteri stics fig. 3 on - resistance vs. drain current fig. 4 on - resistance vs. junction temperature fig. 5 on - resistance variation with vgs. fig. 6 body d i ode characteristics
p p j q2800 november 16,2015 - rev.01 page 4 t ypical characteristic curves fig. 7 gate - charge characteristic s fig. 8 threshold voltage variation with temperature fig. 9 capacitance vs. drain - source voltage .
p p j q2800 november 16,2015 - rev.01 page 5 part no packing code version mounting pad layout dfn2020 - 6l dimension u nit: mm dfn2020 - 6l u nit: mm part n o packing code package type packing type marking ver sion PJQ2800_ r 1_00001 dfn2020 - 6l 3k pcs / 7
p p j q2800 november 16,2015 - rev.01 page 6 disclaimer
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