? semiconductor components industries, llc, 2017 april, 2017 ? rev. 3 1 publication order number: esd8351p2/d esd8351p2, szesd8351p2 esd protection diodes low capacitance esd protection diode for high speed data line the esd8351p2 esd protection diode is designed to protect high speed data lines from esd. ultra?low capacitance and low esd clamping voltage make this device an ideal solution for protecting voltage sensitive high speed data lines. features ? low capacitance (0.55 pf max, i/o to gnd) ? protection for the following iec standards: iec 61000?4?2 (level 4) iso 10605 ? low esd clamping voltage ? sz prefix for automotive and other applications requiring unique site and control change requirements; aec?q101 qualified and ppap capable ? these devices are pb?free, halogen free/bfr free and are rohs compliant typical applications ? usb 2.0 ? esata maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit operating junction temperature range t j ?55 to +125 c storage temperature range t stg ?55 to +150 c lead solder temperature ? maximum (10 seconds) t l 260 c iec 61000?4?2 contact (esd) iec 61000?4?2 air (esd) iso 10605 330 pf / 2 k contact esd esd esd 15 15 30 kv kv kv maximum peak pulse current 8/20 s @ t a = 25 c i pp 5.0 a stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. see application note and8308/d for further description of survivability specs. this document contains information on some products that are still under development. on semiconductor reserves the right to change or discontinue these products without notice. marking diagram pin configuration and schematic www. onsemi.com ac = specific device code m = date code = 1 cathode 2 anode sod?923 case 514ab ac m see detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. ordering information x2dfn2 case 714ab (in development) xx m xx = specific device code m = date code = pb?free package
esd8351p2, szesd8351p2 www. onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) symbol parameter v rwm working peak voltage i r maximum reverse leakage current @ v rwm v br breakdown voltage @ i t i t test current v hold holding reverse voltage i hold holding reverse current r dyn dynamic resistance i pp maximum peak pulse current v c clamping voltage @ i pp v c = v hold + (i pp * r dyn ) i v v c v rwm v hold v br r dyn v c i r i t i hold ?i pp r dyn i pp v c = v hold + (i pp * r dyn ) electrical characteristics (t a = 25 c unless otherwise specified) parameter symbol conditions min typ max unit reverse working voltage v rwm i/o pin to gnd ESD8351P2T5G esd8351n2t5g 3.3 3.7 v breakdown voltage v br i t = 1 ma, i/o pin to gnd 5.5 7.0 7.8 v reverse leakage current i r v rwm = 3.3 v, i/o pin to gnd ESD8351P2T5G v rwm = 3.7 v, i/o pin to gnd esd8351n2t5g 500 1.0 na a holding reverse voltage v hold i/o pin to gnd 1.15 v holding reverse current i hold i/o pin to gnd 20 ma clamping voltage tlp (note 2) see figures 1 through 11 v c i pp = 8 a iec 61000?4?2 level 2 equivalent ( 4 kv contact, 4 kv air) 5.7 6.5 v i pp = 16 a iec 61000?4?2 level 4 equivalent ( 8 kv contact, 15 kv air) 8.3 10 clamping voltage (note 3) v c i pp = 5 a t p = 8 x 20 s 5.7 6.5 v dynamic resistance r dyn pin1 to pin2 pin2 to pin1 0.44 0.37 junction capacitance c j v r = 0 v, f = 1 mhz v r = 0 v, f = 2.5 ghz 0.37 0.35 0.55 0.45 pf product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 1. for test procedure see figures 8 and 9 and application note and8307/d. 2. ansi/esd stm5.5.1 ? electrostatic discharge sensitivity testing using transmission line pulse (tlp) model. tlp conditions: z 0 = 50 , t p = 100 ns, t r = 4 ns, averaging window; t 1 = 30 ns to t 2 = 60 ns. 3. non?repetitive current pulse at t a = 20 c, per iec 61000?4?5 waveform.
esd8351p2, szesd8351p2 www. onsemi.com 3 figure 1. cv characteristics c (pf) v bias (v) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 capacitance (pf) frequency 0 0.2 0.4 0.6 0.8 1.0 2.0 123 567 9 db frequency (hz) ?14 ?12 ?10 ?8 ?6 ?4 ?2 0 2 1e7 1e8 1e9 1e10 20 16 14 12 8 4 2 0 02 20 16 14 12 46810 tlp current (a) v c , voltage (v) 3e10 m1 m2 1.2 1.4 1.6 1.8 4810 18 6 10 18 10 8 6 4 2 0 equivalent v iec (kv) 20 16 14 12 8 4 2 0 02 20 16 14 12 46810 tlp current (a) v c , voltage (v) 18 6 10 18 10 8 6 4 2 0 equivalent v iec (kv) figure 2. clamping voltage vs peak pulse current ( t p = 8/20 s) v pk (v) i pk (a) 0 1 2 3 4 5 10 1 1.5 2 3 3.5 4 5 6 7 8 9 2.5 4.5 5.5 figure 3. rf insertion loss figure 4. capacitance over frequency figure 5. positive tlp i?v curve figure 6. negative tlp i?v curve 6
esd8351p2, szesd8351p2 www. onsemi.com 4 latch?up considerations on semiconductor?s 8000 series of esd protection devices utilize a snap?back, scr type structure. by using this technology, the potential for a latch?up condition was taken into account by performing load line analysis of common high speed serial interfaces. example load lines for latch?up free applications and applications with the potential for latch?up are shown below with a generic iv characteristic of a snapback, scr type structured device overlaid on each. in the latch?up free load line case, the iv characteristic of the snapback protection device intersects the load?line in one unique point (v op , i op ). this is the only stable operating point of the circuit and the system is therefore latch?up free. in the non?latch up free load line case, the iv characteristic of the snapback protection device intersects the load?line in two points (v opa , i opa ) and (v opb , i opb ). therefore in this case, the potential for latch?up exists if the system settles at (v opb , i opb ) after a transient. because of this, esd8351p2 should not be used for hdmi applications ? esd8104 or esd8040 have been designed to be acceptable for hdmi applications without latch?up. please refer to application note and9116/d for a more in?depth explanation of latch?up considerations using esd8000 series devices. figure 7. example load lines for latch?up free applications and applications with the potential for latch?up esd8351p2 potential latch up: hdmi 1.4/1.3a tmds esd8351p2 latch up free: usb 2.0 ls/fs, usb 2.0 hs, usb 3.0 ss, displayport i i ssmax i opb i opa v v opb v opa v dd v op v dd v i i ssmax i op table 1. summary of scr requirements for latch?up free applications application vbr (min) (v) ih (min) (ma) vh (min) (v) on semiconductor esd8000 series recommended pn hdmi 1.4/1.3a tmds 3.465 54.78 1.0 esd8104, esd8040 usb 2.0 ls/fs 3.301 1.76 1.0 esd8004, esd8351p2 usb 2.0 hs 0.482 n/a 1.0 esd8004, esd8351p2 usb 3.0 ss 2.800 n/a 1.0 esd8004, esd8006, esd8351p2 displayport 3.600 25.00 1.0 esd8004, esd8006, esd8351p2
esd8351p2, szesd8351p2 www. onsemi.com 5 iec 61000?4?2 spec. level test volt- age (kv) first peak current (a) current at 30 ns (a) current at 60 ns (a) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 i peak 90% 10% iec61000?4?2 w aveform 100% i @ 30 ns i @ 60 ns t p = 0.7 ns to 1 ns figure 8. iec61000?4?2 spec figure 9. diagram of esd clamping voltage test setup 50 50 cable tvs oscilloscope esd gun the following is taken from application note and8308/d ? interpretation of datasheet parameters for esd devices. esd voltage clamping for sensitive circuit elements it is important to limit the voltage that an ic will be exposed to during an esd event to as low a voltage as possible. the esd clamping voltage is the voltage drop across the esd protection diode during an esd event per the iec61000?4?2 waveform. since the iec61000?4?2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. on semiconductor has developed a way to examine the entire voltage waveform across the esd protection diode over the time domain of an esd pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all esd protection diodes. for more information on how on semiconductor creates these screenshots and how to interpret them please refer to and8307/d.
esd8351p2, szesd8351p2 www. onsemi.com 6 transmission line pulse (tlp) measurement transmission line pulse (tlp) provides current versus voltage (i?v) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. a simplified schematic of a typical tlp system is shown in figure 10. tlp i?v curves of esd protection devices accurately demonstrate the product?s esd capability because the 10s of amps current levels and under 100 ns time scale match those of an esd event. this is illustrated in figure 11 where an 8 kv iec 61000?4?2 current waveform is compared with tlp current pulses at 8 a and 16 a. a tlp i?v curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. figure 10. simplified schematic of a typical tlp system dut l s oscilloscope attenuator 10 m v c v m i m 50 coax cable 50 coax cable figure 11. comparison between 8 kv iec 61000?4?2 and 8 a and 16 a tlp waveforms ordering information device package shipping ? ESD8351P2T5G, szESD8351P2T5G* sod?923 (pb?free) 8000 / tape & reel esd8351n2t5g (in development) x2dfn2 (pb?free) 8000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *sz prefix for automotive and other applications requiring unique site and control change requirements; aec?q101 qualified and ppap capable.
esd8351p2, szesd8351p2 www. onsemi.com 7 package dimensions sod?923 case 514ab issue c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish. minimum lead thickness is the minimum thickness of base material. 4. dimensions d and e do not include mold flash, pro- trusions, or gate burrs. dim min nom max millimeters a 0.34 0.37 0.40 b 0.15 0.20 0.25 c 0.07 0.12 0.17 d 0.75 0.80 0.85 e 0.55 0.60 0.65 0.95 1.00 1.05 l 0.19 ref h e 0.013 0.015 0.016 0.006 0.008 0.010 0.003 0.005 0.007 0.030 0.031 0.033 0.022 0.024 0.026 0.037 0.039 0.041 0.007 ref min nom max inches d e c a ?y? ?x? 2 1 dimensions: millimeters *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* see application note and8455/d for more mounting details 1.20 2x 0.25 2x 0.36 package outline b 2x 0.08 xy top view h e side view 2x bottom view l2 l 2x l2 0.05 0.10 0.15 0.002 0.004 0.006
esd8351p2, szesd8351p2 www. onsemi.com 8 package dimensions x2dfn2 1.0x0.6, 0.65p case 714ab issue o a b e d bottom view b l 0.10 c top view 0.05 c a a1 0.10 c 0.10 c c seating plane side view dim min max millimeters a 0.34 0.40 a1 ??? 0.05 b 0.45 0.55 d 1.00 bsc e 0.60 bsc solder footprint* dimensions: millimeters 1.20 0.60 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. 1 l 0.20 0.30 0.47 recommended pin 1 pin 1 indicator e 0.65 bsc a m 0.05 b c a m 0.05 b c 2x e e/2 2x 2x note 3 on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 esd8351p2/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative ?
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