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for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. general description the max4359/max4360/max4456 low-cost video cross- point switches are designed to reduce component count, board space, design time, and system cost. each con- tains a matrix of t-switches that connect any of their four (max4359) or eight (max4360/max4456) video inputs to any of their buffered outputs, in any combination. each matrix output is buffered by an internal, high-speed (250v/?), unity-gain amplifier that is capable of driving 400 ? and 20pf at 2.6v p-p . for applications requiring increased drive capability, buffer the max4359/max4360/max4456 outputs with the max4395 quad, operational amplifier. the max4456 has a digitally controlled 8x8 switch matrix and is a low-cost pin-for-pin compatible alternative to the popular max456. the max4359/max4360 are similar to the max4456, with the 8x8 switch matrix replaced by a 4x4 (max4359) or an 8x4 (max4360) switch matrix. three-state output capability and internal, programmable active loads make it feasible to parallel multiple devices to form larger switch arrays. the inputs and outputs are on opposite sides, and a quiet power supply or digital input line separates each channel, which reduces crosstalk to -70db at 5mhz. for applications demanding better dc specifications, see the max456 8x8 video crosspoint switch. ________________________ applications features ? eight (max4456) or four (max4359/max4360)internal buffers 250v/s slew rate three-state output capability power-saving disable feature 65mhz -3db bandwidth ? routes any input channel to any output channel ? serial or parallel digital interface ? expandable for larger switch matrices ? 80db all-channel off-isolation at 5mhz ? 70db single-channel crosstalk ? straight-through pinouts simplify layout ? low-cost pin-compatible alternative to max456 (max4456) max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches ________________________________________________________________ maxim integrated products 1 output select 4x4 (8x4) t-switch matrix max4395 4 input channels (8 input channels) a1a0 d3d2 d1/ser out d0/ser in input select or serial i/o max4359 (max4360) latch wr 75 ? 75 ? a v = +2 z 0 = 75 ? z 0 = 75 ? (max4360) output select 8x8 t-switch matrix max4395 a2 8 input channels a1a0 d3d2 d1/ser out d0/ser in input select or serial i/o max4456 latch wr 75 ? 75 ? a v = +2 max4395 a v = +2 part temp range pin-package pkg code max4359 eax -40? to +85? 36 ssop a36-2 max4359ewg -40? to +85? 24 so w24-2 max4360 eax -40? to +85? 36 ssop a36-2 max4456 cpl 0? to +70? 40 plastic dip p40-1 max4456cqh 0? to +70? 44 plcc q44-1 max4456epl -40? to +85? 40 plastic dip p40-1 max4456eqh -40? to +85? 44 plcc q44-1 _________________________________________________ typical application circuits 19-1389; rev 2; 2/07 high-speed signalrouting video-on-demand systems video test equipmentvideo conferencing security systems ordering information pin configurations appear at end of data sheet. downloaded from: http:///
max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches 2 _______________________________________________________________________________________ dc electrical characteristics(v+ = +5v, v- = -5v, v load = +5v (internal load resistors on), v in_ = v agnd = v dgnd = 0v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. parameter conditions min typ max units max4359/max4360 20 32 offset voltage drift 20 ?/? buffer offset voltage t a = +25? ? ?5 supply current, all buffers on (no external load) 37 ma supply current, all buffers off 1.6 5 ma power-supply rejection ratio ?.5v to ?.5v 50 64 db operating supply voltage inferred from psrr test ?.5 ?.5 v 0.99 1.0 1.01 voltage gain v/v analog input current ?.1 ?00 na output leakage current internal load resistors off, all buffers off ?00 na t a = t min to t max ?0 mv v load = 5v 250 400 600 internal amplifier load resistor 200 765 ? digital input current ? output impedance at dc 10 ? input-logic low threshold 0.8 v input-logic high threshold 2.4 v 0.4 4 v serial mode, v ser/ par = 5v ? buffer output voltage swing internal load resistors on, no external load ?.3 v total supply voltage (v+ to v-) ...........................................+12v positive supply voltage (v+) referred to agnd .......-0.3v to +12v negative supply voltage (v-) referred to agnd ......-12v to +0.3v dgnd to agnd ..................................................................?.3v buffer short circuit to ground when not exceeding package power dissipation .............indefinite analog input voltage ............................(v+ + 0.3v) to (v- - 0.3v) digital input voltage .............................(v+ + 0.3v) to (v- - 0.3v) input current, power on or off digital inputs.................................................................?0ma analog inputs ...............................................................?0ma continuous power dissipation (t a = +70?) 36-pin ssop (derate 11.8mw/? above +70?) ...........941mw 24-pin so (derate 11.8mw/? above +70?)................941mw 40-pin plastic dip (derate 11.3mw/? above +70?)....889mw 44-pin plcc (derate 13.3mw/? above +70?) .......1066mw operating temperature ranges max4456c _ _ ....................................................0? to +70? max4_ _ _e_ _ .................................................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? absolute maximum ratings internal load resistors on, no external load, v in = 0 to 1v i ol = 0.4ma i oh = -0.4ma t a = +25? t a = t min to t max 0.98 1.0 1.02 input voltage range inferred from swing test -1.3 1.3 v ser out output-logic low/high max4456 39 50 65 t a = t min to t max t a = +25? t a = t min to t max t a = +25? t a = t min to t max t a = +25? downloaded from: http:///
max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches _______________________________________________________________________________________ 3 note 1: see dynamic test circuits section. note 2: 3db typical crosstalk improvement when r s = 0. note 3: input test signal: 3.58mhz sine wave of amplitude 40ire superimposed on a linear ramp (0 to 100ire). ire is a unit ofvideo-signal amplitude developed by the international radio engineers. 140ire = 1.0v. note 4: guaranteed by design. parameter conditions min typ max units all-hostile crosstalk 5mhz, v in = 2v p-p (notes 1, 2) 57 db output-buffer slew rate x internal load resistors on, 10pf load 250 v/? single-channel crosstalk 5mhz, v in = 2v p-p (note 1) 70 db all-channel off-isolation 5mhz, v in = 2v p-p (note 1) 80 db -3db bandwidth 10pf load, v in = 2v p-p (note 1) 35 mhz differential phase error (note 3) 1.0 degrees differential gain error (note 3) 0.5 % input noise dc to 40mhz 0.3 mv rms input capacitance all buffer inputs grounded 6 pf buffer input capacitance additional capacitance for each output buffer connected to channel input 2 pf output capacitance output buffer off 7 pf parameter latch delay symbol min typ max t d 80 units ns switch break-before-make delay t on - t off 15 ns latch edge to switch off t off 35 ns latch edge to switch on t on 50 ns write pulse width low t wl 80 ns chip-enable to write setup t ce 0 ns write pulse width high t wh 80 ns 240 data hold t dh 0 ns latch pulse width t l 80 ns conditions latch on parallel mode serial mode data setup t ds 160 ns switching characteristics(figure 4, v+ = +5v, v- = -5v, v load = +5v (internal load resistors on), v in_ = v agnd = v dgnd = 0v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 4) ac electrical characteristics(v+ = +5v, v- = -5v, v load = +5v (internal load resistors on), v agnd = v dgnd = 0v, t a = +25?, unless otherwise noted.) small-signal -3db bandwidth 10pf load, v in = 100mv p-p (note 1) 65 mhz 0.1db bandwidth 10pf load, v in = 100mv p-p (note 1) 4 mhz dynamic specifications downloaded from: http:///
max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches 4 _______________________________________________________________________________________ pin description 2 2 2 parallel data bit d0 when ser/ par = gnd. serial input when ser/ par = v cc . 3, 5 3, 5 3, 5 output buffer address lines 4, 6, 8, 10 4, 6, 8, 10 4, 6, 8, 10,12, 14, 16, 18 video input lines 7 7 7 asynchronous control line. when load = v cc , all the 400 ? internal active loads are on. when load = gnd, external 400 ? loads must be used. the buffers must have a resistive load to maintain stability. 9 9 9 digital ground. dgnd pins must have the samepotential and be bypassed to agnd. dgnd should be within ?.3v of agnd. 11 11 11 when this control line is high, the 2nd-rank registers are loaded with the rising edge of latch. if this con- trol line is low, the 2nd-rank registers are transparent when latch is low, passing data directly from the 1st-rank registers to the decoders. 12?6, 18, 22?6 22?6 no connection. not internally connected. 12 17 17 connect to v cc for serial mode; connect to gnd for parallel mode. 13 19, 30 19, 30 negative supply. all v- pins must be connected to eachother and bypassed to gnd separately (figure 2). 14 20 20 in serial mode, wr (write) shifts data into the input regis- ter. in parallel mode, wr loads data into the 1st-rank registers. data is latched on the rising edge. 1 2 1 1 1 parallel data bit d1 when ser/ par = gnd. serial out- put for cascading multiple parts when ser/ par = v cc . d1/ ser out 2 3 3, 4, 6 4, 5, 7 5, 7, 9, 11,13, 15, 17, 19 6, 8, 10, 13, 15, 17, 19, 21 8 9 10, 12 11, 14 14 16 1, 12, 23, 34 18 20 20, 34 22, 38 21 24 d0/ser in a_ in_ load dgnd edge/ level n.c. ser/ par v- wr max4360 max4456 max4359 dip plcc so ssop ssop function name pin 15 21 21 if edge/ level = v cc , data is loaded from the 1st- rank registers to the 2nd-rank registers on the risingedge of latch. if edge/ level = gnd, data is loaded while latch = gnd. in addition, data isloaded during the execution of parallel-mode func- tions 1011 through 1110, or if latch = v cc during the execution of the parallel-mode ?oftware-latchcommand (1111). 22 25 latch downloaded from: http:///
max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches _______________________________________________________________________________________ 5 pin description (continued) v+ d2 d3 agnd out_ ce ce 18, 29, 44 16, 26, 40 42 38 40 36 31, 33, 36 28, 30, 32 28, 30, 32,35, 37, 39, 41, 43 25, 27, 29,31, 33, 35, 37, 39 27 24 26 23 positive supply. all v+ pins must be connected to eachother and bypassed to agnd separately (figure 2). 13, 36 36 24 parallel data bit d2 when ser/ par = gnd. not used when ser/ par = v cc . 34 34 22 parallel data bit when ser/ par = gnd. when d3 = gnd, d0?2 specify the input channel to be con-nected to specified buffer. when d3 = v cc , d0?2 specify control codes. d3 is not used in serial mode(ser/ par = v cc ). 32 32 20 analog ground. agnd must be at 0.0v, since the gain-setting resistors of the buffers are connected to these pins. 15, 29 29 18 buffer outputs. buffer inputs are internally grounded witha 1000 or 1001 command from the d3?0 lines. 28, 31, 33, 35 28, 31, 33, 35 17, 19, 21, 23 active-high chip enable. wr is enabled when ce = gnd and ce = v cc . wr is disabled when ce = v cc and ce = gnd. 27 27 16 active-low chip enable. wr is enabled when ce = gnd and ce = v cc . wr is disabled when ce = v cc and ce = gnd. plcc dip ssop ssop so name pin function max4456 max4360 max4359 downloaded from: http:///
max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches 6 _______________________________________________________________________________________ detailed description output buffers the max4456 video crosspoint switch consists of 64 t-switches in an 8x8 grid (figure 1). the eight matrix outputs are followed by eight wideband buffers opti- mized for driving 400 ? and 20pf loads. the max4359? core is a 4x4 switch matrix with each of itsoutputs followed by a wideband buffer. the max4360 has an 8x4 matrix and four output buffers. each buffer has an internal active load on the output that can be readily shut off through the load input (off when load = 0v). the shut-off is useful when two or more cross- points are connected in parallel to create more input channels. with more input channels, only one set of buffers can be active and only one set of loads can bedriven. when active, the buffer must have either 1) an internal load, 2) the internal load of another buffer in another max4359/max4360/max4456, or 3) an exter- nal load. each output can be disabled under logic control. when a buffer is disabled, its output enters a high-impedance state. in multichip parallel applications, the disable function prevents inactive outputs from loading lines driven by other devices. disabling the inactive buffers reduces power consumption. the outputs connect easily to max4395 quad, opera- tional amplifiers when back-terminated 75 ? coaxial cable must be driven. a = +1 in0 in1 in2 in3 in4 in5 in6 in7 output buffers out0 400 ? load latch edge/level 2nd-rank registers 1st-rank registers wrce ce a0 a1 a2 d3 d2 v+ v- agnd dgnd d1/ser out d0/ser in ser/par max4456 8x8 switch matrix a = +1 out7 400 ? figure 1. max4456 functional diagram downloaded from: http:///
max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches _______________________________________________________________________________________ 7 power-on reset the max4359/max4360/max4456 have an internalpower-on reset (por) circuit that remains low for 5? after power is applied. por also remains low if the total supply voltage is less than 4v. the por disables all buffer outputs at power-up , but the switch matrix is not preset to any initial condition. the desired switchstate should be programmed before the buffer outputs are enabled. digital interface the desired switch state can be loaded in a parallel-interface mode or serial-interface mode (table 3 and figures 4, 5, 6). all action associated with the wr line occurs on its rising edge. the same is true for the latch line if edge/level is high. otherwise, the sec- ond-rank registers update while latch is low (when edge/level is low). wr is logically anded with ce and ce (when present) to allow active-high or active- low chip enable. 6-bit parallel-interface mode (max4359/max4360) in the max4359/max4360? parallel-interface mode(ser/ par = gnd), the six data bits specify an output channel (a1, a0) and the input channel to which it con-nects (d3?0). this data is loaded on the rising edge of wr. the input channels are selected by codes 0000 through 0111 (d3?0) for the max4360, and codes0000 through 0011 (d3?0) for the max4359. note that the max4359 does not use codes 0100 through 0111. the eight codes 1000 through 1111 control other func- tions, as listed in table 1. 7-bit parallel-interface mode (max4456) in the max4456? parallel-interface mode (ser/ par = gnd), the seven data bits specify an output channel(a2, a1, a0) and the input channel to which it connects (d3?0). this data is loaded on the rising edge of wr. the input channels are selected by codes 0000 through 0111 (d3?0) for the max4456. the remaining eight codes 1000 through 1111 control other functions, as listed in table 1. 16-bit serial-interface mode (max4359/max4360) in serial mode (ser/ par = v cc ), all first-rank registers are loaded with data, making it unnecessary to specifyan output address (a1, a0). the input data format is d3?0, starting with out0 and ending with out3 for 16 total bits. for the max4360, only codes 0000 through 1010 are valid. for the max4359, only the codes 0000 through 0011 and codes 1000 through 1010 are valid. code 1010 disables a buffer, while code 1001 enables it. after data is shifted into the 16- bit first-rank register, it is transferred to the second rank by latch (table 2), which updates the switches. table 1. parallel-interface mode functions for the max4359, unused codes. 0100 and 0111 do not use these codes in the parallel-interface mode. these codes are for the serial-interface mode only. 1001 and 1010 send a pulse to the 2nd-rank registers to load them with the contents of the 1st-rankregisters. when latch is held high, this ?oftware-latch?command performs the same function as pulsing latch low. 1111 turn on all buffers, and restore the connected channels. 1110 turn off all buffers, and leave 2nd-rank registers unchanged. 1101 turn on the buffer selected by a2?0 (max4456) or a1?0 (max4359/max4360, andrestore the previously connected channel. 1100 shut off the buffer selected by a2?0 (max4456) or a1?0 (max4359/max4360) andretain 2nd-rank registers contents. 1011 connect the buffer selected by a2?0 (max4456) or a1?0 (max4359/max4360) todgnd. note, if the buffer output is on, its output is its offset voltage. 1000 connect the buffer selected by a2?0 (max4456) or a1?0 (max4359/max4360) to theinput channel selected by d3?0. 0000 to 0111 function d3?0 a2, a1, a0 selects output buffer downloaded from: http:///
max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches 8 _______________________________________________________________________________________ 32-bit serial-interface mode (max4456) in serial mode (ser/ par = v cc ), all first-rank registers are loaded with data, making it unnecessary to specifyan output address (a2, a1, a0). the input data format is d3?0, starting with out0 and ending with out7 for 32 total bits. only codes 0000 through 1010 are valid. code 1010 disables a buffer, while code 1001 enables it. after data is shifted into the 32-bit first-rank register, it is transferred to the second rank by latch (table 2), which updates the switches. typical application figure 2 shows a typical application of the max4456(pdip) with the max4395 quad, operational amplifiers at the outputs to drive 75 ? loads. this application shows the max4456 digital-switch control interface setup in the 7-bit parallel mode. the max4456 uses seven data lines and two control lines (wr and latch). two additional lines may be needed to control ce and load when using multiple max4456s. the input/output information is presented to the chip at a2, a1, a0, and d3?0 by a parallel printer port. the data is stored in the 1st-rank registers on the rising edge of wr. when the latch line goes high, the switch configuration is loaded into the 2nd-rank regis- ters, and all eight outputs enter the new configuration at the same time. each 7-bit word updates only one out- put buffer at a time. if several buffers are to be updat- ed, the data is individually loaded into the 1st-rank reg- isters. then, a single latch pulse is used to reconfig- ure all channels simultaneously. the short basic program in figure 3 loads programming data into the max4456 from any ibm pc or compatible. it uses the computer? ?pt1?output to interface to the cir- cuit, then automatically finds the address for lpt1 and displays a table of valid input values to be used. the pro- gram does not keep track of previous commands, but it does display the last data sent to lpt1, which is written and latched with each transmission. a similar application is possible with the max4359/max4360. serial / parallel d3 h x l h l (a2), a1, a0 x output buffer address output buffer address d1 serial output parallel input parallel input d2 x parallel input parallel input d0 serial input parallel input parallel input comment serial mode parallel mode,d0?2 = control code parallel mode,d0?2 = input address l table 3. input/output line configurations x = don? care, h = 5v, l = 0v( ) are for max4456 only. table 2. serial-interface mode functions d3?0 function 0000 to 0111 connect the selected buffer to the inputchannel selected by d3?0. note that 0100 through 0111 are not valid for the max4359. 1000 connect the input of the selected buffer tognd. note: if the buffer output remains on, its input is its offset voltage. 1001 turn on the selected buffer and connectits input to gnd. use this code to turn on buffers after power is applied. the default power-up state is all buffers disabled. 1010 shut off the selected buffer at the speci-fied channel, and erase data stored in the 2nd rank of registers. the 2nd rank now holds the command word 1010. 1011 to 1111 do not use these codes in the serial-inter-face mode. they inhibit the latching of the 2nd-rank registers, which prevents proper data loading. chip information max4359 transistor count: 2372max4360 transistor count: 2372 max4456 transistor count: 3820 downloaded from: http:///
max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches _______________________________________________________________________________________ 9 figure 2. max4456 (plastic dip) typical application circuit 5 7 11 9 1315 17 19 39 37 3533 32 1 411 31 2927 25 24 14 8 40 26 2221 3 4 6 36 38 1 2 28, 30, 32 10, 12 2034 23 18 16 1 2 3 45 6 78 18 19 2021 2223 2425 14 8 input video channels in0in1 in2 in3 in4in5 in6 in7 latch wr d0/ser in d1/ser outd2 d3 a0 a1a2 out0 out1out2 out3 out4 out5 out6 out7 ce edge/level load v+v+ agnd dgnd v- v- ce ser/par v+ +5v +5v -5v -5v z o = 75 +5v note: all bypass capacitors are 0.1 f ceramic db?5 max4395 75 ? 75 ? 200 ? 200 ? 56 7 z o = 75 max4395 75 ? 75 ? 200 ? 200 ? 10 9 8 z o = 75 max4395 75 ? 75 ? 200 ? 200 ? 1213 14 z o = 75 max4395 75 ? 75 ? 200 ? 200 ? max4456 downloaded from: http:///
max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches 10 ______________________________________________________________________________________ a0?2 d0?3 wr latch valid data n-1 valid data n t ds t wl t dh t wh t d t l timing diagrams figure 3. basic program for loading data into the max4456 from a pc using figure 2? circuitfigure 4. write timing for serial- and parallel-interface modes downloaded from: http:///
max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches ______________________________________________________________________________________ 11 data (n)data (n) data (n) data (n + 1) data (n + 1) data (n + 1) data (n + 2) data (n) data (n + 1) data (n + 2) note: see figure 4 for wr and latch timing. wr latch 1st-rank register data 2nd-rank register data (edge/level = gnd) 2nd-rank register data (edge/level = v cc ) timing diagrams (continued) figure 5. parallel-interface mode format (ser/ par = gnd) 0d3 0d2 0d1 0d0 1d3 1d2 7d3 7d2 7d1 7d0 data valid data valid notes: see table 2 for input data. see figure 4 for wr and latch timing. wr latch input data for out0 input data for out1 to out6 input data for out7 2nd-rank register data (edge/level = gnd) 2nd-rank register data (edge/level = v cc ) figure 6. serial-mode interface format (ser/ par = v cc ) downloaded from: http:///
max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches 12 ______________________________________________________________________________________ note 1: connect load to +5v (internal 400 ? loads on at all outputs). note 2: program any one input to connect to any one output. see table 1 or 2 for programming codes. note 3: turn on the buffer at the selected output (table 1 or 2). note 4: drive the selected input with v in , and measure v out at the -3db frequency at the selected output. note 5: program each numbered input to connect to the same numbered output (in0 to out0, in1 to out1, etc., for the max4456;also in4 to out0, in5 to out1, etc., for the max4360.) see table 1 or 2 for programming codes. note 6: turn off all output buffers (table 1 or 2). note 7: drive all inputs with v in , and measure v out at any output. note 8: isolation (in db) = 20log 10 (v out /v in ). note 9: turn on all output buffers (table 1 or 2). note 10: drive any one input with v in , and measure v out at any undriven output. note 11: crosstalk (in db) = 20log 10 (v out /v in ). note 12: drive all but one input with v in , and measure v out at the undriven output. max4456 out0 out1 out2 out3 out4 out5 out6 out7 load in0 in1 in2 in3 in4in5 in6 in7 v out v out v out v out v out v out v out v out +5v max4456 out0 out1 out2 out3 out4 out5 out6 out7 load in0 in1 in2 in3 in4in5 in6 in7 v out +5v max4456 out0 out1 out2 out3 out4 out5 out6 out7 load in0 in1 in2 in3 in4in5 in6 in7 v out v out v out v out v out v out v out +5v max4456 out0 out1 out2 out3 out4 out5 out6 out7 load in0 in1 in2 in3 in4in5 in6 in7 v out +5v v in = 2v p-p , sweep frequency r s = 75 ? v in = 2v p-p at 5mhz r s = 75 ? v in = 2v p-p at 5mhz r s = 75 ? v in = 2v p-p at 5mhz r s = 75 ? -3db bandwidth (notes 1?) all-channel off-isolation (notes 1, 5?) all-hostile crosstalk (notes 1, 5, 9, 11, 12) single-channel crosstalk (notes 1, 5, 9?1) 7 x 75 ? 75 ? dynamic test circuits downloaded from: http:///
max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches ______________________________________________________________________________________ 13 pin configurations top view 2423 22 21 20 19 18 17 12 3 4 5 6 7 8 v+out0 d2 out1 in0 a1 d0/ser in d1/ser out d3out2 agnd out3 in2 load in1 a0 1615 14 13 9 1011 12 celatch wr v- ser/par edge/level in3 dgnd so max4359 3635 34 33 32 31 30 29 2827 26 25 24 23 12 3 4 5 6 7 8 9 1011 12 13 14 v+out0 d2 out1 d3 out2n.c. v-agnd out3 ce n.c. n.c. n.c. n.c. n.c. n.c. edge/level in3 dgnd in2 load in1 a0 in0 a1 d0/ser in d1/ser out ssop max4359 2221 20 19 1516 17 18 v- n.c.latch wr n.c. ser/par n.c. n.c. 3635 34 33 32 31 30 29 2827 26 25 24 23 12 3 4 5 6 7 8 9 1011 12 13 14 v+out0 d2 out1 d3 out2n.c. v-agnd out3 ce n.c. n.c. n.c. in5 v+ in4 edge/level in3 dgnd in2 load in1 a0 in0 a1 d0/ser in d1/ser out ssop max4360 2221 20 19 1516 17 18 v- n.c.latch wr in7 ser/par in6 agnd 4039 38 37 36 35 34 33 32 31 12 3 4 5 6 7 8 9 10 v+out0 d2 out1 a1 a2 d0/ser in d1/ser out max4456 d3out2 v- out3 load in1 a0 in0 agnd out4 dgnd in2 3029 28 27 26 25 24 23 22 21 agndout5 agnd out6 v+out7 ce ce latch wr 11 1213 14 15 16 17 18 19 20 edge/level in4 dgnd in3 ser/par in6 v+ in5 v- in7 dip 1234 54 0 41 42 43 44 6 20 23 25 24 26 27 28 21 22 18 19 78 9 1011 12 13 14 15 16 17 29 30 31 32 33 34 35 36 37 38 39 in5 out2 in6 in0 max4456 plcc a1a2 d0/ser in d1/ser out n.c. v+ out0 d2 out1 d3 v+ in7 ser/par n.c. v- latch wr ce ce out7 v-out3 agnd out4 n.c. agnd out5 agnd out6 v+ edge/level in4 dgnd in3 n.c. dgnd in2 load in1 a0 downloaded from: http:///
ssop.eps package outline, 36l ssop, 0.80 mm pitch 1 1 21-0040 e rev. document control no. approval proprietary information title: front view max 0.011 0.1040.017 0.299 0.013 inches 0.291 0.009 e c dim 0.012 0.004 b a1 min 0.096 a 0.23 7.40 7.60 0.32 millimeters 0.10 0.30 2.44 min 0.44 0.29 max2.65 0.040 0.020 l 0.51 1.02 h 0.414 0.398 10.11 10.51 e 0.0315 bsc 0.80 bsc d 0.612 0.598 15.20 15.55 h e a1 a d e b 0 -8 l c top view side view 1 36 max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches 14 ______________________________________________________________________________________ package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) downloaded from: http:///
max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches ______________________________________________________________________________________ 15 soicw.eps package outline, .300" soic 1 1 21-0042 b rev. document control no. approval proprietary information title: top view front view max 0.012 0.1040.019 0.299 0.013 inches 0.291 0.009 e c dim 0.014 0.004 b a1 min 0.093 a 0.23 7.40 7.60 0.32 millimeters 0.10 0.35 2.35 min 0.49 0.30 max2.65 0.050 0.016 l 0.40 1.27 0.512 0.496 d d min dim d inches max 12.60 13.00 millimeters min max 20 ac 0.447 0.463 ab 11.75 11.35 18 0.398 0.413 aa 10.50 10.10 16 n ms013 side view h 0.419 0.394 10.00 10.65 e 0.050 1.27 d 0.614 0.598 15.20 24 15.60 ad d 0.713 0.697 17.70 28 18.10 ae h e n d a1 b e a 0 -8 c l 1 variations: package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) downloaded from: http:///
max4359/max4360/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches 16 ______________________________________________________________________________________ plcc.eps family package outline: 20l, 28l, 44l, 52l, 68l plcc 1 1 21-0049 d rev. document control no. approval proprietary information title: d1 d c a2 b1 b a1 a a3 d2 e d3 d1 d d3 n 22.61 20.32 0.800 d3 d2 0.890 0.930 ref ref 23.62 4.202.29 3.69 0.51 0.33 0.66 0.23 9.788.89 7.37 5.08 12.3211.43 9.91 7.62 17.4016.51 14.99 12.70 min min 24.13 25.02 0.120 0.090 a1 ref d3 0.200 0.485 0.300 0.685 0.500 0.985 d d1d2 d3 d1 d 0.6500.590 0.950 d d1d2 d3 0.4500.390 0.695 0.6560.630 0.958 0.995 ref 0.4950.456 0.430 ref 0.050 0.385 inches d d1d2 0.3500.290 min a2a3 b b1 ce 0.1450.020 0.013 0.026 0.009 0.3950.356 0.330 max 0.1560.021 0.032 ---0.011 inches a 0.165 min 0.180 max 3.04 ref 2844 68 17.65 16.6616.00 ref 24.33 25.27 12.5711.58 10.92 ref ac ae ab 10.039.04 8.38 max n 20 3.96--- 0.53 0.81 0.28 1.27 aa 4.57 max notes: 1. d1 does not include mold flash. 2. mold flash or protrusions not to exceed .20mm (.008") per side. 3. leads to be coplanar within .10mm. 4. controlling dimension: millimeter 5. meets jedec mo047-xx as shown in table. 6. n = number of pins. ref ref d3 0.600 15.24 17.53 19.05 19.94 d1d2 d 0.7500.690 0.785 0.756 0.7950.730 52 19.20 20.1918.54 ad millimeters millimeters package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) downloaded from: http:///
max4359/max4560/max4456 low-cost 4x4, 8x4, 8x8 video crosspoint switches maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 17 2007 maxim integrated products is a registered trademark of maxim integrated products, inc. pdipw.eps package outline, .600" pdip 1 1 21-0044 b rev. document control no. approval proprietary information title: top view front view 0.700 max - 0.2000.020 0.080 0.009 0.625 0.012 0.065 0.600 bsc inches e1 - ea eb 0.005 0.600 0.008 d1e c dim 0.045 0.016 0.055 0.015 bb1 a1a3 min - a 15.24 bsc - 0.13 0.21 15.24 17.78 0.22 15.87 0.30 millimeters 0.390.41 1.401.14 - min 0.511.65 - 2.03 max 5.08 a2 0.125 0.175 3.18 4.45 0.525 0.575 13.34 14.61 e 0.100 bsc 2.54 bsc 0.150 0.120 l 3.05 3.81 2.075 2.025 d d min dim d inches max 51.44 52.71 millimeters min max 40 ac 1.430 1.470 ab 37.34 36.32 28 1.230 1.270 aa 32.26 31.24 24 n ms011 n d a l a1 e b b1 a2 a3 e1 e c ea eb 0 -15 side view 1 d1 variations: package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) revision history pages changed at rev 2: 1, 6, 8, 9, 14?7 downloaded from: http:///

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