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  rev. 1.00 1 january 05, 2017 rev. 1.00 pb february 14, 2017 ht42b533-x usb to spi bridge ic usb bridge ic naming rules ht42b 5 33 -x product family ht42b = holtek bridge ic bridge series of host 5 = usb usb class type version 1 = first version bridge series of device 2 = i 2 c 3 = spi 4 = uart 3 = cdc class 6 = hid class features ? operating v oltage (v dd ): 3.3 v~5.5v ? spi pins v oltage (v ddio ): 1.8v~v dd (less than v dd voltage) ? fully integrated internal 12mhz oscillator with 0.25% accuracy for all usb modes which requires no exter - nal components ? usb interface ? usb 2.0 full speed compatible ? implements usb protocol composite device: C communication device class (cdc) for communications and confguration. C human interface device (hid) for user confgure usb vid, pid and device description strings ? integrated an internal 1.5k pull-high resistor on d+ pin ? serial interface C spi ? supports clock rate up to 8mhz ? support s master and slave mode s decided by ap command ? support s maximum 128 bytes transmit buf fer and 128 bytes receive buffer ? support s sdi (master mode) / scs (slave mode) pin resume signal to request a remote wake-up ? supports vddio pin for spi pins power supply ? support st andard w indows? d rivers f or v irtual com port (vcp): windows xp (sp2) , v ista, windows 7 , w indows 8, w indows 8.1 (only an inf fle is required) and w indows 10. ? support android 4.0 or later version and mac os x ? integrated 256 bytes internal true eeprom for user memory ? p ower down and wake-up functions to reduce power consumption ? package type s: 10-pin msop, 16-pin nsop general description the ht42b533-x is a high performance usb to spi bridge controller with fully integrated usb and spi interface func tions , de signed for a pplications t hat communicate with various types of spi . the device includes a usb 2. 0 fu ll spe ed c ompatible i nterface which is used for pc commication . t he device also include s a fully integrated high speed oscillator which is used for usb and spi clock generator.
rev. 1.00 2 january 05, 2017 ht42b533-x selection table most features are common to all devices. the following table summarises the main features of each device. part no. description v dd usb virtual com hid fifo/buffer interface data rate i/o v dd package ht42b532-x usb to i 2 c bridge 3.3v~ 5.5v full-speed C tx: 62 bytes rx: 62 bytes up to 400khz 8sop , 10msop ht42b533-x usb to spi bridge C tx: 128 bytes rx: 128 bytes up to 8mhz 10msop , 16nsop HT42B534-X usb to uart bridge C tx: 128 bytes rx: 128 bytes up to 3mbps baud 8/10sop , 10msop , 16nsop ht42b564-x usb (hid) to uart bridge C tx: 32 bytes rx: 32 bytes up to 115.2kbps baud 10sop block diagram 3.3v regulator clock generator spi vid pid configure 128b rx buffer usb phy internal oscillator external microcontroller circuitry scs d+ d- vdd gnd ht42b533-x usb to spi bridge v33o vddio device power 128b tx buffer usb controller sdo sdi sck gpio pwm pin assignment v33o gnd scs sdo vddio sdi sck d- d+ vdd 10 9 8 7 6 1 2 3 4 5 ht42b533-1 10 msop-a d+ d- v33o gnd sdo nc led gpio3/pwm vddio sdi gpio2 sck gpio1 gpio0 vdd 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 scs ht42b533-1 16 nsop-a package type marking 10msop b533-x 16nsop ht42b533- x note: x=1 for version number.
rev. 1.00 3 january 05, 2017 ht42b533-x pin descriptions as the pin description table applies to the package type with the most pins, not all of the listed pins may be present on package types with smaller numbers of pins. pin name type description d+ i/o usb d+ line d- i/o usb d- line scs i/o spi slave select sdo o spi data output sdi i spi data input sck i/o spi serial clock led o data transfer signal led indication, active low pwm o pulse width modulator output (only for 16nsop package) gpio0~3 i/o gpio v33o o 3.3v regulator output vddio pwr positive power supply for scs, sdo, sdi, sck pins vdd pwr positive power supply, usb bus power gnd pwr negative power supply, ground absolute maximum ratings supply v oltage ........................... v ss -0.3v to v ss +6.0v input v oltage .............................. v ss -0.3v to v ss +0.3v storage t emperature .......................... -50c to 125c operating t emperature ........................ -40c to 85c i oh t otal ............................................................ -80ma i ol t otal .............................................................. 80ma total power dissipation .................................. 500mw note: t hese a re st ress ra tings onl y. st resses e xceeding t he ra nge spe cifed unde r "absol ute ma ximum ra tings" may c ause subst antial da mage t o t his de vice. funct ional ope ration of t hese de vices a t ot her c onditions beyond those li sted in the speci fcation i s not im plied and prol onged exposure to extrem e conditi ons ma y affect device reliability. d.c. characteristics ta=25c symbol parameter test conditions min. typ. max. unit v dd conditions v dd operating voltage 3.3 5.5 v v ddio vddio input voltage for spi pins 1.8 v dd v i dd operating current 5v no load 11 16 ma i sus suspend current (usb) 5v suspend mode, no load, usb on, other peripherals off 360 450 a v il input low voltage for input pins 0 0.2v ddio v v ih input high voltage for input pins 0.8v ddio v ddio v i ol sink current for i/o pins 3v v ol = 0.1v ddio 4 8 ma 5v 10 20 ma i oh source current for i/o pins 3v v oh = 0.9v ddio -2 -4 ma 5v -5 -10 ma r ph pull-high resistance for i/o ports 3v 20 60 100 k 5v 10 30 50 k
rev. 1.00 4 january 05, 2017 ht42b533-x symbol parameter test conditions min. typ. max. unit v dd conditions i leak input leakage current 3v v in = v dd or v in = v ss 1 a 5v 1 a v v33o 3.3v regulator output v oltage 5v i v33o = 70ma 3.0 3.3 3.6 v r udp1 pull-high resistance between d+ and v33o 3.3v -5% 1.5 +5% k a.c. characteristics ta=25c symbol parameter test condition min. typ. max. unit v dd condition f hirc high speed internal rc o scillator 3.3v~5.5v usb mode -0.25% 12 +0.25% mhz t sst system start-up timer period spi pins wake-up from power down mode sdi(master mode)/ scs(slave mode) 16 t hirc t rstd system reset delay t ime power-on reset 25 50 100 ms power-on reset characteristics ta=25c symbol parameter test conditions min. typ. max. unit v dd conditions v por v dd start voltage to ensure power-on reset 100 mv rr por v dd rising rate to ensure power-on reset 0.035 v/ms t por minimum time for v dd stays at v por to ensure power-on reset 1 ms v dd t por rr por v por time
rev. 1.00 5 january 05, 2017 ht42b533-x usb interface the usb interface , being usb 2.0 full-speed compatible, is a 4-wire se ries b us t hat allows c ommunication between a host de vice a nd up t o 127 m ax pe ripheral devices on the same bus. a token based protocol method is used by the host device for communication control. other advantages of the usb bus include live plugging and unplugging and dynamic device confg - uration. as the complexity of usb data protocol does not permit comprehensive usb operation information to be provided in this datasheet, the reader should therefore consult other external information for a detailed usb understanding. the device include s a usb i nterface funct ion al lowing for t he conveni ent design of usb peripheral products. power plane there are t wo power planes for the device and they are the usb bus power input ( v dd ) and 3.3v regulator output (v 33o ). for t he usb sie v dd , it will supply power for all circuits related to usb sie and it is sourced from pin " vdd ". once the usb is removed from the usb and there is no power in the usb bus, the usb sie circuit is no longer operational. usb interface operation to communicate with an external usb host, the in - ternal usb module has the external pins known as d+ a nd d- a long wi th t he 3 .3v re gulator o utput pin v33o. a serial interface engine (sie) decodes the incoming usb data stream and transfers it to the correct endpoint buf fer memory know n as the fif o . the usb module has 4 endpoints , ep0 ~ ep3. t he endpoint 0 supports the control transfer while the endpoint 1 ~ endpoint 3 support the interrupt or bulk transfer . the ht42b53 3-x b ridge ic support s the usb communication devi ce class (cdc) for communications and confguration. endpoint transfer t ype 0 control 1 interrupt 2 bulk out 3 bulk in usb endpoint transfer type if there is no signal on the usb bus for over 3ms, the usb device will enter the suspend mode. the device enters the suspend state to meet the requirements of the usb suspe nd current spe c ification . w hen t he resume signal is asserted by the usb host, the device will be woken up and leave the suspend mode. as t he usb device ha s a re mote wa ke-up fu nction, the usb device can wake up the usb host by sending a remote wake-up pulse . o nce the usb host receives a remote wake-up signal from the usb device, the host will send a resume signal to device. usb vid and pid confgure the device has configured the default v ender id (vid:0x04d9), pr oduct i d ( pid:0xb533) a nd product de scription strings of " usb t o spi bri dge ". the user can update v ender id, product id, product description strings and remote wake-up setting using their application programs. th is device has been configured to the d efault usb c onfguration data as shown in the following table. parameter value ( hex) usb vendor id (vid) 0x04d9 usb product id (pid) 0xb533 remote wake-up default disable manufacturer name holtek product description usb to spi bridge serial number 0000
rev. 1.00 6 january 05, 2017 ht42b533-x spi interface the ht42b533-x c ontain s a n spi fun ction. t he spi interface is often us ed to communicate w ith external peripheral devices s uch as microcontrollers, sensors, flash devices, etc. originally developed by motorola, the four line spi interface is a synchronous serial data interface t hat ha s a re latively si mple c ommunication protocol si mplifying t he progra mming requirements when communicating with external hardware devices. spi interface operation the c ommunication i s f ull d uplex a nd o perates a s a slave/master type, where the devices can be either master or slave. although the spi interface specification can control multiple slave devices from a single master , the device provide s only one scs pin. if the master needs to control multiple slave devices from a single master, t he m aster c an use a gp io pi n t o se lect t he slave devices. it is a four l ine interface with pin n ame s sdi, sdo, sck and scs . pins sdi and sdo are the serial data input and serial data output lines . t he sck pin is the serial clock line and scs is the slave select line. the spi serial interface function includes the following features: ? full-duplex synchronous data transfer ? both master and slave mode ? master mode serial clock frequency up to 8mhz ? lsb frst or msb frst data transmission modes ? rising or falling active clock edge ? 128-byte deep fifo t ransmit data buffer ? 128-byte deep fifo receive data buffer ? sdi pin (master mode) or scs pin (slave mode) wake-up function ? spi pins power supply by the vddio pin spi communication after the spi interface is enabled using the application program , then in the master m ode, when data is writ ten , transmission/reception wi ll be gin si multaneously. in the slave m ode, when the clock signal from the master has been received , any data in the spi tx fifos will be transmitted by the sdo pin and any data on the sdi pin will be shifted into the spi rx fifo s. the master should output a scs signal to enable the slave de vice s be fore a c lock signal i s provi ded. t he slave data to be transferred should be well prepared at the appropriate moment relative to the sck signal depending upon the configurations of the ckpol b bit and ckeg bit. the accompanying timing diagram shows t he re lationship be tween t he sl ave da ta a nd sck signal for various configurations of the ck- signal for va rious c onfigurations of t he ck - pol b and ckeg bits. the spi will continue to func- b and ckeg bits. the spi will continue to func- and ckeg bits. the spi will continue to func- the spi will continue to func- the spi will continue to func - tion if the spi clock source is active. sck spi master sdo sdi scs sck spi slave sdi sdo scs spi master/slave connection spi timing setup mode ckpolb ckeg descrition mode 3 0 0 sck is high base level when the clock is inactive and data is captured at sck rising edge mode 2 0 1 sck is high base level when the clock is inactive and data is captured at sck falling edg mode 1 1 0 sck is low base level when the clock is inactive and data is captured at sck falling edge mode 0 1 1 sck is low base level when the clock is inactive and data is captured at sck rising edge
rev. 1.00 7 january 05, 2017 ht42b533-x sck (ckpolb=1, ckeg=0) sck (ckpolb=0, ckeg=0) sck (ckpolb=1, ckeg=1) sck (ckpolb=0, ckeg=1) scs sdo (ckeg=0) sdo (ckeg=1) sdi data capture write to spi tx fifos d7/d0 d6/d1 d5/d2 d4/d3 d3/d4 d2/d5 d1/d6 d0/d7 d7/d0 d6/d1 d5/d2 d4/d3 d3/d4 d2/d5 d1/d6 d0/d7 spi master mode timing sck (ckpolb=1) sck (ckpolb=0) scs sdo sdi data capture write to spi rx fifos (sdo does not change until first sck edge) d7/d0 d6/d1 d5/d2 d4/d3 d3/d4 d2/d5 d1/d6 d0/d7 spi slave mode timing C ckeg=0 sck (ckpolb=1) sck (ckpolb=0) scs sdo sdi data capture d7/d0 d6/d1 d5/d2 d4/d3 d3/d4 d2/d5 d1/d6 d0/d7 write to spi rx fifos (sdo changes as soon as writing occurs; sdo is floating if scs=1) spi slave mode timing C ckeg=1
rev. 1.00 8 january 05, 2017 ht42b533-x spi clock t he sck pin clock for the master m ode can be set using the holtek bridge api command to defne the desired value, as shown below. spi mode spi clock value ( hex) master 8mhz 02 master 6mhz 03 master 4mhz 04 master 3mhz 05 master 1mhz 06 master 750khz 07 master 250khz 08 slave 09 spi power down and wake-up if the usb host sends a suspend signal to the ht42b533-x usb device, it will enter the suspend mode. it is recommended to ensure that the spi data transmission or reception has been fnished before the device enter s the suspend mode. the spi function contains the sdi pin (master mode) and scs pi n (sl ave m ode) wake-up func tion s. a falling edge on the sdi pin or scs pin will wake up the device from the suspend m ode. holtek bridge dll user guide line holtek usb bridge program holtek has provided the dll to build the ht42b533-x/ht42b532-x bridge ic application programs for us b to spi or us b to i 2 c dat a communication . t he api de scriptions a re de scribed as below. ? htb_api bool opendevice(int ncom); holtek bridge operates in the format of v irtual com port. defne the com port number using the parameter. ? htb_api void closedevice(); used to turn off the bridge device. ? htb_api bool setiicdatarate(int ndr); used to configure the i 2 c data rate (for usb to i 2 c bridge). refer to holtekbridgedll.h for parameter defnition. ? htb_api bool setspidatarate(int ndr); used to configure the spi data rate (for usb to spi b ridge). r efer t o ho ltekbridgedll.h f or parameter defnition. ? htb_api bool setspimode(int nmode, int norder, int ncsb); ? refer t o holt ekbridgedll.h for pa rameter defnition. ? used to confgure spi mode 0/1/2/3, lsb/msb, and whether to use csb (for usb to spi bridge). ? when in the spi slave mode, csb must be enabled. ? htb_api bool setiicmode(int nmode, int naddr); used to configure i 2 c master or slave mode and address. ? htb_api bool setiic_receiverend(bool back) ; ? used to configure when the master receiver ends transmission, i 2 c returns ack or nack. back: when the data length defined by setdirection or brread has been received, i 2 c will return ack or nack. true: ack false: nack ? after t he ope ndevice a ction, t his pa rameter s default status is nack. the parameter should be c onfigured a fter ope ndevice a nd be fore read/write actions. ? htb_api bool setiic_restart(bool brestart) ; ? used t o d efine t he si gnal behavior whe n i n t he master mode. brestart: when the data length defined by setdirection or brread has been received or transmitted, i 2 c will generate a st op signal or restart signal. true: restart false: stop ? after t he ope ndevice a ction, t his pa rameter s default status is st op. the parameter should be confgured before read/write actions. ? htb_api bool brread(char *p, dword nlen, dword&bytesread, dword dwtimeout); ? read if the i 2 c receiver returns nack, the return value is false; " bytesread " indicates the actual byte count being re ad, i f i t i s not e nough, c ontinue c all read function. " dwtimeout " indicates the waiting time for read, unit: ms . ? htb_api bool brwrite(char *p, dword nlen); ? write if the i 2 c receiver returns nack, the return value is false;
rev. 1.00 9 january 05, 2017 ht42b533-x ? htb_api bool finalize(); ? to end the current transmission. ? when i n t he spi m aster m ode a nd c sb i s enabled, calling this function will pull csb high. ? when in the spi slave mode, calling this function will reset the bridge to its receiver default status. ? htb_api bool resetdevice(); reset b ridge. t his a ction wi ll c lear t he c ontents already stored in the bridge fifo. ? htb_api bool slavecsbfalling() ; when in the spi slave mode, this function is used to detect whether the master has re-enabled csb. if yes, it means the master will re-transmit commands, in which case call finalize or resetdevice to reset the bridge to its receiver default status. ? htb_api bool setdirection(byte ucdir, word uclen); ? htb_api bool pureread(char *p, word uclen, word &bytesread,dword dwtimeout); ? htb_api bool purewrite(char *p, word nlen); ? for both spi and i 2 c, before switching bewteen read and w rite, frst to set direction. ? setdirection(dir_read,len) + pureread = brread ? setdirection(dir_write,len) + purew rite = brwrite ? the setdirection function defines the total length " len " , pure read or pure write support s any l ength b ut t heir t otal l ength c an n ot l arger than "len". ? " dwtimeout " indicates the waiting time for read, unit: ms . ? htb_api bool setgpiowakeup(byte); ? used to confgure gpio0/gpio1/gpio2/gpio3 with or without wake up function. ? this pa rameter i s t ransmitted i n t he form at of or. fo r e xample, t o e nable gpi o0 a nd gpi o2 wake up functions, the parameter is set as shown below: setgpiowakeup(gpio0|gpio2); ? htb_api bool setgpiopullup(byte); ? used to confgure gpio0/gpio1/gpio2/gpio3 with or without pull-high function. ? this parameter is set in the same way as the previous one. ? htb_api bool setgpioinput(byte); ? used to confgure gpio0/gpio1/gpio2/gpio3 input/output direction. ? setgpioinput(gpio1|gpio2) i ndicates gpi o1/ gpio2 are input, gpio0/gpio3 are output. ? htb_api bool setpwm(bool benable, pwm *pwm=null); ? used to confgure the desired pwm value, then the pwm signal will be generated on gpio3. ? refer to the associated bridge user manual for more details about the setup value. the pwm structure is described as below: bperiod defnes period width, unit: clock bclock defnes pwm clock frequency bactivelevel defnes active low or active high boutputmode defnes pwm signal output mode bopmode defnes pwm operating mode wduty defnes duty width, unit: clock
rev. 1.00 10 january 05, 2017 ht42b533-x example setup pwm pwm pwm; pwm.bperiod=pd_1024_clk; pwm.bclock=clk_3m; pwm.bactivelevel=active_low; pwm.boutputmode=pwm_output; pwm.bopmode=pwm_output; pwm.wduty=0x80; bool bret = setpwm(true,&pwm); read device which needs a ack response dword dw=0; char szbuf[9]={0x10,0,0,0,0,0,0,0,0}; char szread[16]; bool bret=opendevice(3); bret=setiic_receiverend(true); bret=setiicdatarate(iic_200k); bret=setiicmode(iic_master,0x51); bret=brwrite(szbuf,9); // write 8 bytes of 0 to address 0x10 bret=brwrite(szbuf,1); // write the read address 0x10 bret=brread(szread,16,dw,50); //data read back, response with ack after r ead ends finalize(); closedevice(); write to/read from holtek eeprom ht24lc0x C using restart signal dword dw=0; char szbuf[9]={0x10,0,0,0,0,0,0,0,0}; char szread[16]; bool bret=opendevice(3); bret=setiicdatarate(iic_200k); bret=setiicmode(iic_master,0x51); bret=brwrite(szbuf,9); // write 8 bytes of 0 to address 0x10 bret=setiic_restart(true); // set before brwrite bret=brwrite(szbuf,1); // write the read address 0x10, generate restart //signal after write ends bret=setiic_restart(false); //set before brread bret=brread(szread,16,dw,50); //data read back, response with nack after r ead // ends and generate a stop signal finalize(); closedevice(); write to/read from spi flash dword dw=0; char szid[4]={0x90,0,0,0}; char szcmd[4]={0x03,0,0,0}; char szread[16]; : bool bret=opendevice(3); bret=setspidatarate(spi_4m); bret=setspimode(spi_mode0, spi_msb,spi_en_csb); bret=brwrite(szid,4); //read id bret=brread(szread,2,dw,50); finalize(); bret=brwrite(szcmd,4); bret=brread(szread,0x10,dw,50); //read 0x10 bytes from address 0x00 finalize();
rev. 1.00 11 january 05, 2017 ht42b533-x spi slave mode setup description when the spi is confgured to operate in the slave mode, it is to operate as a slave receiver which means to read from the us b hos t (bu lk ou t). the sp i master terminal should follow the protocol shown in the table for normal communications. master transmitter (mt) request master transmitter (mt) command code slave receiver (sr) response wirte data available request 0xa3 buffer length write data 0xa5 read data available request 0xa4 buffer length read data 0xa6 mt scs enable notifcation 0xa0 0x7f 0x5a 0xa8 mt scs disable notifcation 0xa0 0x7f 0x5a 0xa8 mt scs enable notifcation master transmitting slave transmitting write data : data from spi interface to the host (bulk in) read data : data from host to spi interface (bulk out) se scs enable(pulled to low) sd scs disable(pulled to high) srs slave receiver state srs slave receiver pattern mt scs enable notification command code 0xa0 se command index 0x7f command pattern 0x5a command pattern 0xa8 sd write data available request se command code 0xa3 buffer length read data available request se command code 0xa4 buffer length sd sd wrtie data se command code 0xa5 1 st data 2 nd data last byte data sd read data se sd 2 nd data last byte data mt : master transmitter sr : slave receiver st : slave transmitter command code 0xa6 1 st data mt scs disable notification command code 0xa0 command index 0x7f command pattern 0x5a command pattern 0xa8 sd se
rev. 1.00 12 january 05, 2017 ht42b533-x write data flow (data from spi interface to host: bulk in) mt write data to sr flow mt : master transmitter sr : slave receiver st : slave transmitter start write data available request buffer length=0? yes no write data end? no yes write data length buffer length mt scs enable notification write data end mt scs disable notification
rev. 1.00 13 january 05, 2017 ht42b533-x read data flow (data from host to spi interface: bulk out) mt read data from sr flow mt : master transmitter sr : slave receiver st : slave transmitter start read data available request buffer length=0? yes no read data end? no yes read data length buffer length mt scs enable notification read data end mt scs disable notification master transmitter scs enable/disable notifcation the spi master enables or disables the data transmis - sion by pulling the scs line low or high respectively. ? mt scs enable notifcation the master must send a request to notify the slave receiver before starting to read or write data. ? mt scs disable notifcation: the master must send a request to notify the slave receiver before the data read or data write is completed. note that when switching from mt scs enable notification to mt scs disable notification, the delay time is at least 2ms.
rev. 1.00 14 january 05, 2017 ht42b533-x product description update to implement product description update first open the holtek HT42B534-X bridge ic demo ap , if the usb had been plugged into the host pc, it will show that the usb has been openned successfully on a new window. the user can use the appli cation program to update t he c ustomer vid, pid, ma nufacturer na me, product descriptio n, serial number and 256 bytes of user memory . it can confgure the s pi bridge device hardware fow control and remote wake-up functions. in addition to the definable descriptions, a user memory area which is not used to store parameters is also provided for users to record data. the confguration descriptor length table is shown as below. parameter length usb vendor id(vid) 1 word (hex) usb product id(pid) 1 word (hex) manufacturer name support max. 16 characters product description support max. 32 characters serial number support max. 4 words application circuits
rev. 1.00 15 january 05, 2017 ht42b533-x package information note that the package information provided here is for consultation purposes only . as this information may be updated at regular intervals users are reminded to consult the holtek website for the latest version of the package/ carton information . additional supplementary information with regard to packaging is liste d below . click on the relevant section to be transferred to the relevant website page. ? package information (include outline dimensions, product t ape and reel specifcations) ? the operation instruction of packing materials ? carton information
rev. 1.00 16 january 05, 2017 ht42b533-x 10-pin msop outline dimensions                      symbol dimensions in inch min. nom. max. a 0.043 a1 0.000 0.006 a2 0.030 0.033 0.037 b 0.007 0.013 c 0.003 0.009 d 0.118 bsc e 0.193 bsc e1 0.118 bsc e 0.020 bsc l 0.016 0.024 0.031 l1 0.037 bsc y 0.004 0 8 symbol dimensions in mm min. nom. max. a 1.10 a1 0.00 0.15 a2 0.75 0.85 0.95 b 0.17 0.33 c 0.08 0.23 d 3 bsc e 4.9 bsc e1 3 bsc e 0.5 bsc l 0.40 0.60 0.80 l1 0.95 bsc y 0.1 0 8
rev. 1.00 17 january 05, 2017 ht42b533-x 16-pin nsop (150mil) outline dimensions               symbol dimensions in inch min. nom. max. a 0.236 bsc b 0.154 bsc c 0.012 0.020 c 0.390 bsc d 0.069 e 0.050 bsc f 0.004 0.010 g 0.016 0.050 h 0.004 0.010 0 8 symbol dimensions in mm min. nom. max. a 6 bsc b 3.9 bsc c 0.31 0.51 c 9.9 bsc d 1.75 e 1.27 bsc f 0.10 0.25 g 0.40 1.27 h 0.10 0.25 0 8
rev. 1.00 18 january 05, 2017 ht42b533-x copyright ? 2017 by holtek semiconductor inc. the information appearing in this data sheet is believed to be accurate at the time of publication. however, holtek assumes no responsibility arising from the use of the specifcations described. the applications mentioned herein are used solely for the purpose of illustration and holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. holtek's products are not authorized for use as critical components in life support devices or systems. holtek reserves the right to alter its products without prior notifcation. for the most up-to-date information, please visit our web site at http://www.holtek.com/en/.


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