( preliminary ) pl123 e - 05 low skew zero delay buffer micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 12 / 13 /11 page 1 features ? frequency r ange 10mhz to 220mhz ? zero input - output delay. ? low output - to - output s kew . ? optional drive strength: standard (8ma) pl 123e - 05 high (12ma) pl 123e - 05 h ? 2.5v or 3.3v , 10% operation. ? available in 8 - pin sop packaging . description the pl 123 e - 05 ( - 05h for high drive) is a high pe r fo r- mance, low skew, low jitter zero delay buffer d e signed to distribute high speed clocks . it has five low - skew outputs that are synchronized with the input. the sy n- chronization is esta b lished via clkout feed back t o the input of the pll. since the skew between the input and ou t put is less than ? 100 ps, the device acts as a zero d e lay buffer. the input output propagation delay can be advanced or delayed by a d justing the load on the clkout pin. these parts are not int ended for 5v input - tolerant a p- plications. pin co n figuration sop - 8l block diagram 1 2 3 4 ref 5 6 7 8 clk 2 clk 1 gnd clkout clk 4 vdd clk 3 pll ref clkout clk 1 clk 2 clk 3 clk 4
( preliminary ) pl123 e - 05 low skew zero delay buffer micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 12 / 13 /11 p a ge 2 pin description name package type type description sop - 8l ref [1 ] 1 i input reference fr e quency. clk2 [2 ] 2 o buffered clock output. clk1 [2 ] 3 o buffered clock output. gnd 4 p ground connection . clk3 [2 ] 5 o buffered clock output. vdd 6 p vdd connection. clk4 [2 ] 7 o buffered clock output. clkout [2 ,3 ] 8 o buffered clock output. inte r nal feed back on this pin. notes: 1: weak pull - down. 2: weak pull - down on a ll outputs. 3. this output is driven and has an internal feedback for the pll. the load on this output can be adjusted to change the skew b e tween the reference and output. input / output skew control the pl 123e - 05 will achieve zero delay from input to ou tput when all the outputs are loaded equally. adjus t- ments to the input/output delay can be made by adjusting the loading on the clkout pin. please contact micrel for more information.
( preliminary ) pl123 e - 05 low skew zero delay buffer micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 12 / 13 /11 p a ge 3 layout recommendations the following guidelines are to assist y ou with a performance optimized pcb design: signal integrity and termination consider a tions - keep traces short! - trace = inductor. with a capacitive load this equals ringing! - long trace = transmission line. without proper termination this will c ause reflections ( looks like ringing ). - design long traces as striplines or m i crostrips with defined impedance. - match trace at one side to avoid reflections boun c- ing back and forth. decoupling and power supply co n siderations - place decoupling c apacitors as close as possible to the vdd pin(s) to limit noise from the power supply - addition of a ferrite bead in series with vdd can help prevent noise from other board sources - value of decoupling capacitor is frequency d e- pendant. typical values to use are 0.1 ? f for d e- signs using frequencies < 50mhz and 0.01 ? f for d e signs using frequencies > 50mhz. t y p i c a l c m o s t e r m i n a t i o n p l a c e s e r i e s r e s i s t o r a s c l o s e a s p o s s i b l e t o c m o s o u t p u t c m o s o u t p u t b u f f e r ( t y p i c a l b u f f e r i m p e d a n c e 2 0 ? ? ? t o c m o s i n p u t 5 0 ? l i n e c o n n e c t a 3 3 ? ? s e r i e s r e s i s t o r a t e a c h o f t h e o u t p u t c l o c k s t o e n h a n c e t h e s t a b i l i t y o f t h e o u t p u t s i g n a l
( preliminary ) pl123 e - 05 low skew zero delay buffer micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 12 / 13 /11 p a ge 4 absolute maximum conditions supply voltage to ground potential ...... C 0.5v to 4.6v dc input voltage ............................. v ss C 0.5v to 4.6v stora ge temperature ......................... C 65c to 150c junction temperature ................................ ....... 150c static discharge voltage (per mil - std - 883, method 3015) > 2000v operating condition description param e ter min max unit supply voltage v dd 2.25 3.63 v load capacitance, <100 mhz, 3.3v c l [ 4] C 30 pf load capacitance, <100 mhz, 2.5v with high drive C 30 pf load capacitance, <133.3 mhz, 3.3v C 22 pf load capacitance, <133.3 mhz, 2.5v with high drive C 22 pf load capacitance, <133.3 mhz, 2.5v with standard drive C 15 pf load capacitan ce, >133.3 mhz, 3.3v C 15 pf load capacitance, >133.3 mhz, 2.5v with high drive C 15 pf input capacitance [5] c in C 5 pf closed - loop bandwidth (typical), 3.3v bw 1 mhz closed - loop bandwidth (typical), 2.5v 0. 5 m hz output impedance (typical), 3.3v hi gh d rive r out 23 ? output impedance (typical), 3.3v standard d rive 33 ? output impedance (typical), 2.5v high d rive 26 ? output impedance (typical), 2.5v standard d rive 39 ? power - up time for all v dd s to reach minimum specified vol t age (power ramps must be monotoni c) t pu 0.01 2 50 ms notes: 4. applies to test circuit #1. 5. applies to both ref clock and internal feedback path on clkout. 6. theta ja, eia jedec 51 test board conditions, 2s2p; theta jc mil - spec 883e method 1012.1.
( preliminary ) pl123 e - 05 low skew zero delay buffer micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 12 / 13 /11 p a ge 5 3.3v dc electrical specifications descript ion parameter test conditions min max unit supply voltage v dd 2.97 3.6 3 v input low voltage v il C 0.8 v input high voltage v ih 2.5 v dd + 0.3 v input leakage current i il 0 < v in < v il C 10 a input high current i ih v in = v dd C 100 a output low vo ltage v ol i ol = 8 ma ( s tandard d rive) i ol = 12 m a (high d rive) C C 0.4 0.4 v v output high voltage v oh i oh = C 8 ma (standard drive) i oh = C 12 ma (high d rive) 2.4 2.4 C C v v supply current i dd unloaded outputs, 66 - mhz ref C 45 ma 2.5v dc electrical sp ecifications description param e ter test conditions min max unit supply voltage v dd 2. 25 2.7 5 v input low voltage v il C 0.7 v input high voltage v ih 1.7 v dd + 0.3 v input leakage current i il 0 ( preliminary ) pl123 e - 05 low skew zero delay buffer micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 12 / 13 /11 p a ge 6 3.3v and 2.5v ac electrical specifications descri p tion parameter test conditions min typ max unit maximum fr e quency [7] (i n put/output) 1/t 1 3.3v high d rive 10 C 220 mhz 3.3v standard d rive 10 C 167 mhz 2.5v high d rive 10 C 200 mhz 2.5v standa rd d rive 10 C 13 4 mhz input duty cycle (pll mode only) t idc <133.3 mhz 25 C 75 % >133.3 mhz 40 C 60 % output duty c y cle [8 ] t 2 t 1 <133.3 mhz 47 C 53 % >133.3 mhz 45 C 55 % rise, fall time (3.3v) [8 ] t 3 ,t 4 standard drive, cl = 30 pf, <100 mhz C 1.6 C ns standard drive, cl = 22 pf, <133.3 mhz C 1.6 C ns standard d rive, cl = 15pf, <167 mhz C 0.6 C ns high drive, cl = 30 pf, <100 mhz C 1.2 C ns high drive, cl = 22 pf, <133.3 mhz C 1.2 C ns high drive, cl = 15 pf, >133.3 mhz C 0.5 C ns rise, fall time (2.5v) [8 ] t 3 , t 4 standard drive, cl = 15 pf, <133.33 mhz C 1.5 C ns high drive, cl = 30 pf, <100 mhz C 2.1 C ns high drive, cl = 22 pf, <133.3 mhz C 1.3 C ns high drive, cl = 15 pf, >133.3 mhz C 1.2 C ns output to output skew [8 ] t 5 all out puts equally loaded C C 100 ps delay, ref rising edge to clkout rising edge [8 ] t 6 pll enabled @ 3.3v C 100 C 100 ps pll enabled @2.5v C 200 C 200 ps part to part skew [8] t 7 measured at v dd /2. any output to any output, 3.3v supply C C 150 ps measured at v dd /2. any output to any output, 2.5v supply C C 300 ps pll lock time [8 ] t lock stable power supply, valid clocks pr e- sented on ref and clkout pins C C 1.0 ms cycle - to - c ycle jitter, peak [8 ,9 ] t jcc 3.3v, >66 mhz, <15 pf C C 55 ps 3.3v, >66 mhz, <30 pf , standard. d rive C C 125 ps 3.3v, >66 mhz, <30 pf, h igh d rive C C 100 ps 2.5v, >66 mhz, <15 pf, standard. d rive C C 100 ps 2.5v, >66 mhz, <15 pf, h igh d rive C C 80 ps 2.5v, >66 mhz, <30 pf, h igh d rive C C 125 ps
( preliminary ) pl123 e - 05 low skew zero delay buffer micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 12 / 13 /11 p a ge 7 3.3v and 2.5v ac electrical speci fications (continued) descri p tion parameter test conditions min typ max unit period jitter, peak [8 ,9 ] t per 3.3v, 66 C 100 mhz, <15 pf C C 60 ps 3.3v, >100 mhz, <15 pf C C 35 ps 3.3v, >66 mhz, <30 pf, standard d rive C C 75 ps 3.3v, >66 mhz, <30 pf, h igh d rive C C 70 ps 2.5v, >66 mhz, <15 pf, standard. d rive C C 60 ps 2.5v, 66 C 100 mhz, <15 pf, h igh d rive C C 60 ps 2.5v, >100 mhz, <15 pf, h igh d rive C C 45 ps notes: 7. for the given maximum loading conditions. see c l in operating conditions tab le. 8. parameter is guaranteed by design and characterization. not 100% tested in production. 9. typical j itter is measured at 3.3v or 2.5v, 29 c, with all outputs driven into the maximum spec i fied load.
( preliminary ) pl123 e - 05 low skew zero delay buffer micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 12 / 13 /11 p a ge 8 switching waveforms vdd/2 v dd /2 t 2 t 1 t 3 t 4 vdd/2 input t 6 clkout vdd/2 vdd/2 output t 5 output vdd/2 vdd/2 any output, part 1 or 2 1 t 7 vdd/2 duty cycle ti m ing all outputs rise/fall time output - output skew input - output propagation delay device - device skew 0v 3.3v (2.5v) 2.0v(1.8v) output 0.8v(0.6v) any output, part 1 or 2 1 0.8v(0.6v) 2.0v(1.8v)
( preliminary ) pl123 e - 05 low skew zero delay buffer micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 12 / 13 /11 p a ge 9 test circuits package drawings ( green package com pliant) vdd vdd gnd gnd outputs c l oad clk 0.1 ? f 0.1 ? f test circuit #1 r e c o m m e n d e d l a n d p a t t e r n ( m m ) 2 . 3 1 0 . 0 5 2 . 4 0 r e f 6 . 9 8 5 0 . 0 5 0 s o p - 8 l d d d e h l c a 2 a 1 e b a 3 . 8 0 r e f 4 . 6 5 r e f 1 . 2 7 n o m 0 . 5 3 0 . 0 5 min max a 1.35 1.75 a1 0.10 0.25 a2 1.25 1.50 b 0.33 0.53 c 0.19 0.27 d 4.80 5.00 e 3.80 4.00 h 5.80 6.20 l 0.40 0.89 e symbol dimension (mm) 1.27 bsc
( preliminary ) pl123 e - 05 low skew zero delay buffer micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 12 / 13 /11 p a ge 10 ordering inform ation ( green package com pliant) micrel inc., reserves the right to make changes in its products or specif ications, or both at any time without notice. the information furnished by micrel is believed to be accurate and reliable. however, micrel makes no guarantee or warranty concerning the accuracy of said info rmation and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. life support policy : micrels products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of micrel inc. for part ordering, please co ntact our sales department: 2 1 80 fortune drive , san jose, ca 95131 , usa tel: (408) 944 - 0800 fax: (408) 474 - 1 000 part number the order number for this device is a combination of the following: part number, package type and operating temperature range part/order nu m ber marking * package option pl123e - 05 s c p123e05 sc lllll 8 - pin sop tube pl123e - 05 s c - r 8 - pin sop (tape and reel) pl123e - 05hsc p 123 e 05h sc lllll 8 - pin sop tube pl123e - 05hsc - r 8 - pin sop (tape and reel) pl123e - 05 s i p123e05 si lllll 8 - pin sop tube pl123e - 05 s i - r 8 - pin sop (tape and reel) pl123e - 05hsi p 123 e05h si lllll 8 - pin sop tube pl123e - 05hsi - r 8 - pin sop (tape and reel) *note: lll ll designates lot number p l 1 2 3 e - 0 5 ( h ) s x - x p a r t n u m b e r h = h i g h d r i v e n o n e = s t a n d a r d d r i v e p a c k a g e t y p e s = s o p n o n e = t u b e s r = t a p e & r e e l t e m p e r a t u r e r a n g e c = c o m m e r c i a l ( 0 c t o 7 0 c ) i = i n d u s t r i a l ( - 4 0 c t o 8 5 c )
|
