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efr32bg1 blue gecko bluetooth ? smart soc family data sheet the blue gecko bluetooth smart family of socs is part of the wireless gecko portfolio. blue gecko socs are ideal for enabling energy-friendly bluetooth smart networking for iot devices. the single-die solution provides industry-leading energy efficiency, ultra-fast wakeup times, a scalable power amplifier, an integrated balun and no-compromise mcu fea- tures. blue gecko applications include: key features ? 32-bit arm? cortex?-m4 core with 40 mhz maximum operating frequency ? scalable memory and radio configuration options available in several footprint compatible qfn packages ? 12-channel peripheral reflex system enabling autonomous interaction of mcu peripherals ? autonomous hardware crypto accelerator and random number generator ? integrated balun for 2.4 ghz and integrated pa with up to 19.5 dbm transmit power for 2.4 ghz and 20 dbm transmit power for sub-ghz radios ? integrated dc-dc with rf noise mitigation ? iot sensors and end devices ? health and wellness ? home and building automation ? accessories ? human interface devices ? metering ? commercial and retail lighting and sensing timers and triggers real time counter and calendar cryotimer timer/counter low energy timer pulse counter watchdog timer protocol timer 32-bit bus peripheral reflex system serial interfaces i/o ports analog i/f lowest power mode with peripheral operational: usart low energy uart tm i 2 c external interrupts general purpose i/o pin reset pin wakeup adc idac analog comparator radio transceiver demod agc ifadc crc bufc rfsense frc rac em3stop em2deep sleep em1sleep em4hibernate em4shutoff em0active core / memory arm cortex tm m4 processor with dsp extensions and fpu energy management brown-out detector dc-dc converter voltage regulator voltage monitor power-on reset other crypto crc clock management high frequency crystal oscillator low frequency crystal oscillator low frequency rc oscillator high frequency rc oscillator ultra low frequency rc oscillator auxiliary high frequency rc oscillator flash program memory ram memory debug interface dma controller memory protection unit balun 2.4 ghz rf frontend: lna, pa, i/q mixer sub-ghz rf frontend: lna, pa, i/q mixer pga mod to rf frontend circuits frequency synthesizer silabs.com | building a more connected world. rev. 1.1
table of contents 1. feature list ................................ 1 2. ordering information ............................ 2 3. system overview .............................. 4 3.1 introduction ............................... 4 3.2 radio ................................. 4 3.2.1 antenna interface ............................ 5 3.2.2 fractional-n frequency synthesizer ...................... 5 3.2.3 receiver architecture ........................... 5 3.2.4 transmitter architecture .......................... 5 3.2.5 wake on radio ............................. 5 3.2.6 rfsense .............................. 6 3.2.7 flexible frame handling .......................... 6 3.2.8 packet and state trace .......................... 6 3.2.9 data buffering ............................. 6 3.2.10 radio controller (rac) .......................... 6 3.2.11 random number generator ........................ 7 3.3 power ................................ 8 3.3.1 energy management unit (emu) ....................... 8 3.3.2 dc-dc converter ............................ 8 3.4 general purpose input/output (gpio) ...................... 8 3.5 clocking ................................ 8 3.5.1 clock management unit (cmu) ....................... 8 3.5.2 internal and external oscillators ....................... 8 3.6 counters/timers and pwm ......................... 9 3.6.1 timer/counter (timer) .......................... 9 3.6.2 real time counter and calendar (rtcc) .................... 9 3.6.3 low energy timer (letimer) ........................ 9 3.6.4 ultra low power wake-up timer (cryotimer) ................. 9 3.6.5 pulse counter (pcnt) .......................... 9 3.6.6 watchdog timer (wdog) ......................... 9 3.7 communications and other digital peripherals ................... 9 3.7.1 universal synchronous/asynchronous receiver/transmitter (usart) .......... 9 3.7.2 low energy universal asynchronous receiver/transmitter (leuart) .......... 10 3.7.3 inter-integrated circuit interface (i 2 c) ..................... 10 3.7.4 peripheral reflex system (prs) ....................... 10 3.8 security features ............................. 10 3.8.1 gpcrc (general purpose cyclic redundancy check) ............... 10 3.8.2 crypto accelerator (crypto) ........................ 10 3.9 analog ................................ 10 3.9.1 analog port (aport) .......................... 10 3.9.2 analog comparator (acmp) ........................ 10 3.9.3 analog to digital converter (adc) ...................... 11 silabs.com | building a more connected world. rev. 1.1 3.9.4 digital to analog current converter (idac) ................... 11 3.10 reset management unit (rmu) ....................... 11 3.11 core and memory ............................ 11 3.11.1 processor core ............................ 11 3.11.2 memory system controller (msc) ...................... 11 3.11.3 linked direct memory access controller (ldma) ................. 11 3.12 memory map .............................. 12 3.13 configuration summary .......................... 13 4. electrical specifications .......................... 14 4.1 electrical characteristics .......................... 14 4.1.1 absolute maximum ratings ........................ 15 4.1.2 operating conditions ........................... 17 4.1.2.1 general operating conditions ....................... 17 4.1.3 thermal characteristics .......................... 18 4.1.4 dc-dc converter ............................ 19 4.1.5 current consumption ........................... 21 4.1.5.1 current consumption 3.3 v without dc-dc converter ............... 21 4.1.5.2 current consumption 3.3 v using dc-dc converter ............... 22 4.1.5.3 current consumption 1.85 v without dc-dc converter .............. 24 4.1.5.4 current consumption using radio ..................... 25 4.1.6 wake up times ............................. 27 4.1.7 brown out detector ........................... 27 4.1.8 frequency synthesizer characteristics ..................... 28 4.1.9 2.4 ghz rf transceiver characteristics .................... 29 4.1.9.1 rf transmitter general characteristics for the 2.4 ghz band ............ 29 4.1.9.2 rf receiver general characteristics for the 2.4 ghz band ............. 30 4.1.9.3 rf transmitter characteristics for bluetooth smart in the 2.4 ghz band ......... 31 4.1.9.4 rf receiver characteristics for bluetooth smart in the 2.4 ghz band .......... 33 4.1.9.5 rf transmitter characteristics for 802.15.4 o-qpsk dsss in the 2.4 ghz band ...... 35 4.1.9.6 rf receiver characteristics for 802.15.4 o-qpsk dsss in the 2.4 ghz band ....... 38 4.1.10 sub-ghz rf transceiver characteristics ................... 40 4.1.10.1 sub-ghz rf transmitter characteristics in the 915 mhz band ........... 41 4.1.10.2 sub-ghz rf receiver characteristics in the 915 mhz band ............ 45 4.1.10.3 sub-ghz rf transmitter characteristics in the 868 mhz band ........... 48 4.1.10.4 sub-ghz rf receiver characteristics in the 868 mhz band ............ 49 4.1.10.5 sub-ghz rf transmitter characteristics in the 490 mhz band ........... 51 4.1.10.6 sub-ghz rf receiver characteristics in the 490 mhz band ............ 52 4.1.10.7 sub-ghz rf transmitter characteristics in the 433 mhz band ........... 54 4.1.10.8 sub-ghz rf receiver characteristics in the 433 mhz band ............ 57 4.1.10.9 sub-ghz rf transmitter characteristics in the 315 mhz band ........... 60 4.1.10.10 sub-ghz rf receiver characteristics in the 315 mhz band ............ 63 4.1.10.11 sub-ghz rf transmitter characteristics in the 169 mhz band ........... 65 4.1.10.12 sub-ghz rf receiver characteristics in the 169 mhz band ............ 66 4.1.11 modem features ............................ 67 4.1.12 oscillators .............................. 68 4.1.12.1 lfxo ............................... 68 4.1.12.2 hfxo ............................... 69 4.1.12.3 lfrco .............................. 69 4.1.12.4 hfrco and auxhfrco ........................ 70 silabs.com | building a more connected world. rev. 1.1 4.1.12.5 ulfrco .............................. 70 4.1.13 flash memory characteristics ....................... 71 4.1.14 gpio ................................ 72 4.1.15 vmon ............................... 73 4.1.16 adc ................................ 74 4.1.17 idac ................................ 77 4.1.18 analog comparator (acmp) ........................ 79 4.1.19 i2c ................................ 81 4.1.20 usart spi ............................. 84 4.2 typical performance curves ......................... 85 4.2.1 supply current ............................. 86 4.2.2 dc-dc converter ............................ 88 4.2.3 internal oscillators ............................ 90 4.2.4 2.4 ghz radio ............................. 96 5. typical connection diagrams ........................ 98 5.1 power ................................ 98 5.2 rf matching networks .......................... 100 5.3 other connections ........................... 101 6. pin definitions .............................. 102 6.1 efr32bg1 qfn48 2.4 ghz definition .................... 102 6.1.1 efr32bg1 qfn48 2.4 ghz gpio overview .................. 114 6.2 efr32bg1 qfn48 2.4 ghz and sub-ghz definition ............... 115 6.2.1 efr32bg1 qfn48 2.4 ghz and sub-ghz gpio overview ............. 126 6.3 efr32bg1 qfn32 2.4 ghz definition .................... 127 6.3.1 efr32bg1 qfn32 2.4 ghz gpio overview .................. 134 6.4 alternate functionality pinout ....................... 135 6.5 analog port (aport) client maps ...................... 141 7. qfn48 package specifications ........................ 145 7.1 qfn48 package dimensions ........................ 145 7.2 qfn48 pcb land pattern ......................... 147 7.3 qfn48 package marking ......................... 149 8. qfn32 package specifications ........................ 150 8.1 qfn32 package dimensions ........................ 150 8.2 qfn32 pcb land pattern ......................... 152 8.3 qfn32 package marking ......................... 154 9. revision history ............................. 155 9.1 revision 1.1 ............................. 155 9.2 revision 1.0 ............................. 155 9.3 revision 0.97 ............................. 155 9.4 revision 0.951 ............................ 155 silabs.com | building a more connected world. rev. 1.1 9.5 revision 0.95 ............................. 156 9.6 revision 0.9 ............................. 156 9.7 revision 0.81 ............................. 156 9.8 revision 0.8 ............................. 156 9.9 revision 0.7 ............................. 157 silabs.com | building a more connected world. rev. 1.1 1. feature list the efr32bg1 highlighted features are listed below. ? low power wireless system-on-chip . ? high performance 32-bit 40 mhz arm cortex ? -m4 with dsp instruction and floating-point unit for efficient signal processing ? up to 256 kb flash program memory ? up to 32 kb ram data memory ? 2.4 ghz and sub-ghz radio operation ? transmit power: ? 2.4 ghz radio: up to 19.5 dbm ? sub-ghz radio: up to 20 dbm ? low energy consumption ? 8.7 ma rx current at 2.4 ghz ? 8.2 ma tx current @ 0 dbm output power at 2.4 ghz ? 8.1 ma rx current at 868 mhz ? 34.5 ma tx current @ 14 dbm output power at 868 mhz ? 63 a/mhz in active mode (em0) ? 1.4 a em2 deepsleep current (full ram retention and rtcc running from lfxo) ? 0.58 a em4h hibernate mode (128 byte ram retention) ? wake on radio with signal strength detection, preamble pattern detection, frame detection and timeout ? high receiver performance ? -94 dbm sensitivity @ 1 mbit/s gfsk (2.4ghz) ? -121.4 dbm sensitivity at 2.4 kbps gfsk (868 mhz) ? supported modulation formats ? gfsk ? 2-fsk / 4-fsk with fully configurable shaping (efr32bg1p opns) ? shaped oqpsk / (g)msk (efr32bg1p opns) ? configurable dsss and fec (efr32bg1p opns) ? bpsk / dbpsk tx (efr32bg1p opns supporting sub- ghz) ? ook / ask (efr32bg1p opns supporting sub-ghz) ? supported protocols: ? bluetooth? smart ? proprietary protocols (efr32bg1p opns) ? wireless m-bus (efr32bg1p opns supporting sub-ghz) ? low power wide area networks (efr32bg1p opns sup- porting sub-ghz) ? support for internet security ? general purpose crc ? random number generation ? hardware cryptographic acceleration for aes 128/256, sha-1, sha-2 (sha-224 and sha-256) and ecc ? wide selection of mcu peripherals ? 12-bit 1 msps sar analog to digital converter (adc) ? 2 analog comparator (acmp) ? digital to analog current converter (idac) ? up to 31 pins connected to analog channels (aport) shared between analog comparators, adc, and idac ? up to 31 general purpose i/o pins with output state reten- tion and asynchronous interrupts ? 8 channel dma controller ? 12 channel peripheral reflex system (prs) ? 216-bit timer/counter ? 3 + 4 compare/capture/pwm channels ? 32-bit real time counter and calendar ? 16-bit low energy timer for waveform generation ? 32-bit ultra low energy timer/counter for periodic wake-up from any energy mode ? 16-bit pulse counter with asynchronous operation ? watchdog timer with dedicated rc oscillator @ 50na ? 2universal synchronous/asynchronous receiver/trans- mitter (uart/spi/smartcard (iso 7816)/irda/i 2 s) ? low energy uart (leuart ? ) ? i 2 c interface with smbus support and address recognition in em3 stop ? wide operating range ? 1.85 v to 3.8 v single power supply ? integrated dc-dc, down to 1.8 v output with up to 200 ma load current for system ? -40 c to 85 c ? qfn32 5x5 mm package ? qfn48 7x7 mm package efr32bg1 blue gecko bluetooth ? smart soc family data sheet feature list silabs.com | building a more connected world. rev. 1.1 | 1 2. ordering information ordering code protocol stack frequency band @ max tx power flash (kb) ram (kb) gpio package efr32bg1p333f256gm48-c0 ? bluetooth smart ? proprietary ? 2.4 ghz @ 19.5 dbm ? sub-ghz @ 20 dbm 256 32 28 qfn48 efr32bg1p332f256gm48-c0 ? bluetooth smart ? proprietary 2.4 ghz @ 19.5 dbm 256 32 31 qfn48 efr32bg1p332f256gm32-c0 ? bluetooth smart ? proprietary 2.4 ghz @ 19.5 dbm 256 32 16 qfn32 efr32bg1p233f256gm48-c0 ? bluetooth smart ? proprietary ? 2.4 ghz @ 10.5 dbm ? sub-ghz @ 10.5 dbm 256 32 28 qfn48 efr32bg1p232f256gm48-c0 ? bluetooth smart ? proprietary 2.4 ghz @ 10.5 dbm 256 32 31 qfn48 efr32bg1p232f256gm32-c0 ? bluetooth smart ? proprietary 2.4 ghz @ 10.5 dbm 256 32 16 qfn32 efr32bg1b232f256gm48-c0 bluetooth smart 2.4 ghz @ 10.5 dbm 256 32 31 qfn48 efr32bg1b232f128gm48-c0 bluetooth smart 2.4 ghz @ 10.5 dbm 128 32 31 qfn48 efr32bg1b232f256gm32-c0 bluetooth smart 2.4 ghz @ 10.5 dbm 256 32 16 qfn32 efr32bg1b232f128gm32-c0 bluetooth smart 2.4 ghz @ 10.5 dbm 128 32 16 qfn32 efr32bg1b132f256gm48-c0 bluetooth smart 2.4 ghz @ 3 dbm 256 32 31 qfn48 EFR32BG1B132F128GM48-C0 bluetooth smart 2.4 ghz @ 3 dbm 128 32 31 qfn48 efr32bg1b132f256gm32-c0 bluetooth smart 2.4 ghz @ 3 dbm 256 32 16 qfn32 efr32bg1b132f128gm32-c0 bluetooth smart 2.4 ghz @ 3 dbm 128 32 16 qfn32 efr32bg1v132f256gm48-c0 bluetooth smart 2.4 ghz @ 0 dbm 256 16 31 qfn48 efr32bg1v132f128gm48-c0 bluetooth smart 2.4 ghz @ 0 dbm 128 16 31 qfn48 efr32bg1v132f256gm32-c0 bluetooth smart 2.4 ghz @ 0 dbm 256 16 16 qfn32 efr32bg1v132f128gm32-c0 bluetooth smart 2.4 ghz @ 0 dbm 128 16 16 qfn32 efr32bg1 blue gecko bluetooth ? smart soc family data sheet ordering information silabs.com | building a more connected world. rev. 1.1 | 2 efr32 C 1 p f g c0 r tape and reel (optional) revision pin count package C m (qfn), j (csp) flash memory size in kb memory type (flash) feature set code C r2r1r0 r2: reserved r1: rf type C 3 (trx), 2 (rx), 1 (tx) r0: frequency band C 1 (sub-ghz), 2 (2.4 ghz), 3 (dual-band) g x 132 256 m 32 temperature grade C g (-40 to +85 c), -i (-40 to +125 c) performance grade C p (performance), b (basic), v (value) series family C m (mighty), b (blue), f (flex) wireless gecko 32-bit gecko figure 2.1. opn decoder efr32bg1 blue gecko bluetooth ? smart soc family data sheet ordering information silabs.com | building a more connected world. rev. 1.1 | 3 3. system overview 3.1 introduction the efr32 product family combines an energy-friendly mcu with a highly integrated radio transceiver. the devices are well suited for any battery operated application as well as other systems requiring high performance and low energy consumption. this section gives a short introduction to the full radio and mcu system. the detailed functional description can be found in the efr32 reference manual. a block diagram of the efr32bg1 family is shown in figure 3.1 detailed efr32bg1 block diagram on page 4 . the diagram shows a superset of features available on the family, which vary by opn. for more information about specific device features, consult order- ing information . analog peripherals clock management lfxtal_p / n lfxo idac arm cortex-m4 core up to 256 kb isp flash program memory up to 32 kb ram a h b watchdog timer reset management unit brown out / power-on reset resetn digital peripherals input mux port mapper port i/o configuration i2c analog comparator 12-bit adc temp sensor vref vdd vdd internal reference timer cryotimer pcnt usart port a drivers port b drivers pan port c drivers pcn pbn port d drivers pdn letimer rtc / rtcc iovdd auxhfrco hfrco ulfrco hfxo port f drivers pfn memory protection unit lfrco a p b leuart crypto crc dma controller + - aport floating point unit energy management dc-dc converter dvdd vregvdd vss vregsw bypass avdd pavdd rfvdd voltage regulator decouple iovdd voltage monitor vregvss rfvss pavss serial wire debug / programming radio transciever 2g4rf_iop 2g4rf_ion 2.4 ghz rf pa i q lna frequency synthesizer demod agc ifadc crc bufc mod frc rac pga hfxtal_p hfxtal_n subgrf_op subgrf_on sub-ghz rf i q pa subgrf_ip subgrf_in lna to rf frontend circuits balun rfsense figure 3.1. detailed efr32bg1 block diagram 3.2 radio the blue gecko family features a radio transceiver supporting bluetooth smart ? and proprietary short range wireless protocols. efr32bg1 blue gecko bluetooth ? smart soc family data sheet system overview silabs.com | building a more connected world. rev. 1.1 | 4 3.2.1 antenna interface the efr32bg1 family includes devices which support both single-band and dual-band rf communication over separate physical rf interfaces. the 2.4 ghz antenna interface consists of two pins (2g4rf_iop and 2g4rf_ion) that interface directly to the on-chip balun. the 2g4rf_ion pin should be grounded externally. the sub-ghz antenna interface consists of a differential transmit interface (pins subgrf_op and subgrf_on) and a differential re- ceive interface (pinssubgrf_ip and subgrf_in). the external components and power supply connections for the antenna interface typical applications are shown in the rf matching networks section. 3.2.2 fractional-n frequency synthesizer the efr32bg1 contains a high performance, low phase noise, fully integrated fractional-n frequency synthesizer. the synthesizer is used in receive mode to generate the lo frequency used by the down-conversion mixer. it is also used in transmit mode to directly generate the modulated rf carrier. the fractional-n architecture provides excellent phase noise performance combined with frequency resolution better than 100 hz, with low energy consumption. the synthesizer has fast frequency settling which allows very short receiver and transmitter wake up times to optimize system energy consumption. 3.2.3 receiver architecture the efr32bg1 uses a low-if receiver architecture, consisting of a low-noise amplifier (lna) followed by an i/q down-conversion mix- er, employing a crystal reference. the i/q signals are further filtered and amplified before being sampled by the if analog-to-digital converter (ifadc). the if frequency is configurable from 150 khz to 1371 khz. the if can further be configured for high-side or low-side injection, provid- ing flexibility with respect to known interferers at the image frequency. the automatic gain control (agc) module adjusts the receiver gain to optimize performance and avoid saturation for excellent selec- tivity and blocking performance. the 2.4 ghz radio is calibrated at production to improve image rejection performance. the sub-ghz radio can be calibrated on-demand by the user for the desired frequency band. demodulation is performed in the digital domain. the demodulator performs configurable decimation and channel filtering to allow re- ceive bandwidths ranging from 0.1 to 2530 khz. high carrier frequency and baud rate offsets are tolerated by active estimation and compensation. advanced features supporting high quality communication under adverse conditions include forward error correction by block and convolutional coding as well as direct sequence spread spectrum (dsss). a received signal strength indicator (rssi) is available for signal quality metrics, for level-based proximity detection, and for rf chan- nel access by collision avoidance (ca) or listen before talk (lbt) algorithms. an rssi capture value is associated with each received frame and the dynamic rssi measurement can be monitored throughout reception. the efr32bg1 features integrated support for antenna diversity to improve link budget for 802.15.4 dsss-oqpsk phy configuration in the 2.4ghz band, using complementary control outputs to an external switch. internal configurable hardware controls automatic switching between antennae during rf receive detection operations. 3.2.4 transmitter architecture the efr32bg1 uses a direct-conversion transmitter architecture. for constant envelope modulation formats, the modulator controls phase and frequency modulation in the frequency synthesizer. transmit symbols or chips are optionally shaped by a digital shaping filter. the shaping filter is fully configurable, including the bt product, and can be used to implement gaussian or raised cosine shap- ing. carrier sense multiple access - collision avoidance (csma-ca) or listen before talk (lbt) algorithms can be automatically timed by the efr32bg1 . these algorithms are typically defined by regulatory standards to improve inter-operability in a given bandwidth be- tween devices that otherwise lack synchronized rf channel access. 3.2.5 wake on radio the wake on radio feature allows flexible, autonomous rf sensing, qualification, and demodulation without required mcu activity, us- ing a subsystem of the efr32bg1 including the radio controller (rac), peripheral reflex system (prs), and low energy peripherals. efr32bg1 blue gecko bluetooth ? smart soc family data sheet system overview silabs.com | building a more connected world. rev. 1.1 | 5 3.2.6 rfsense the rfsense module generates a system wakeup interrupt upon detection of wideband rf energy at the antenna interface, providing true rf wakeup capabilities from low energy modes including em2, em3 and em4. rfsense triggers on a relatively strong rf signal and is available in the lowest energy modes, allowing exceptionally low energy con- sumption. rfsense does not demodulate or otherwise qualify the received signal, but software may respond to the wakeup event by enabling normal rf reception. various strategies for optimizing power consumption and system response time in presence of false alarms may be employed using available timer peripherals. 3.2.7 flexible frame handling efr32bg1 has an extensive and flexible frame handling support for easy implementation of even complex communication protocols. the frame controller (frc) supports all low level and timing critical tasks together with the radio controller and modulator/demodula- tor: ? highly adjustable preamble length ? up to 2 simultaneous synchronization words, each up to 32 bits and providing separate interrupts ? frame disassembly and address matching (filtering) to accept or reject frames ? automatic ack frame assembly and transmission ? fully flexible crc generation and verification: ? multiple crc values can be embedded in a single frame ? 8, 16, 24 or 32-bit crc value ? configurable crc bit and byte ordering ? selectable bit-ordering (least significant or most significant bit first) ? optional data whitening ? optional forward error correction (fec), including convolutional encoding / decoding and block encoding / decoding ? half rate convolutional encoder and decoder with constraint lengths from 2 to 7 and optional puncturing ? optional symbol interleaving, typically used in combination with fec ? symbol coding, such as manchester or dsss, or biphase space encoding using fec hardware ? uart encoding over air, with start and stop bit insertion / removal ? test mode support, such as modulated or unmodulated carrier output ? received frame timestamping 3.2.8 packet and state trace the efr32bg1 frame controller has a packet and state trace unit that provides valuable information during the development phase. it features: ? non-intrusive trace of transmit data, receive data and state information ? data observability on a single-pin uart data output, or on a two-pin spi data output ? configurable data output bitrate / baudrate ? multiplexed transmitted data, received data and state / meta information in a single serial data stream 3.2.9 data buffering the efr32bg1 features an advanced radio buffer controller (bufc) capable of handling up to 4 buffers of adjustable size from 64 bytes to 4096 bytes. each buffer can be used for rx, tx or both. the buffer data is located in ram, enabling zero-copy operations. 3.2.10 radio controller (rac) the radio controller controls the top level state of the radio subsystem in the efr32bg1. it performs the following tasks: ? precisely-timed control of enabling and disabling of the receiver and transmitter circuitry ? run-time calibration of receiver, transmitter and frequency synthesizer ? detailed frame transmission timing, including optional lbt or csma-ca efr32bg1 blue gecko bluetooth ? smart soc family data sheet system overview silabs.com | building a more connected world. rev. 1.1 | 6 3.2.11 random number generator the frame controller (frc) implements a random number generator that uses entropy gathered from noise in the rf receive chain. the data is suitable for use in cryptographic applications. output from the random number generator can be used either directly or as a seed or entropy source for software-based random num- ber generator algorithms such as fortuna. efr32bg1 blue gecko bluetooth ? smart soc family data sheet system overview silabs.com | building a more connected world. rev. 1.1 | 7 3 r z h u 7 k h ( ) 5 % * k d v d q ( q h u j \ 0 d q d j h p h q w 8 q l w ( 0 8 d q g h i i l f l h q w l q w h j u d w h g u h j x o d w r u v w r j h q h u d w h l q w h u q d o v x s s o \ y r o w d j h v 2 q o \ d v l q j o h h [ w h u q d o v x s s o \ y r o w d j h l v u h t x l u h g i u r p z k l f k d o o l q w h u q d o y r o w d j h v d u h f u h d w h g $ q r s w l r q d o l q w h j u d w h g ' & |