1 www.pericom.com p-0.3 12/12/12 all trademarks are property of their respective owners. features ? 8 diferential channel spst switch with mux/demux option ? pcie? 3.0 performance ? bi-directional operation ? low bit-to-bit skew: 10ps (between signals) ? low crosstalk: -50db @ 4.0ghz (8gbps) ? low of isolation: -21db @4ghz ? low insertion loss: -1.8db @ 4.0ghz (8gbps) ? return loss: -15db @4ghz ? v dd operating range: 3.3v 10% ? esd tolerance: 2kv hbm ? packaging (pb-free & green): 42-contact, tqfn (zh42) description pericom semiconductors pi3pcie3422 is an 8 to 4 channel diferential multiplexer/demultiplexer featuring 8-channel pass- through. it supports two full pcie? lanes at 8.0gbps pcie? 3.0 performance. with the select control input low port a connects to port b, and port c connects to port d for an 8-channel diferential pass- though. when the select control input is high port a connects to port d, and port b and port c are in a high-impedance state. te mux/demux function is between port a and ports b or d as determined by the select input control. block diagram pin diagram (top-side view) a0+ a0- c0+ c0- b0+ b0- d0+ d0- a1+ a1- c1+ c1- b1+ b1- d1+ d1- a2+ a2- c2+ c2- b2+ b2- d2+ d2- a3+ a3- c3+ c3- b3+ b3- d3+ d3- sel oe# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 b0+ b0- d0+ d0- b1+ b1- d1+ d1- vdd b2+ b2- d2+ d2- b3+ b3- d3+ d3- a0+ a0- c0+ c0- a1+ a1- c1+ c1- sel a2+ a2- c2+ c2- a3+ a3- c3+ c3- 18 19 20 21 vdd oe# vdd gnd vdd gnd vdd gnd 42 41 40 39 gnd truth table function sel oe# ax = bx cx = dx l 0 ax = dx b = c = hi-z h 0 ax, bx, cx, dx = hi-z (disconnected) x 1 pi3pcie3422 3.3v, pci express? 3.0 2-lane, (4-channel), diferential mux/demux with bypass 13-0011
2 www.pericom.com p-0.3 12/12/12 all trademarks are property of their respective owners. pi3pcie3422 3.3v, pci express? 3.0 2-lane, diferential mux/demux with bypass pin description pin # pin name i/o description 1 2 a0+ a0C i/o signal i/o, channel 0, port a 5 6 a1+ a1C i/o signal i/o, channel 1, port a 10 11 a2+ a2C i/o signal i/o, channel 2, port a 14 15 a3+ a3C i/o signal i/o, channel 3, port a 38 37 b0+ b0? i/o signal i/o, channel 0, port b 34 33 b1+ b1? i/o signal i/o, channel 1, port b 29 28 b2+ b2? i/o signal i/o, channel 2, port b 25 24 b3+ b3? i/o signal i/o, channel 3, port b 3 4 c0+ c0C i/o signal i/o, channel 0, port c 7 8 c1+ c1C i/o signal i/o, channel 1, port c 12 13 c2+ c2C i/o signal i/o, channel 2, port c 16 17 c3+ c3? i/o signal i/o, channel 3, port c 36 35 d0+ d0? i/o signal i/o, channel 0, port d 32 31 d1+ d1? i/o signal i/o, channel 1, port d 27 26 d2+ d2? i/o signal i/o, channel 2, port d 23 22 d3+ d3? i/o signal i/o, channel 3, port d 41 oe# i output enable, active low. when oe# = 0 the device i/o is enabled. when oe#=1, all i/o are high impedance 9 sel i operation mode select (when sel=0: ab, cd, when sel=1: ad, b + c = hi-z) 18, 20, 30, 40, 42 v dd pwr 3.3v 10% positive supply voltage 19, 21, 39, center pad gnd pwr power ground 13-0011
3 www.pericom.com p-0.3 12/12/12 all trademarks are property of their respective owners. pi3pcie3422 3.3v, pci express? 3.0 2-lane, diferential mux/demux with bypass dc electrical characteristics for switching over operating range parameters description test conditions (1) min typ(1) max units v ih - sel input high voltage, sel input guaranteed high level 2 3.6 v v il - sel input low voltage, sel input guaranteed low level 0 0.8 v ik clamp diode voltage v dd = max., v in = C18ma C0.7 C1.2 i ih input high current for oe# and sel v dd = max., v in = v dd -10 10 a i ih input high current v dd = max., v in = 1.5v -10 +10 i il input low current v dd = max., v in = gnd -10 +10 r on on channel resistance v dd = min., v in = 1.3v, i in = 40ma 8 15 ohm c on on channel capacitance v dd = 3.3v, v in = 0 2.5 pf i oz output current v dd = max., v in = 0v to 1.5v -10 +10 a note: 1. t ypical values are at vdd = 3.3v, ta = 25c ambient and maximum loading. switching characteristics parameters description test conditions min. typ. max. units t pzh , t pzl line enable time - sel to a n , b n , c n , d n 0.5 15 25 ns t phz , t plz line disable time - sel to a n , b n , c n , d n 0.5 5 25 t b-b bit-to-bit skew within the same diferential pair 4 10 ps t ch-ch channel-to-channel skew 20 electrical characteristics recommended operating conditions symbol parameter conditions min typ max units v dd 3.3v power supply 3.0 3.3 3.6 v i dd total current from v dd 3.3v supply sel and oe# at ov or v dd 0.15 1 ma t case case temperature range for operation within spec. -40 85 celsius storage temperature ....................................................C65c to +150c supply voltage to ground potential ................................C0.5v to +4.6v channel dc input voltage ................................................ C0.5v to 1.5v dc output current ....................................................................... 120ma power dissipation ........................................................................... 0.5w sel dc input voltage ....................................................... C0.5v to 4.6v note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. tis is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specifcation is not implied. ex- posure to absolute maximum rating conditions for extended periods may afect reliability. maximum ratings (above which useful life may be impaired. for user guidelines, not tested.) 13-0011
4 www.pericom.com p-0.3 12/12/12 all trademarks are property of their respective owners. pi3pcie3422 3.3v, pci express? 3.0 2-lane, diferential mux/demux with bypass dynamic electrical characteristics parameter description test conditions min. typ. (1) max. units bw bandwidth -3db 7 ghz ddil diferential insertion loss (v in = -10dbm, dc = 0v) f=1.25ghz f=2.5ghz f=4.0ghz f=5.0ghz f=8.0ghz -0.9 -1.2 -1.7 -2.0 -5.0 -1.0 -1.3 -1.8 -2.1 -5.1 db ddil off diferential of isolation f= 4.0ghz -19 db ddrl diferential return loss f= 0 to 1.25ghz f= 1.25 to 2.5ghz f= 2.5 to 4.0ghz -16 -15 -15 -15 -14 -14 db ddnext near end crosstalk f= 0 to 2.8ghz f= 2.8 to 5.0ghz f= 5.0 to 8.0ghz -52 -50 -48 db notes: 1. g uaranteed by design. typical values are at v dd = 3.3v , t a = 25c ambient and maximum loading. 13-0011
5 www.pericom.com p-0.3 12/12/12 all trademarks are property of their respective owners. pi3pcie3422 3.3v, pci express? 3.0 2-lane, diferential mux/demux with bypass diferential insertion loss diferential return loss 13-0011
6 www.pericom.com p-0.3 12/12/12 all trademarks are property of their respective owners. pi3pcie3422 3.3v, pci express? 3.0 2-lane, diferential mux/demux with bypass diferential of isolation diferential crosstalk 13-0011
7 www.pericom.com p-0.3 12/12/12 all trademarks are property of their respective owners. pi3pcie3422 3.3v, pci express? 3.0 2-lane, diferential mux/demux with bypass 8.0 gbps rx signal eye with pi3pcie3422 8.0 gbps rx signal eye without pi3pcie3422 + ? + ? balanced port1 dut + ? 50 50 + ? balanced port2 50 50 + ? + ? balanced port1 balanced port2 dut diferential insertion loss and return test circuit diferential of isolation test circuit diferential near end xtalk test circuit + ? + ? balanced port1 balanced port2 dut + ? 50 50 13-0011
8 www.pericom.com p-0.3 12/12/12 all trademarks are property of their respective owners. pi3pcie3422 3.3v, pci express? 3.0 2-lane, diferential mux/demux with bypass switch positions test switch t plz , t pzl 3.0v t phz , t pzh gnd prop delay open switching waveforms voltage waveforms enable and disable times t plz v dd /2 v dd /2 v dd v oh 0v v ol 0.75v 0.75v t phz t pzl t pzh output 1 output 2 v ol v oh sel v ol + 0.15v v oh - 0.15v r t 4pf c l v dd v in v out 200-ohm 200-ohm 3.0v pulse generator d.u.t test circuit for electrical characteristics (1-5) notes: 1. c l = load capacitance: includes jig and probe capacitance. 2. r t = termination resistance: should be equal to z out of the pulse generator 3. o utput 1 is for an output with internal conditions such that the output is low except when disabled by the output control. o utput 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 4. a ll input impulses are supplied by generators having the following characteristics: prr mhz, z o = 50?, t r 2.5ns, t f 2.5ns. 5. t e outputs are measured one at a time with one transition per measurement. 13-0011
9 www.pericom.com p-0.3 12/12/12 all trademarks are property of their respective owners. pi3pcie3422 3.3v, pci express? 3.0 2-lane, diferential mux/demux with bypass ordering information ordering code package code package description PI3PCIE3422ZHE zh pb-free & green, 42-contact tqfn notes: ? t ermal characteristics can be found on the company web site at www.pericom.com/packaging/ ? " e" denotes pb-free and green ? a dding an "x" at the end of the ordering code denotes tape and reel packaging date: 11/14/12 description: 42-contact thin fine pitch quad flat no-lead (tqfn) package code: zh42 document control #: pd-2035 revision:d notes: 1. all dimensions are in millimeters. angles in degrees. 2. coplanarity applies to the exposed pad as well as the terminals. 3. refer jedec mo-220. 4. recommended land pattern is for reference only. 5. thermal pad soldering area 12-0529 note: for latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php packaging information 13-0011
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