ts m4 n70 tai wan semiconductor document number: ds_p0000167 1 version: a15 n - channel power mosfet 70 0v, 3.5 a, 3.3 features high power and current hand l ing capability pb - free plating rohs compliant halogen - free mold compound a pplication power supply lighting key performance parameters p arameter value unit v ds 700 v r ds(on ) (max) 3.3 q g 14 nc ito - 220 to - 251 (ipak) to - 252 (dpak) notes: moisture sensitivity level: level 3. p er j - std - 020 absolute m aximum ratings ( t a = 25 c unless otherwise noted ) p arameter s ymbol l imit unit ito - 220 ipak/dpak d rain - source voltage v ds 700 v gate - source voltage v gs 30 v continuous drain current (note 1 ) t c = 25 c i d 2 3.5 a t c = 100 c 1.3 1.6 pulsed drain current (note 2 ) i dm 8 14 a total power dissipation @ t c = 25 c p dtot 38 56 w single pulsed avalanch e energy (note 3 ) e as 43 mj single pulsed avalanche current (note 3 ) i as 3.5 a operating junction and storage temperature range t j , t stg - 55 to +1 50 c thermal performance p arameter s ymbol l imit unit ito - 220 ipak/dpak junction to case thermal re sistance r ? jc 3.6 2.2 c /w junction to ambient thermal resistance r ? ja 62 50 c /w notes: r ? ja is the sum of the junction - to - case and case - to - ambient thermal resistances. the case thermal reference is defined at the solder mounting surface of the drain pi ns. r ? ja is guaranteed by design while r ? ca is determined by the users board design. r ? ja shown below for single device operation on fr - 4 pcb in still air
ts m4 n70 tai wan semiconductor document number: ds_p0000167 2 version: a15 electrical specifications ( t a = 25 c unless otherwise noted ) parameter conditions symbol m in t yp m a x u nit static (note 4 ) drain - source breakdown voltage v gs = 0 v, i d = 250 a bv dss 7 00 -- -- v gate threshold voltage v ds = v gs , i d = 250a v gs(th) 2 -- 4 v gate body leakage v gs = 3 0 v, v ds = 0v i gss -- -- 100 na zero gate voltage drain current v ds = 7 0 0v, v gs = 0v i dss -- -- 25 a drain - source on - state resistance v gs = 10v, i d = 2 a r ds(on ) -- 2.5 3.3 dynamic (note 5 ) total gate charge v ds = 480 v, i d = 4 a, v gs = 10 v q g -- 14 -- nc gate - source charge q gs -- 3 -- gate - drain charge q gd -- 6 -- input capacitance v ds = 25 v, v gs = 0v, f = 1.0mhz c iss -- 595 -- pf output capacitance c oss -- 80 -- reverse transfer capacitance c rss -- 20 -- switching (note 6 ) turn - on delay time v dd = 3 0 0v, r gen = 25 d = 4 a, v gs = 10v, t d(on) -- 18 -- ns turn - on rise time t r -- 17 -- turn - off delay time t d(off) -- 40.5 -- turn - off fall time t f -- 19 -- source - drain diode (note 4 ) forward on voltag e i s = 2.5 a, v gs = 0v v sd - - - - 1.5 v notes: 1. current limited by package 2. pulse width limited by the m aximum junction temperature 3. l = 7 mh, i as = 3.5 a, v dd = 50 v, r g = 25, start ing t j = 25 o c 4. p ul se test: pw 300s , d u ty cycle 2% 5. for design aid only, not subject to production testing. 6. switching time is essentially independent of operating temperature.
ts m4 n70 tai wan semiconductor document number: ds_p0000167 3 version: a15 ordering information part no. package packing tsm 4n70 c i c0g ito - 220 50 pcs / tube tsm 4n70 c h c5g to - 251 (ipak) 75 pcs / tube tsm 4n70 c p rog to - 252 (dpak) 2,500pcs / 13 reel note: 1. compliant to rohs directive 2011/65/eu and in accordance to weee 2002/96/ec 2. halogen - free according to iec 61249 - 2 - 21 definition
ts m4 n70 tai wan semiconductor document number: ds_p0000167 4 version: a15 characteristics curves ( t c = 25c unless otherwise noted) output characteristics transfer characteristics normalized vth vs. junction temperature gate charge on - resistance variation vs. temperature maximum safe operating are a (ito - 220)
ts m4 n70 tai wan semiconductor document number: ds_p0000167 5 version: a15 characteristics curves ( t c = 25c unless otherwise noted) maximum safe operating area (dpak,ipak) n ormalized thermal transient impedance curve (ito - 220) n ormalized thermal transient impedance curve ( dpak,ipak )
ts m4 n70 tai wan semiconductor document number: ds_p0000167 6 version: a15 package outline dimensions (unit: millimeters) ito - 220 marking diagram g = halogen free y = year code ww = week code (01~52) f = factory code
ts m4 n70 tai wan semiconductor document number: ds_p0000167 7 version: a15 package outline dimensions (unit: millimeters) t o - 251 (ipak) marking diagram y = year code m = month code for halogen free product o =jan p =feb q =mar r =apr ` s =may t =jun u =jul v =aug w =sep x =oct y =nov z =dec l = lot code (1~9, a~z)
ts m4 n70 tai wan semiconductor document number: ds_p0000167 8 version: a15 package outline dimensions (unit: millimeters) t o - 252 (dp ak) suggested pad layout (unit: millimeters) marking diagram y = year code m = month code for halogen free product o =jan p =feb q =mar r =apr ` s =may t =jun u =jul v =aug w =sep x =oct y =nov z =dec l = lot code (1~9, a~z)
ts m4 n70 tai wan semiconductor document number: ds_p0000167 9 version: a15 notice specifications of the products displayed herein are subject to change without notice. tsc or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. information co ntained herein is intended to provide a product description only. no license, express or implied, to any intellectual property rights is granted by this document. except as provided in tscs terms and conditions of sale for such products, tsc assumes no li ability whatsoever, and disclaims any express or implied warranty, rela t ing to sale and/or use of tsc products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or oth er intellectual property right. the products shown herein are not designed for use in medical, life - saving, or life - sustaining applications. custo m ers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify tsc for any damages resulting from such improper use or sale.
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