SUP90142E www.vishay.com vishay siliconix s16-1647-rev. a, 22-aug-16 1 document number: 75002 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 n-channel 200 v (d-s) 175 c mosfet features ? thunderfet ? power mosfet ? tuned for the lowest r ds - q oss fom ? maximum 175 c junction temperature ? 100 % r g and uis tested ? material categorization: for definitions of compliance please see www.vishay.com/doc?99912 applications ? power supplies: - uninterruptible power supplies - ac/dc switch-mode power supplies - lighting ? synchronous rectification ?dc/dc converter ? motor drive switch ? dc/ac inverter ? solar micro inverter ? class d audio amplifier notes a. duty cycle ? 1 %. b. see soa curve for voltage derating. c. when mounted on 1" square pcb (fr4 material). d. package limited. product summary v ds (v) 200 r ds(on) max. ( ? ) at v gs = 10 v 0.0152 r ds(on) max. ( ? ) at v gs = 7.5 v 0.0169 q g typ. (nc) 58 i d (a) 90 configuration single to-220ab top view s s g s fet g d s ordering information package to-220ab lead (pb)-free and ha logen-free SUP90142E-ge3 absolute maximum ratings (t a = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds 200 v gate-source voltage v gs 20 continuous drain current t c = 25 c i d 90 a t c = 125 c 52 pulsed drain current (t = 100 s) i dm 240 continuous source-drain diode current i s 90 single pulse avalanche current a l = 0.1 mh i as 60 single pulse avalanche energy a e as 180 mj maximum power dissipation t c = 25 c p d 375 b w t c = 125 c 125 b operating junction and storage temperature range t j , t stg -55 to +175 c soldering recommendations (peak temperature) c 260 thermal resistance ratings parameter symbol maximum unit maximum junction-to-am bient (pcb mount) c r thja 40 c/w maximum junction-to-case (drain) steady state r thjc 0.4
SUP90142E www.vishay.com vishay siliconix s16-1647-rev. a, 22-aug-16 2 document number: 75002 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. pulse test; pulse width ? 300 s, duty cycle ? 2 %. b. guaranteed by design, not su bject to production testing. c. independent of operating temperature. stresses beyond those listed under absolute maximum ratings ma y cause permanent damage to th e device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those in dicated in the operational sectio ns of the specifications is not implied. exposure to absolute maximum rating conditions for extended pe riods may affect device reliability. specifications (t j = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 200 - - v gate-source threshold voltage v gs(th) v ds = v gs , i d = 250 a 2 - 4 v gate-source leakage i gss v ds = 0 v, v gs = 20 v - - 250 na zero gate voltage drain current i dss v ds = 200 v, v gs = 0 v - - 1 a v ds = 200 v, v gs = 0 v, t j = 125 c - - 150 v ds = 200 v, v gs = 0 v, t j = 175 c - - 5 ma on-state drain current a i d(on) v ds ? 10 v, v gs = 10 v 60 - - a drain-source on-state resistance a r ds(on) v gs = 10 v, i d = 30 a - 0.0126 0.0152 ? v gs = 7.5 v, i d = 30 a - 0.0133 0.0169 forward transconductance a g fs v ds = 15 v, i d = 30 a - 63 - s dynamic b input capacitance c iss v ds = 100 v, v gs = 0 v, f = 1 mhz - 3120 - pf output capacitance c oss - 280 - reverse transfer capacitance c rss -24- total gate charge q g v ds = 100 v, v gs = 10 v, i d = 60 a -5887 nc gate-source charge q gs - 17.6 - gate-drain charge q gd - 17.2 - output charge q oss v ds = 100 v, v gs = 0 v - 108 162 gate resistance r g f = 1 mhz 1.5 3 5 ? turn-on delay time t d(on) v dd = 100 v, r l = 1.66 ? , i d ? 60 a, v gen = 10 v, r g = 1 ? -1428 ns rise time t r - 125 250 turn-off delay time t d(off) -2754 fall time t f - 80 150 drain-source body diode characteristics pulse diode forward current (t = 100 s) i sm - - 240 a body diode voltage v sd i f = 30 a, v gs = 0 v - 0.85 1.5 v body diode reverse recovery time t rr i f = 30 a, di/dt = 100 a/s - 150 300 ns body diode reverse recovery charge q rr -0.91.8nc reverse recovery fall time t a - 125 - ns reverse recovery rise time t b -25- body diode peak reverse recovery charge i rm(rec) - 11.5 20 a
SUP90142E www.vishay.com vishay siliconix s16-1647-rev. a, 22-aug-16 3 document number: 75002 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) output characteristics on-resistance vs. drain current and gate voltage gate charge transfer characteristics capacitance on-resistance vs. junction temperature 10 100 1000 10000 0 40 80 120 160 200 0246810 axis title 1st line 2nd line 2nd line i d - drain current (a) v ds - drain-to-source voltage (v) 2nd line v gs = 10 v thru 7 v v gs = 6 v v gs = 5 v 10 100 1000 10000 0.011 0.012 0.013 0.014 0.015 0.016 0 20406080100 axis title 1st line 2nd line 2nd line r ds(on) - on-resistance () i d - drain current (a) 2nd line v gs = 7.5 v v gs = 10 v 10 100 1000 10000 0 2 4 6 8 10 0 1326395265 axis title 1st line 2nd line 2nd line v gs - gate-to-source voltage (v) q g - total gate charge (nc) 2nd line v ds = 100 v, 125 v, 150 v i d = 60 a 10 100 1000 10000 0 30 60 90 120 150 0246810 axis title 1st line 2nd line 2nd line i d - drain current (a) v gs - gate-to-source voltage (v) 2nd line t c = 25 c t c =-55 c t c = 125 c 10 100 1000 10000 0 1400 2800 4200 5600 7000 020406080100 axis title 1st line 2nd line 2nd line c - capacitance (pf) v ds - drain-to-source voltage (v) 2nd line c rss c oss c iss 10 100 1000 10000 0.5 1.0 1.5 2.0 2.5 3.0 -50-25 0 255075100125150175 axis title 1st line 2nd line 2nd line r ds(on) - on-resistance (normalized) t j - junction temperature (c) 2nd line i d = 30 a v gs = 10 v v gs = 7.5 v
SUP90142E www.vishay.com vishay siliconix s16-1647-rev. a, 22-aug-16 4 document number: 75002 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) source-drain diode forward voltage threshold voltage on-resistance vs. gate-to-source voltage transconductance safe operating area, junction-to-ambient 10 100 1000 10000 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1.0 1.2 axis title 1st line 2nd line 2nd line i s - source current (a) v sd - source-to-drain voltage (v) 2nd line t j = 150 c t j = 25 c 10 100 1000 10000 -2.0 -1.5 -1.0 -0.5 0 0.5 -50-25 0 255075100125150175 axis title 1st line 2nd line 2nd line v gs(th) - variance (v) t j - temperature (c) 2nd line i d = 5 ma i d = 250 a 10 100 1000 10000 0 0.01 0.02 0.03 0.04 0.05 45678910 axis title 1st line 2nd line 2nd line r ds(on) - on-resistance () v gs - gate-to-source voltage (v) 2nd line t j = 25 c t j = 125 c i d = 30 a 10 100 1000 10000 0 20 40 60 80 100 0 5 10 15 20 25 30 axis title 1st line 2nd line 2nd line g fs - transconductance (s) i d - drain current (a) 2nd line t c = 25 c t c =-55 c t c = 125 c 10 100 1000 10000 0.01 0.1 1 10 100 1000 0.1 1 10 100 1000 axis title 1st line 2nd line 2nd line i d - drain current (a) v ds - drain-to-source voltage (v) (1) v gs > minimum v gs at which r ds(on) is specified i dm limited limited by r ds(on) (1) t c = 25 c single pulse bvdss limited 100 ms, dc 10 ms 1 ms 100 s i d limited
SUP90142E www.vishay.com vishay siliconix s16-1647-rev. a, 22-aug-16 5 document number: 75002 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) current derating a drain source breakdown vs . junction temperature i dav vs. time note a. the power di ssipation p d is based on t j max. = 25 c, using junction-to-ca se thermal resistance, and is mo re useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to determine the cu rrent rating, when this rating falls below the package limit. 10 100 1000 10000 0 22 44 66 88 110 0255075100125150175 axis title 1st line 2nd line 2nd line i d - drain current (a) t c - case temperature (c) 2nd line 10 100 1000 10000 210 220 230 240 250 260 -50 -25 0 25 50 75 100 125 150 175 axis title 1st line 2nd line 2nd line v ds - drain-to-source voltage (v) t j - temperature (c) 2nd line i d = 10 ma 10 100 1000 10000 1 10 100 0.00001 0.0001 0.001 0.01 0.1 axis title 1st line 2nd line 2nd line i dav (a) time (s) 2nd line 150 c 25 c
SUP90142E www.vishay.com vishay siliconix s16-1647-rev. a, 22-aug-16 6 document number: 75002 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) normalized thermal transient impedance, junction-to-ambient normalized thermal transient impedance, junction-to-case vishay siliconix maintains worldw ide manufacturing ca pability. products may be manufactured at one of several qualified locatio ns. reliability da ta for silicon technology and package reliability represent a composite of all qu alified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?75002 . 10 100 1000 10000 0.01 0.1 1 0.001 0.01 0.1 1 10 100 1000 axis title 1st line 2nd line normalized effective transient thermal impedance square wave pulse duration (s) 2nd line 0.1 0.05 0.02 single pulse duty cycle = 0.5 0.2 p dm t 1 t 2 1. duty cycle, d = 2. per unit base = r thja = 40 c/w 3. t jm -t a = p dm z thja (t) 4. surface mounted t 1 t 2 notes: 10 100 1000 10000 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 axis title 1st line 2nd line normalized effective transient thermal impedance square wave pulse duration (s) 2nd line 0.1 0.05 0.02 single pulse duty cycle = 0.5 0.2
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