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lt3013b 1 3013bfb typical application description 250ma, 4v to 80v low dropout micropower linear regulator with pwrgd the lt ? 3013b is a high voltage, micropower low dropout linear regulator. the device is capable of supplying 250ma of output current with a dropout voltage of 400mv. de- signed for use in battery-powered or high voltage systems, the low quiescent current (65a operating) makes the lt3013b an ideal choice. quiescent current is also well controlled in dropout. other features of the lt3013b include a pwrgd ? ag to indicate output regulation. the delay between regulated output level and ? ag indication is programmable with a single capacitor. the lt3013b also has the ability to operate with very small output capacitors. the regulator is stable with only 3.3f on the output while most older devices require between 10f and 100f for stability. small ceramic capacitors can be used without any need for series resistance (esr) as is common with other regulators. internal protection circuitry includes reverse- battery protection, current limiting, thermal limiting and reverse-current protection. the device is available with an adjustable output with a 1.24v reference voltage. the lt3013b regulator is avail- able in the thermally enhanced 16-lead tssop and the low pro? le (0.75mm), 12-pin (4mm 3mm) dfn package, both providing excellent thermal characteristics. 5v supply l , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. features applications n wide input voltage range: 4v to 80v n low quiescent current: 65a n low dropout voltage: 400mv n output current: 250ma n no protection diodes needed n adjustable output from 1.24v to 60v n stable with 3.3f output capacitor n stable with aluminum, tantalum or ceramic capacitors n reverse-battery protection n no reverse current flow from output to input n thermal limiting n thermally enhanced 16-lead tssop and 12-pin (4mm 3mm) dfn package n low current high voltage regulators n regulator for battery-powered systems n telecom applications n automotive applications dropout voltage 1f v in 5.4v to80v 3013 ta01 v out 5v250ma 3.3f 750k249k 1.6m in lt3013b pwrgd out adj c t gnd 1000pf output current (ma) 0 250 300 400350 200 3013 ta02 200150 50 100 150 250 100 50 0 dropout voltage (mv) downloaded from: http:///
lt3013b 2 3013bfb in pin voltage ........................................................ 80v out pin voltage ..................................................... 60v in to out differential voltage ................................ 80v adj pin voltage ....................................................... 7v c t pin voltage ................................................. 7v, C0.5v pwrgd pin voltage ...................................... 80v, C0.5v output short-circuit duration ......................... inde? nite absolute maximum ratings 1211 10 98 7 13 12 3 4 5 6 ncin in nc nc c t nc outout adj gnd pwrgd top view de package 12-lead (4mm 3mm) plastic dfn t jmax = 125c, ja = 40c/w, jc = 16c/w exposed pad (pin 13) is gnd, must be soldered to pcb fe package 16-lead plastic tssop 12 3 4 5 6 7 8 top view 1615 14 13 12 11 10 9 17 gnd nc outout adj gnd pwrgd gnd gndnc in in nc nc c t gnd t jmax = 125c, ja = 40c/w, jc = 16c/w exposed pad (pin 17) is gnd, must be soldered to pcb pin configuration storage temperature range tssop package ................................ C65c to 150c dfn package ..................................... C65c to 125c operating junction temperature range (notes 3, 9, 10) ..................................... C40c to 125c lead temperature (soldering, 10 sec) tssop only ..................................................... 300c (note 1) order information lead free finish tape and reel part marking package description temperature range lt3013bede#pbf lt3013bede#trpbf 3013b 12-lead (4mm 3mm) plastic dfn C40c to 125c lt3013befe#pbf lt3013befe#trpbf 3013befe 16-lead plastic tssop C40c to 125c lead based finish tape and reel part marking package description temperature range lt3013bede lt3013bede#tr 3013b 12-lead (4mm 3mm) plastic dfn C40c to 125c lt3013befe lt3013befe#tr 3013befe 16-lead plastic tssop C40c to 125c consult ltc marketing for parts speci? ed with wider operating temperature ranges. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ downloaded from: http:///
lt3013b 3 3013bfb electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t j = 25c. parameter conditions min typ max units minimum input voltage i load = 250ma l 4 4.5 v adj pin voltage (notes 2, 3) v in = 4v, i load = 1ma 4.5v < v in < 80v, 1ma < i load < 250ma l 1.225 1.2 1.241.24 1.255 1.28 v v line regulation v in = 4v to 80v, i load = 1ma (note 2) l 0.1 5 mv load regulation (note 2) v in = 4.5v, i load = 1ma to 250ma v in = 4.5v, i load = 1ma to 250ma l 7 12 25 mvmv dropout voltage v in = v out(nominal) (notes 4, 5) i load = 10ma i load = 10ma l 160 230 300 mvmv i load = 50ma i load = 50ma l 250 340 420 mvmv i load = 250ma i load = 250ma l 400 490 620 mvmv gnd pin currentv in = 4.5v (notes 4, 6) i load = 0ma i load = 100ma i load = 250ma ll 65 3 10 120 18 a mama output voltage noise c out = 10f, i load = 250ma, bw = 10hz to 100khz 100 v rms adj pin bias current (note 7) 30 100 na pwrgd trip point % of nominal output voltage, output rising l 85 90 94 % pwrgd trip point hysteresis % of nominal output voltage 1.1 % pwrgd output low voltage i pwrgd = 50a l 140 250 mv c t pin charging current 3.6 6 a c t pin voltage differential v ct(pwrgd high) C v ct(pwrgd low) 1.6 v ripple rejection v in = 7v(avg), v ripple = 0.5v p-p , f ripple = 120hz, i load = 250ma 65 75 db current limit v in = 7v, v out = 0v v in = 4.5v, v out = C0.1v (note 2) l 270 400 ma ma reverse output current (note 8) v out = 1.24v, v in < 1.24v (note 2) 12 25 a note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the lt3013b is tested and speci? ed for these conditions with the adj pin connected to the out pin.note 3: operating conditions are limited by maximum junction temperature. the regulated output voltage speci? cation will not apply for all possible combinations of input voltage and output current. when operating at maximum input voltage, the output current range must be limited. when operating at maximum output current, the input voltage range must be limited. note 4: to satisfy requirements for minimum input voltage, the lt3013b is tested and speci? ed for these conditions with an external resistor divider (249k bottom, 549k top) for an output voltage of 4v. the external resistor divider will add a 5a dc load on the output. note 5: dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a speci? ed output current. in dropout, the output voltage will be equal to (v in C v dropout ). note 6: gnd pin current is tested with v in = 4.5v and a current source load. this means the device is tested while operating close to its dropout region. this is the worst-case gnd pin current. the gnd pin current will decrease slightly at higher input voltages. note 7: adj pin bias current ? ows into the adj pin. note 8: reverse output current is tested with the in pin grounded and the out pin forced to the rated output voltage. this current ? ows into the out pin and out the gnd pin. note 9: the lt3013be is guaranteed to meet performance speci? cations from 0c to 125c operating junction temperature. speci? cations over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. note 10: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may impair device reliability. downloaded from: http:///
lt3013b 4 3013bfb typical performance characteristics quiescent current adj pin voltage quiescent current gnd pin current gnd pin current typical dropout voltage guaranteed dropout voltage dropout voltage output current (ma) 0 dropout voltage (mv) 300 400 600500 3013 g01 200100 0 100 50 200 150 250 t j = 125c t j = 25c output current (ma) 0 guaranteed dropout voltage (mv) 200 400 600100 300 500 100 200 3013 g02 250 50 0 150 = test points t j 125c t j 25c temperature (c) C50 0 dropout voltage (mv) 200 600500 0 50 75 3013 g03 100 400300 C25 25 100 125 i l = 50ma i l = 10ma i l = 250ma i l = 100ma i l = 1ma temperature (c) C50 adj pin voltage (v) 1.255 25 3013 g05 1.240 1.230 C25 0 50 1.2251.220 1.2601.250 1.245 1.235 75 100 125 i l = 1ma input voltage (v) 0 gnd pin current (ma) 1.2 8 3013 g07 0.80.4 1.00.6 0.2 0 2 1 4 3 67 9 5 10 t j = 25c *for v out = 1.24v r l = 49.6 i l = 25ma* r l = 124 i l = 10ma* r l = 1.24k i l = 1ma* input voltage (v) 0 gnd pin current (ma) 6 8 10 8 3013 g08 42 5 7 93 1 0 2 1 4 3 67 9 5 10 t j = 25c, *for v out = 1.24v r l = 4.96 i l = 250ma* r l = 12.4 i l = 100ma* r l = 24.8, i l = 50ma* quiescent current 0 40 120100 20 8060 C50 0 50 75 C25 25 100 150 125 temperature (c) quiescent current (a) 3013 g04 v in = 6v r l = i l = 0 input voltage (v) 0 quiescent current (a) 40 60 80 8 3013 g06 2010 30 50 70 0 2 1 4 3 67 9 5 10 t j = 25c r l = input voltage (v) 0 quiescent current (a) 150 200 250 80 3013 g06b 100 50 125 175 225 7525 0 20 10 40 30 60 70 50 t j = 25c r l = v out = 1.24v downloaded from: http:///
lt3013b 5 3013bfb gnd pin current vs i load typical performance characteristics load current (ma) 0 gnd pin current (ma) 6 8 10 3013 g09 42 5 7 93 1 0 100 50 200 150 250 v in = 4.5v t j = 25c adj pin bias current pwrgd trip point pwrgd output low voltage c t charging current c t comparator thresholds current limit current limit reverse output current temperature (c) C50 adj pin bias current (na) 45 25 3013 g13 2520 C25 0 50 5 10 15 0 5040 35 30 75 100 125 temperature (c) C50 pwrgd trip point (% of output voltage) 94 25 3013 g25 9089 C25 0 50 86 87 8885 9593 92 91 75 100 125 output rising output falling temperature (c) C50 pwrgd output low voltage (mv) 180 25 3013 g26 100 80 C25 0 50 20 40 60 0 200160 140 120 75 100 125 i pwrgd = 50a temperature (c) C50 ct charging current (a) 3.5 25 3013 g27 1.51.0 C25 0 50 0.5 0 4.03.0 2.5 2.0 75 100 125 pwrgd tripped high temperature (c) C50 ct comparator thresholds (v) 1.8 25 3013 g28 1.00.8 C25 0 50 0.2 0.4 0.6 0 2.01.6 1.4 1.2 75 100 125 v ct (low) v ct (high) input voltage (v) 0 current limit (a) 0.6 0.8 1.0 3013 g14 0.40.2 0.5 0.7 0.90.3 0.1 0 20 10 40 30 60 70 50 80 t j = 25c t j = 125c v out = 0v temperature (c) C50 0 current limit (a) 0.1 0.3 0.4 0.5 0.7 0 50 75 3013 g15 0.2 0.6 C25 25 100 125 v in = 7v v out = 0v output voltage (v) 0 reverse output current (a) 120 160 200 8 3013 g16 8040 100 140 180 6020 0 2 1 4 3 67 9 5 10 t j = 25c v in = 0v v out = v adj current flowsinto output pin adj pin clamp (see applications information) downloaded from: http:///
lt3013b 6 3013bfb typical performance characteristics load regulation output noise spectral density 10hz to 100hz output noise transition response input ripple rejection input ripple rejection minimum input voltage temperature (c) C50 60 ripple rejection (db) 68 9280 84 88 0 50 75 3013 g18 64 7672 C25 25 100 125 v in = 4.5v + 0.5v p-p ripple at f = 120hz i l = 250ma v out = 1.24v frequency (hz) 10 40 ripple rejection (db) 50 60 70 80 100 1k 10k 100k 1m 3013 g19 30 2010 0 90 100 v in = 4.5v + 50mv rms ripple i load = 250ma c out = 10f c out = 3.3f temperature (c) C50 minimum input voltage (v) 3.5 25 3013 g20 2.0 1.0 C25 0 50 0.5 0 4.03.0 2.5 1.5 75 100 125 i load = 250ma temperature (c) C50 load regulation (mv) C4 C2 25 3013 g21 C12C16 C25 0 50 C18C20 0 C8 C6 C10C14 75 100 125 i l = 1ma to 250ma frequency (hz) 0.1 output noise spectral density (mv/ hz ) 1 10 1k 10k 100k 3013 g22 0.01 100 10 c out = 3.3f i load = 250ma v out 100v/div 1ms/div 3013b g23 c out = 10f i l = 250ma v out = v adj time (s) 0 output voltage deviation (v) load current (ma) C0.05 0.05 400 3013 g24 100 C0.10C0.15 0 0.10 0.15 200 300 0 100 200 300 500 v in = 6v v out = 5v c in = 3.3f ceramic c out = 3.3f ceramic i load = 100ma to 200ma reverse output current temperature (c) C50 reverse output current (a) 25 3013 g17 20 10 C25 0 50 50 3530 25 15 75 100 125 v in = 0v v out = v adj = 1.24v downloaded from: http:///
lt3013b 7 3013bfb pin functions (dfn/tssop) nc (pins 1, 8, 9, 12/pins 2, 11, 12, 15): no connect. no connect pins may be ? oated, tied to in or tied to gnd. out (pins 2, 3/pins 3, 4): output. the output supplies power to the load. a minimum output capacitor of 3.3f is required to prevent oscillations. larger output capaci- tors will be required for applications with large transient loads to limit peak voltage transients. see the applications information section for more information on output ca- pacitance and reverse output characteristics. adj (pin 4/pin 5): adjust. this is the input to the error ampli? er. this pin is internally clamped to 7v. it has a bias current of 30na which ? ows into the pin (see curve of adj pin bias current vs temperature in the typical performance characteristics). the adj pin voltage is 1.24v referenced to ground, and the output voltage range is 1.24v to 60v. gnd (pin 5/pins 1, 6, 8, 9, 16): ground. pwrgd (pin 6/pin 7): power good. the pwrgd ? ag is an open-collector ? ag to indicate that the output voltage has come up to above 90% of the nominal output voltage. there is no internal pull-up on this pin; a pull-up resistor must be used. the pwrgd pin will change state from an open-collector to high impedance after both the output is above 90% of the nominal voltage and the capacitor on the c t pin has charged through a 1v differential. the maximum pull-down current of the pwrgd pin in the low state is 50a. c t (pin 7/pin 10): timing capacitor. the c t pin allows the use of a small capacitor to delay the timing between the point where the output crosses the pwrgd thresh- old and the pwrgd ? ag changes to a high impedance state. current out of this pin during the charging phase is 3a. the voltage difference between the pwrgd low and pwrgd high states is 1.6v (see the applications information section). in (pins 10, 11/pins 13,14): input. power is supplied to the device through the in pin. a bypass capacitor is required on this pin if the device is more than six inches away from the main input ? lter capacitor. in general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. a bypass capacitor in the range of 1f to 10f is suf? cient. the lt3013b is designed to withstand reverse voltages on the in pin with respect to ground and the out pin. in the case of a reversed input, which can happen if a battery is plugged in backwards, the lt3013b will act as if there is a diode in series with its input. there will be no reverse current ? ow into the lt3013b and no reverse voltage will appear at the load. the device will protect both itself and the load. exposed pad (pin 13/pin 17): ground. the exposed backside of the package is an electrical connection for gnd. as such, to ensure optimum device operation and thermal performance, the exposed pad must be connected directly to pin 5/pin 6 on the pc board. downloaded from: http:///
lt3013b 8 3013bfb applications information the lt3013b is a 250ma high voltage low dropout regulator with micropower quiescent current. the device is capable of supplying 250ma at a dropout voltage of 400mv. op- erating quiescent current is only 65a. in addition to the low quiescent current, the lt3013b incorporates several protection features which make it ideal for use in bat- tery-powered systems. the device is protected against both reverse input and reverse output voltages. in battery backup applications where the output can be held up by a backup battery when the input is pulled to ground, the lt3013b acts like it has a diode in series with its output and prevents reverse current ? ow. adjustable operation the lt3013b has an output voltage range of 1.24v to 60v. the output voltage is set by the ratio of two external resis- tors as shown in figure 1. the device servos the output to maintain the voltage at the adjust pin at 1.24v referenced to ground. the current in r1 is then equal to 1.24v/r1 and the current in r2 is the current in r1 plus the adj pin bias current. the adj pin bias current, 30na at 25c, ? ows through r2 into the adj pin. the output voltage can be calculated using the formula in figure 1. the value of r1 should be less than 250k to minimize errors in the output voltage caused by the adj pin bias current. the adjustable device is tested and speci? ed with the adj pin tied to the out pin and a 5a dc load (unless otherwise speci? ed) for an output voltage of 1.24v. speci? cations for output voltages greater than 1.24v will be proportional to the ratio of the desired output voltage to 1.24v; (v out / 1.24v). for example, load regulation for an output current change of 1ma to 250ma is C7mv typical at v out = 1.24v. at v out = 12v, load regulation is: (12v/1.24v) ? (C7mv) = C68mv output capacitance and transient response the lt3013b is designed to be stable with a wide range of output capacitors. the esr of the output capacitor affects stability, most notably with small capacitors. a minimum output capacitor of 3.3f with an esr of 3 or less is recommended to prevent oscillations. the lt3013b is a micropower device and output transient response will be a function of output capacitance. larger values of output capacitance decrease the peak deviations and provide improved transient response for larger load current changes. bypass capacitors, used to decouple individual components powered by the lt3013b, will increase the effective output capacitor value. extra consideration must be given to the use of ceramic capacitors. ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. the most common dielectrics used are speci? ed with eia temperature char- acteristic codes of z5u, y5v, x5r and x7r. the z5u and y5v dielectrics are good for providing high capacitances in a small package, but they tend to have strong voltage v in 3013 f01 v out r2r1 + r2r1 v out = 1.24v v adj = 1.24v i adj = 30na at 25c output range = 1.24v to 60v + (i adj )(r2) 1 + ? in lt3013b out adj gnd figure 1. adjustable operation downloaded from: http:///
lt3013b 9 3013bfb applications information and temperature coef? cients as shown in figures 2 and 3. when used with a 5v regulator, a 16v 10f y5v capacitor can exhibit an effective value as low as 1f to 2f for the dc bias voltage applied and over the operating tempera- ture range. the x5r and x7r dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. the x7r type has better stability across temperature, while the x5r is less expensive and is avail- able in higher values. care still must be exercised when using x5r and x7r capacitors; the x5r and x7r codes only specify operating temperature range and maximum capacitance change over temperature. capacitance change due to dc bias with x5r and x7r capacitors is better than y5v and z5u capacitors, but can still be signi? cant enough to drop capacitor values below appropriate levels. capaci-tor dc bias characteristics tend to improve as component case size increases, but expected capacitance at operating voltage should be veri? ed. voltage and temperature coef? cients are not the only sources of problems. some ceramic capacitors have a piezoelectric response. a piezoelectric device generates voltage across its terminals due to mechanical stress, simi- lar to the way a piezoelectric accelerometer or microphone works. for a ceramic capacitor the stress can be induced by vibrations in the system or thermal transients. pwrgd flag and timing capacitor delay the pwrgd ? ag is used to indicate that the adj pin volt- age is within 10% of the regulated voltage. the pwrgd pin is an open-collector output, capable of sinking 50a of current when the adj pin voltage is low. there is no internal pull-up on the pwrgd pin; an external pull-up resistor must be used. when the adj pin rises to within 10% of its ? nal reference value, a delay timer is started. at the end of this delay, programmed by the value of the capacitor on the c t pin, the pwrgd pin switches to a high impedance and is pulled up to a logic level by an external pull-up resistor. to calculate the capacitor value on the c t pin, use the following formula: c it vv time ct delay ct high ct low = ? ? () () figure 4 shows a block diagram of the pwrgd circuit. at start-up, the timing capacitor is discharged and the pwrgd pin will be held low. as the output voltage increases and the adj pin crosses the 90% threshold, the jk ? ip-? op is reset, and the 3a current source begins to charge the dc bias voltage (v) change in value (%) 3013 f02 20 0 C20C40 C60 C80 C100 0 4 8 10 26 12 14 x5r y5v 16 both capacitors are 16v,1210 case size, 10f temperature (c) C50 4020 0 C20C40 C60 C80 C100 25 75 3013 f03 C25 0 50 100 125 y5v change in value (%) x5r both capacitors are 16v,1210 case size, 10f figure 2. ceramic capacitor dc bias characteristics figure 3. ceramic capacitor temperature characteristics downloaded from: http:///
lt3013b 10 3013bfb applications information qj k v ref ? 90% adj v ct(low) ~0.1v v ct(high) C v be (~1.1v) i ct 3a ct 3013 f04 C + C + pwrgd figure 4. pwrgd circuit block diagram timing capacitor. once the voltage on the c t pin reaches the v ct(high) threshold (approximately 1.7v at 25c), the capacitor voltage is clamped and the pwrgd pin is set to a high impedance state. during normal operation, an internal glitch ? lter will ignore short transients (<15s). longer transients below the 90% threshold will reset the jk ? ip-? op. this ? ip-? op ensures that the capacitor on the c t pin is quickly discharged all the way to the v ct(low) threshold before restarting the time delay. this provides a consistent time delay after the adj pin is within 10% of the regulated voltage before the pwrgd pin switches to high impedance. current limit and safe operating area protection like many ic power regulators, the lt3013b has safe op- erating area protection. the safe operating area protection decreases the current limit as the input voltage increases and keeps the power transistor in a safe operating region. the protection is designed to provide some output current at all values of input voltage up to the device breakdown (see curve of current limit vs input voltage in the typical performance characteristics). the lt3013b is limited for operating conditions by maxi- mum junction temperature. while operating at maximum input voltage, the output current range must be limited; when operating at maximum output current, the input voltage range must be limited. device speci? cations will not apply for all possible combinations of input voltage and output current. operating the lt3013b beyond the maximum junction temperature rating may impair the life of the device. thermal considerations the power handling capability of the device will be limited by the maximum rated junction temperature (125c). the power dissipated by the device will be made up of two components: 1. output current multiplied by the input/output voltage differential: i out ? (v in C v out ) and, 2. gnd pin current multiplied by the input voltage: i gnd ? v in . the gnd pin current can be found by examining the gnd pin current curves in the typical performance character- istics. power dissipation will be equal to the sum of the two components listed above. the lt3013b series regulators have internal thermal limiting designed to protect the device during overload conditions. for continuous normal conditions the maximum junction temperature rating of 125c must not be exceeded. it is important to give careful consideration to all sources of thermal resistance from junction to ambient. additional heat sources mounted nearby must also be considered. downloaded from: http:///
lt3013b 11 3013bfb applications information for surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the pc board and its copper traces. copper board stiffeners and plated through-holes can also be used to spread the heat gener- ated by power devices. the following tables list thermal resistance for several different board sizes and copper areas. all measurements were taken in still air on 3/32" fr-4 board with one ounce copper. table 1. measured thermal resistance (tssop) copper area board area thermal resistance topside backside (junction-to-ambient) 2500 sq mm 2500 sq mm 2500 sq mm 40c/w 1000 sq mm 2500 sq mm 2500 sq mm 45c/w 225 sq mm 2500 sq mm 2500 sq mm 50c/w 100 sq mm 2500 sq mm 2500 sq mm 62c/w table 2. measured thermal resistance (dfn) copper area thermal resistance topside backside board area (junction-to-ambient) 2500 sq mm 2500 sq mm 2500 sq mm 40c/w 1000 sq mm 2500 sq mm 2500 sq mm 45c/w 225 sq mm 2500 sq mm 2500 sq mm 50c/w 100 sq mm 2500 sq mm 2500 sq mm 62c/w the thermal resistance junction-to-case ( jc ), measured at the exposed pad on the back of the die, is 16c/w. continuous operation at large input/output voltage dif- ferentials and maximum load current is not practical due to thermal limitations. transient operation at high input/output differentials is possible. the approximate thermal time constant for a 2500sq mm 3/32" fr-4 board with maximum topside and backside area for one ounce copper is 3 seconds. this time constant will increase as more thermal mass is added (i.e., vias, larger board, and other components). for an application with transient high power peaks, average power dissipation can be used for junction temperature calculations as long as the pulse period is signi? cantly less than the thermal time constant of the device and board. calculating junction temperature example 1: given an output voltage of 5v, an input volt- age range of 8v to 12v, an output current range of 0ma to 250ma, and a maximum ambient temperature of 30c, what will the maximum junction temperature be? the power dissipated by the device will be equal to: i out(max) ? (v in(max) C v out ) + (i gnd ? v in(max) ) where: i out(max) = 250ma v in(max) = 12v i gnd at (i out = 250ma, v in = 12v) = 8ma so: p = 250ma ? (12v C 5v) + (8ma ? 12v) = 1.85w the thermal resistance will be in the range of 40c/w to 62c/w depending on the copper area. so the junction temperature rise above ambient will be approximately equal to: 1.85w ? 50c/w = 92.3c the maximum junction temperature will then be equal to the maximum junction temperature rise above ambient plus the maximum ambient temperature or: t jmax = 30c + 92.3c = 122.3c example 2: given an output voltage of 5v, an input voltage of 48v that rises to 72v for 5ms(max) out of every 100ms, and a 5ma load that steps to 200ma for 50ms out of every 250ms, what is the junction temperature rise above ambi- ent? using a 500ms period (well under the time constant of the board), power dissipation is as follows: p1(48v in, 5ma load) = 5ma ? (48v C 5v) + (200a ? 48v) = 0.23w p2(48v in, 50ma load) = 200ma ? (48v C 5v) + (8ma ? 48v) = 8.98w p3(72v in, 5ma load) = 5ma ? (72v C 5v) + (200a ? 72v) = 0.35w p4(72v in, 50ma load) = 200ma ? (72v C 5v) + (8ma ? 72v) = 13.98w downloaded from: http:///
lt3013b 12 3013bfb applications information operation at the different power levels is as follows: 76% operation at p1, 19% for p2, 4% for p3, and 1% for p4. peff = 76%(0.23w) + 19%(8.98w) + 4%(0.35w) + 1%(13.98w) = 2.03w with a thermal resistance in the range of 40c/w to 62c/w, this translates to a junction temperature rise above ambi- ent of 81c to 125c. protection features the lt3013b incorporates several protection features which make it ideal for use in battery-powered circuits. in addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device is protected against reverse-input volt- ages, and reverse voltages from output to input. current limit protection and thermal overload protection are intended to protect the device against current overload conditions at the output of the device. for normal operation, the junction temperature should not exceed 125c. like many ic power regulators, the lt3013b has safe oper- ating area protection. the safe area protection decreases the current limit as input voltage increases and keeps the power transistor inside a safe operating region for all values of input voltage. the protection is designed to provide some output current at all values of input voltage up to the device breakdown. the soa protection circuitry for the lt3013b uses a current generated when the input voltage exceeds 25v to decrease current limit. this cur- rent shows up as additional quiescent current for input voltages above 25v. this increase in quiescent current occurs both in normal operation and in shutdown (see curve of quiescent current in the typical performance characteristics). the input of the device will withstand reverse voltages of 80v. no negative voltage will appear at the output. the device will protect both itself and the load. this provides protection against batteries which can be plugged in backward. the adj pin of the device can be pulled above or below ground by as much as 7v without damaging the device. if the input is left open circuit or grounded, the adj pin will act like an open circuit when pulled below ground, and like a large resistor (typically 100k) in series with a diode when pulled above ground. if the input is powered by a voltage source, pulling the adj pin below the reference voltage will cause the device to try and force the current limit current out of the output. this will cause the output to go to a unregulated high voltage. pulling the adj pin above the reference voltage will turn off all output current. in situations where the adj pin is connected to a resistor divider that would pull the adj pin above its 7v clamp voltage if the output is pulled high, the adj pin input current must be limited to less than 5ma. for example, a resistor divider is used to provide a regulated 1.5v output from the 1.24v reference when the output is forced to 60v. the top resistor of the resistor divider must be chosen to limit the current into the adj pin to less than 5ma when the adj pin is at 7v. the 53v difference between the out and adj pins divided by the 5ma maximum current into the adj pin yields a minimum top resistor value of 10.6k. in circuits where a backup battery is required, several different input/output conditions can occur. the output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage, or is left open circuit. current ? ow back into the output will follow the curve shown in figure 5. the rise in reverse output current above 7v occurs from the breakdown of the 7v clamp on the adj pin. with a resistor divider on the output voltage (v) 0 reverse output current (a) 120 160 200 8 3013 f05 8040 100 140 180 6020 0 2 1 4 3 67 9 5 10 adj pin clamp (see above) t j = 25c v in = 0v v out = v adj current flowsinto output pin figure 5. reverse output current downloaded from: http:///
lt3013b 13 3013bfb typical applications lt3013b automotive application + adj out in lt3013b gnd 1f 3.3f 750k v in 12v (later 42v) load: clock, security system etc + C adj out in lt3013b gnd 1f 3.3f v in 48v (72v transient) load: system monitor etc no protection diode needed! no protection diode needed! 3013 ta05 backupbattery 249k 750k 249k lt3013b telecom application constant brightness for indicator led over wide input voltage range in lt3013b 1f return C48v out adj gnd 3013 ta06 3.3f r set i led = 1.24v/r set C48v can vary from C4v to C80v applications information regulator output, this current will be reduced depending on the size of the resistor divider. when the in pin of the lt3013b is forced below the out pin or the out pin is pulled above the in pin, input current will typically drop to less than 2a. this can happen if the input of the lt3013b is connected to a discharged (low voltage) battery and the output is held up by either a backup battery or a second regulator circuit. downloaded from: http:///
lt3013b 14 3013bfb package description de package 12-lead plastic dfn (4mm 3mm) (reference ltc dwg # 05-08-1695 rev d) 4.00 0.10 (2 sides) 3.00 0.10 (2 sides) note:1. drawing proposed to be a variation of version (wged) in jedec package outline m0-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom viewexposed pad 1.70 0.10 0.75 0.05 r = 0.115 typ r = 0.05 typ 2.50 ref 1 6 12 7 pin 1 notchr = 0.20 or 0.35 45 chamfer pin 1 top mark (note 6) 0.200 ref 0.00 C 0.05 (ue12/de12) dfn 0806 rev d 2.50 ref recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 2.20 0.05 0.70 0.05 3.60 0.05 package outline 3.30 0.10 0.25 0.05 0.50 bsc 1.70 0.05 3.30 0.05 0.50 bsc 0.25 0.05 downloaded from: http:///
lt3013b 15 3013bfb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description fe package 16-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1663) exposed pad variation bb fe16 (bb) tssop 0204 0.09 C 0.20 (.0035 C .0079) 0 C 8 0.25 ref 0.50 C 0.75 (.020 C .030) 4.30 C 4.50* (.169 C .177) 134 5 6 7 8 10 9 4.90 C 5.10* (.193 C .201) 16 1514 13 12 11 1.10 (.0433) max 0.05 C 0.15 (.002 C .006) 0.65 (.0256) bsc 2.94 (.116) 0.195 C 0.30 (.0077 C .0118) typ 2 recommended solder pad layout 0.45 0.05 0.65 bsc 4.50 0.10 6.60 0.10 1.05 0.10 2.94 (.116) 3.58 (.141) 3.58 (.141) millimeters (inches) *dimensions do not include mold flash. mold flash shall not exceed 0.150mm (.006") per side note:1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale see note 4 4. recommended minimum pcb metal size for exposed pad attachment 6.40 (.252) bsc downloaded from: http:///
lt3013b 16 3013bfb linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2006 lt 0109 rev b printed in usa related parts part number description comments lt1020 125ma, micropower regulator and comparator v in : 4.5v to 36v, v out = 2.5v, v do = 0.4v, i q = 40a, i sd = 40a, comparator and reference, class b outputs, s16, pdip14 packages lt1120/lt1120a 125ma, micropower regulator and comparator v in : 4.5v to 36v, v out = 2.5v, v do = 0.4v, i q = 40a, i sd = 10a, comparator and reference, logic shutdown, ref sources and sinks 2/4ma, s8, n8 packages lt1121/lt1121hv 150ma, micropower, ldo v in : 4.2v to 30/36v, v out = 3.75v, v do = 0.42v, i q = 30a, i sd = 16a, reverse battery protection, sot-223, s8, z packages lt1129 700ma, micropower, ldo v in : 4.2v to 30v, v out = 3.75v, v do = 0.4v, i q = 50a, i sd = 16a, dd, s0t-223, s8,to220-5, tssop20 packages lt1616 25v, 500ma (i out ), 1.4mhz, high ef? ciency step-down dc/dc converter v in : 3.6v to 25v, v out = 1.25v, i q = 1.9ma, i sd = <1a, thinsot package lt1676 60v, 440ma (i out ), 100khz, high ef? ciency step-down dc/dc converter v in : 7.4v to 60v, v out = 1.24v, i q = 3.2ma, i sd = 2.5a, s8 package lt1761 100ma, low noise micropower, ldo v in : 1.8v to 20v, v out = 1.22v, v do = 0.3v, i q = 20a, i sd = <1a, low noise < 20v rms p-p , stable with 1f ceramic capacitors, thinsot package lt1762 150ma, low noise micropower, ldo v in : 1.8v to 20v, v out = 1.22v, v do = 0.3v, i q = 25a, i sd = <1a, low noise < 20v rms p-p , ms8 package lt1763 500ma, low noise micropower, ldo v in : 1.8v to 20v, v out = 1.22v, v do = 0.3v, i q = 30a, i sd = <1a, low noise < 20v rms p-p , s8 package lt1764/lt1764a 3a, low noise, fast transient response, ldo v in : 2.7v to 20v, v out = 1.21v, v do = 0.34v, i q = 1ma, i sd = <1a, low noise < 40v rms p-p, a version stable with ceramic capacitors, dd, to220-5 packages lt1766 60v, 1.2a (i out ), 200khz, high ef? ciency step-down dc/dc converter v in : 5.5v to 60v, v out = 1.20v, i q = 2.5ma, i sd = 25a, tssop16/e package lt1776 40v, 550ma (i out ), 200khz, high ef? ciency step-down dc/dc converter v in : 7.4v to 40v, v out = 1.24v, i q = 3.2ma, i sd = 30a, n8, s8 packages lt1934/lt1934-1 300ma/60ma, (iout), constant off-time, high ef? ciency step-down dc/dc converter 90% ef? ciency, v in : 3.2v to 34v, v out = 1.25v, i q = 14a, i sd = <1a, thinsot package lt1956 60v, 1.2a (i out ), 500khz, high ef? ciency step-down dc/dc converter v in : 5.5v to 60v, v out = 1.20v, i q = 2.5ma, i sd = 25a, tssop16/e package lt1962 300ma, low noise micropower, ldo v in : 1.8v to 20v, v out = 1.22v, v do = 0.27v, i q = 30a, i sd = <1a, low noise < 20v rms p-p , ms8 package lt1963/lt1963a 1.5a, low noise, fast transient response, ldo v in : 2.1v to 20v, v out = 1.21v, v do = 0.34v, i q = 1ma, i sd = <1a, low noise < 40v rms p-p , a version stable with ceramic capacitors, dd, to220-5, s0t-223, s8 packages lt1964 200ma, low noise micropower, negative ldo v in : C1.9v to C20v, v out = C1.21v, v do = 0.34v, i q = 30a, i sd = 3a, low noise < 30v rms p-p , stable with ceramic capacitors, thinsot package lt3010 50ma, high voltage, micropower ldo v in : 3v to 80v, v out(min) = 1.2v, v do = 0.3v, i q = 30a, i sd < 1a, low noise: <100v rms , stable with 1f output capacitor, exposed ms8e package downloaded from: http:///

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