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general description the max6730Cmax6735 single/dual/triple-voltage micro - processor (p) supervisors feature a watchdog timer and manual reset capability. the max6730Cmax6735 offer factory-set reset thresholds for monitoring voltages from +0.9v to +5v and an adjustable reset input for monitoring voltages down to +0.63v. the combination of these features significantly improves system reliability and accuracy when compared to separate ics or discrete components. the active-low reset output asserts and remains asserted for the reset timeout period after all the monitored voltages exceed their respective thresholds. multiple factory-set reset threshold combinations reduce the number of external components required. the max6730/max6731 monitor a single fixed voltage, the max6732/max6733 monitor two fixed voltages, and the max6734/max6735 monitor two fixed voltages and one adjustable voltage. all devices are offered with six minimum reset timeout periods ranging from 1.1ms to 1120ms. the max6730Cmax6735 feature a watchdog timer with an independent watchdog output. the watchdog timer prevents system lockup during code execution errors. a watchdog startup delay of 54s after reset asserts allows system initialization during power-up. the watchdog operates in normal mode with a 1.68s delay after initialization. the max6730/max6732/max6734 provide an active-low, open-drain watchdog output. the max6731/max6733/ max6735 provide an active-low, push-pull watchdog output. other features include a manual reset input (max6730/ max6731/max6734/max6735) and push-pull reset output (max6731/max6733/max6735) or open-drain reset output (max6730/max6732/max6734). the max6730C max6733 are offered in a tiny sot23-6 package. the max6734/max6735 are offered in a space-saving sot23-8 package. all devices are fully specified over the extended -40c to +85c temperature range. applications multivoltage systems telecom/networking equipment computers/servers portable/battery-operated equipment industrial equipment printer/fax set-top boxes beneits and features v cc 1 (primary supply) reset threshold voltages from +1.575v to +4.63v v cc 2 (secondary supply) reset threshold voltages from +0.79v to +3.08v adjustable rstin threshold for monitoring voltages down to +0.63v (max6734/max6735 only) six reset timeout options watchdog timer with independent watchdog output ? 35s (min) initial watchdog startup period ? 1.12s (min) normal watchdog timeout period manual reset input (max6730/max6731/max6734/max6735) guaranteed reset valid down to v cc 1 or v cc 2 = +0.8v push-pull reset or open-drain reset output immune to short v cc transients low supply current: 14a (typ) at +3.6v small 6-pin and 8-pin sot23 packages pin configurations appear at end of data sheet. 19-2629; rev 8; 12/15 max6734max6735 +0.9v v core +3.3v +1.8v mr gnd rstin rst wdi wdo pushbutton switch reset p nmi i/o v cc (i/o) v dd (memory) v cc 1 v cc 2 gnd typical operating circuit max6730Cmax6735 single/dual/triple-voltage p supervisory circuits with independent watchdog output downloaded from: http:///
v cc 1, v cc 2, rstin, mr , wdi to gnd .................. -0.3v to +6v rst , wdo to gnd (open drain) ............................. -0.3v to +6v rst , wdo to gnd (push-pull) .............. -0.3v to (v cc 1 + 0.3v) input current/output current (all pins) ............................... 20ma continuous power dissipation (t a = +70c) 6-pin sot23-6 (derate 4.3mw/c above +70c) .... 347.8mw 8-pin sot23-8 (derate 5.6mw/c above +70c) .... 444.4mw operating temperature range ........................... -40c to +85c storage temperature range ............................ -65c to +150c junction temperature ...................................................... +150c lead temperature (soldering, 10s) ................................. +300c soldering temperature (reflow) lead (pb)-free packages.............................................+260c package containing lead (pb) .....................................+240c 6 sot23 junction-to-ambient thermal resistance ( ja ) ........ 230c/w junction-to-case thermal resistance ( jc ) ............... 76c/w 8 sot23 junction-to-ambient thermal resistance ( ja ) ........ 180c/w junction-to-case thermal resistance ( jc ) ............... 60c/w (note 1) (v cc 1 = v cc 2 = +0.8v to +5.5v, t a = -40c to +85c, unless otherwise noted. typical values are at t a = +25c.) (note 2) parameter symbol conditions min typ max units supply voltage v cc 1, v cc 2 0.8 5.5 v supply current i cc 1 v cc 1 < +5.5v, all i/o connections open, outputs not asserted 15 39 a v cc 1 < +3.6v, all i/o connections open, outputs not asserted 10 28 i cc 2 v cc 2 < +3.6v, all i/o connections open, outputs not asserted 4 11 v cc 2 < +2.75v, all i/o connections open, outputs not asserted 3 9 v cc 1 reset threshold v th 1 l (falling) 4.500 4.625 4.750 v m (falling) 4.250 4.375 4.500 t (falling) 3.000 3.075 3.150 s (falling) 2.850 2.925 3.000 r (falling) 2.550 2.625 2.700 z (falling) 2.250 2.313 2.375 y (falling) 2.125 2.188 2.250 w (falling) 1.620 1.665 1.710 v (falling) 1.530 1.575 1.620 max6730Cmax6735 single/dual/triple-voltage p supervisory circuits with independent watchdog output www.maximintegrated.com maxim integrated 2 note 1: package thermal resistances were obtained using the method described in jedec specification jesd51- 7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial . absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. package thermal characteristicselectrical characteristics downloaded from: http:///
(v cc 1 = v cc 2 = +0.8v to +5.5v, t a = -40c to +85c, unless otherwise noted. typical values are at t a = +25c.) (note 2) parameter symbol conditions min typ max units v cc 2 reset threshold v th 2 t (falling) 3.000 3.075 3.150 v s (falling) 2.850 2.925 3.000 r (falling) 2.550 2.625 2.700 z (falling) 2.250 2.313 2.375 y (falling) 2.125 2.188 2.250 w (falling) 1.620 1.665 1.710 v (falling) 1.530 1.575 1.620 i (falling) 1.350 1.388 1.425 h (falling) 1.275 1.313 1.350 g (falling) 1.080 1.110 1.140 f (falling) 1.020 1.050 1.080 e (falling) 0.810 0.833 0.855 d (falling) 0.765 0.788 0.810 reset threshold tempco 20 ppm/c reset threshold hysteresis v hyst referenced to v th typical 0.5 % v cc_ to rst output delay t rd v cc 1 = (v th 1 + 100mv) to (v th 1 - 100mv) or v cc 2 = (v th 2 + 75mv) to (v th 2 - 75mv) 45 s reset timeout period t rp d1 1.1 1.65 2.2 ms d2 8.8 13.2 17.6 d3 140 210 280 d5 280 420 560 d6 560 840 1120 d4 1120 1680 2240 adjustable reset comparator input (max6734/max6735) rstin input threshold v rstin 611 626.5 642 mv rstin input current i rstin -25 +25 na rstin hysteresis 3 mv rstin to reset output delay t rstind v rstin to (v rstin - 30mv) 22 s manual reset input (max6730/max6731/max6734/max6735) mr input threshold v il 0.3 x v cc 1 v v ih 0.7 x v cc 1 mr minimum pulse width 1 s mr glitch rejection 100 ns mr to reset output delay t mr 200 ns mr pullup resistance 25 50 80 k? max6730Cmax6735 single/dual/triple-voltage p supervisory circuits with independent watchdog output www.maximintegrated.com maxim integrated 3 electrical characteristics (continued) downloaded from: http:///
(v cc 1 = v cc 2 = +0.8v to +5.5v, t a = -40c to +85c, unless otherwise noted. typical values are at t a = +25c.) (note 2) note 2: devices tested at t a = +25c. overtemperature limits are guaranteed by design and not production tested. note 3: parameter guaranteed by design. parameter symbol conditions min typ max units watchdog input watchdog timeout period t wd-l first watchdog period after reset timeout period 35 54 72 s t wd-s normal mode 1.12 1.68 2.24 wdi pulse width t wdi (note 3) 50 ns wdi input voltage v il 0.3 x v cc 1 v v ih 0.7 x v cc 1 wdi input current i wdi wdi = 0 or v cc 1 -1 +1 a reset/watchdog output rst / wdo output low voltage (push-pull or open drain) v ol v cc 1 or v cc 2 +0.8v, i sink = 1a, output asserted 0.3 v v cc 1 or v cc 2 +1.0v, i sink = 50a, output asserted 0.3 v cc 1 or v cc 2 +1.2v, i sink = 100a, output asserted 0.3 v cc 1 or v cc 2 +2.7v, i sink = 1.2ma, output asserted 0.3 v cc 1 or v cc 2 +4.5v, i sink = 3.2ma, output asserted 0.4 rst / wdo output high voltage (push-pull only) v oh v cc 1 +1.8v, i source = 200a, output not asserted 0.8 x v cc 1 v v cc 1 +2.7v, i source = 500a, output not asserted 0.8 x v cc 1 v cc 1 +4.5v, i source = 800a, output not asserted 0.8 x v cc 1 rst / wdo output open-drain leakage current output not asserted 0.5 a max6730Cmax6735 single/dual/triple-voltage p supervisory circuits with independent watchdog output www.maximintegrated.com maxim integrated 4 electrical characteristics (continued) downloaded from: http:///
(v cc 1 = +5v, v cc 2 = +3.3v, t a = +25c, unless otherwise noted.) 0 42 10 86 1614 12 18 -40 10 -15 35 60 85 supply current vs. temperature (v cc 1 = +3.3v, v cc 2 = +2.5v) max6730-35 toc02 temperature (c) supply current (a) total i cc 1 i cc 2 0 42 10 86 1614 12 18 -40 10 -15 35 60 85 supply current vs. temperature (v cc 1 = +2.5v, v cc 2 = +1.8v) max6730-35 toc03 temperature (c) supply current (a) total i cc 1 i cc 2 0 42 10 86 1614 12 18 -40 10 -15 35 60 85 supply current vs. temperature (v cc 1 = +1.8v, v cc 2 = +1.2v) max6730-35 toc04 temperature (c) supply current (a) total i cc 1 i cc 2 normalized threshold voltage vs. temperature max6730-35 toc05 temperature (c) normalized threshold voltage 60 35 10 -15 0.992 0.994 0.996 0.998 1.000 1.002 1.004 1.006 1.008 1.0100.990 -40 85 0 42 10 86 1614 12 18 -40 10 -15 35 60 85 supply current vs. temperature (v cc 1 = +5v, v cc 2 = +3.3v) max6730-35 toc01 temperature (c) supply current (a) total i cc 1 i cc 2 maxim integrated 5 www.maximintegrated.com max6730Cmax6735 single/dual/triple-voltage p supervisory circuits with independent watchdog output typical operating characteristics downloaded from: http:///
(v cc 1 = +5v, v cc 2 = +3.3v, t a = +25c, unless otherwise noted.) normalized timeout period vs. temperature max6730-35 toc06 temperature (c) normalized timeout period 60 35 10 -15 0.9995 1.0000 1.0005 1.0010 1.0015 1.0020 1.0025 1.0030 1.0035 1.00400.9990 -40 85 maximum v cc_ transient duration vs. reset threshold overdrive max6730-35 toc07 reset threshold overdrive (mv) maximum v cc_ transient duration (ms) 10 100 100 1000 10,000 10 1 1000 rst assertsabove this line mr to reset output delay max6730-35 toc08 40ns/div mr 2v/divrst 2v/div v cc_ to reset output delay vs. temperature (100mv overdrive) max6730-35 toc09 temperature (c) v cc_ to reset output delay (s) 60 35 -15 10 45 50 55 60 65 70 75 8040 -45 85 12 14 16 18 20 22 24 26 28 3010 rstin to reset output delay vs. temperature max6730-35 toc10 temperature (c) rstin to reset output delay (s) 60 35 -15 10 -45 85 maxim integrated 6 www.maximintegrated.com max6730Cmax6735 single/dual/triple-voltage p supervisory circuits with independent watchdog output typical operating characteristics (continued) downloaded from: http:///
pin name function max6730 max6731 max6732 max6733 max6734 max6735 1 1 1 rst active-low reset output. the max6730/max6732/max6734 provide an open-drain output. the max6731/max6733/max6735 provide a push-pull output. rst asserts low when any of the following conditions occur: v cc 1 or v cc 2 drops below its preset threshold, rstin drops below its reset threshold, or mr is driven low. open- drain versions require an external pullup resistor. 2 2 2 gnd ground 3 3 4 wdo active-low watchdog output. the max6730/max6732/max6734 provide an open-drain wdo output. the max6731/max6733/max6735 provide a push-pull wdo output. wdo asserts low when no low-to-high or high-to-low transition occurs on wdi within the watchdog timeout period (t wd ) or if an undervoltage lockout condition exists for v cc 1, v cc 2, or rstin. wdo deasserts without a timeout period when v cc 1, v cc 2, and rstin exceed their reset thresholds, or when the manual reset input is asserted. open-drain versions require an external pullup resistor. 4 5 mr active-low manual reset input. drive mr low to force a reset. rst remains asserted as long as mr is low and for the reset timeout period after mr releases high. mr has a 50k? pullup resistor to v cc 1; leave mr open or connect to v cc 1 if unused. 5 5 3 wdi watchdog input. if wdi remains high or low for longer than the watchdog timeout period, the internal watchdog timer expires and the watchdog output asserts low. the internal watchdog timer clears whenever rst asserts or a rising or falling edge on wdi is detected. the watchdog has an initial watchdog timeout period (35s min) after each reset event and a short timeout period (1.12s min) after the irst valid wdi transition. leaving wdi unconnected does not disable the watchdog timer function. 6 6 8 v cc 1 primary supply-voltage input. v cc 1 provides power to the device when it is greater than v cc 2. v cc 1 is the input to the primary reset threshold monitor. 4 6 v cc 2 secondary supply-voltage input. v cc 2 provides power to the device when it is greater than v cc 1. v cc 2 is the input to the secondary reset threshold monitor. 7 rstin undervoltage reset comparator input. rstin provides a high-impedance comparator input for the adjustable reset monitor. rst asserts low if the voltage at rstin drops below the 626mv internal reference voltage. connect a resistive voltage-divider to rstin to monitor voltages higher than 626mv. connect rstin to v cc 1 or v cc 2 if unused. gnd mr wdo 1 + 6 v cc 1 5 wdi rst max6730max6731 sot23-6 top view 2 3 4 gnd v cc 2 wdo 1 6 v cc 1 5 wdi rst max6732max6733 sot23-6 sot23-8 2 3 4 v cc 2 mr wdo 12 8 7 v cc 1 rstin gnd wdi rst 3 4 6 5 max6734max6735 + + pin conigurations max6730Cmax6735 single/dual/triple-voltage p supervisory circuits with independent watchdog output www.maximintegrated.com maxim integrated 7 pin description downloaded from: http:///
detailed description supply voltages the max6730Cmax6735 microprocessor (p) supervisors maintain system integrity by alerting the p to fault conditions. the max6730Cmax6735 monitor one to three supply voltages in p-based systems and assert an active-low reset output when any monitored supply voltage drops below its preset threshold. the output state remains valid for v cc 1 or v cc 2 greater than +0.8v. threshold levels the two-letter code in the reset voltage threshold suffix guide ( table 1 ) indicates the threshold level combinations for v cc 1 and v cc 2. reset output the max6730Cmax6735 feature an active-low reset out - put ( rst ). rst asserts when the voltage at either v cc 1 or v cc 2 falls below the voltage threshold level, v rstin drops below its threshold, or mr is driven low ( figure 1 ). rst remains low for the reset timeout period ( table 2 ) after v cc 1, v cc 2, and rstin increase above their respective thresholds and after mr releases high. whenever v cc 1, v cc 2, or rstin go below the reset threshold before the end of the reset timeout period, the internal timer restarts. the max6730/max6732/ max6734 provide an open- drain rst output, and the max6731/max6733/max6735 provide a push-pull rst output. table 1. reset voltage threshold suffix guide** table 2. reset timeout period suffix guide **standard versions are shown in bold and are available in a d3 timeout option only. standard versions require 2500-piece order increments and are typically held in sample stock. there is a 10,000-piece order increment on nonstandard versions. other threshold voltages may be available; contact factory for availability. part no. suffix v cc 1 nominal voltage threshold(v) v cc 2 nominal voltage threshold (v) lt 4.625 3.075 ms 4.375 2.925 mr 4.375 2.625 tz 3.075 2.313 sy 2.925 2.188 ry 2.625 2.188 tw 3.075 1.665 sv 2.925 1.575 rv 2.625 1.575 ti 3.075 1.388 sh 2.925 1.313 rh 2.625 1.313 tg 3.075 1.110 sf 2.925 1.050 rf 2.625 1.050 te 3.075 0.833 sd 2.925 0.788 rd 2.625 0.788 zw 2.313 1.665 yv 2.188 1.575 zi 2.313 1.388 yh 2.188 1.313 zg 2.313 1.110 yf 2.188 1.050 ze 2.313 0.833 yd 2.188 0.788 wi 1.665 1.388 vh 1.575 1.313 wg 1.665 1.110 vf 1.575 1.050 we 1.665 0.833 vd 1.575 0.788 timeout period suffix active timeout period min (ms) max (ms) d1 1.1 2.2 d2 8.8 17.6 d3 140 280 d5 280 560 d6 560 1120 d4 1120 2240 max6730Cmax6735 single/dual/triple-voltage p supervisory circuits with independent watchdog output www.maximintegrated.com maxim integrated 8 downloaded from: http:///
manual reset input many p-based products require manual reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. a logic low on mr asserts the reset output, clears the watchdog timer, and deasserts the watchdog output. reset remains asserted while mr is low and for the reset timeout period (t rp ) after mr returns high. an internal 50k pullup resistor allows mr to be left open if unused. drive mr with ttl or cmos-logic levels or with open-drain/collector outputs. connect a normally open momentary switch from mr to gnd to create a manual reset function; external debounce circuitry is not required. connect a 0.1f capacitor from mr to gnd to provide additional noise immunity when driving mr over long cables or if the device is used in a noisy environment. adjustable input voltage (rstin) the max6734/max6735 provide an additional high- impedance comparator input with a 626mv threshold to monitor a third supply voltage. to monitor a voltage higher than 626mv, connect a resistive-divider to the circuit as shown in figure 2 to establish an externally controlled threshold voltage, v ext_th . ext_th (r1 r2) v = 626mv r2 + figure 1. rst , wdo , and mr timing diagram figure 2. monitoring a third voltage t rp t rp v th v cc (min) v cc 1, v cc 2 rstin rst wdo mr max6734max6735 v ext_th gnd rstin r1r2 max6730Cmax6735 single/dual/triple-voltage p supervisory circuits with independent watchdog output www.maximintegrated.com maxim integrated 9 downloaded from: http:///
the rstin comparator derives power from v cc 1, and the input voltage must remain less than or equal to v cc 1. low leakage current at rstin allows the use of large- valued resistors, resulting in reduced power consumption of the system. watchdog the watchdog feature monitors p activity through the watchdog input (wdi). a rising or falling edge on wdi within the watchdog timeout period (t wd ) indicates normal p operation. wdo asserts low if wdi remains high or low for longer than the watchdog timeout period. leaving wdi unconnected does not disable the watchdog timer. the devices include a dual-mode watchdog timer to monitor p activity. the flexible timeout architecture provides a long-period initial watchdog mode, allowing complicated systems to complete lengthy boots, and a short-period normal watchdog mode, allowing the supervisor to provide quick alerts when processor activity fails. after each reset event (v cc power-up, brownout, or manual reset), there is a long initial watchdog period of 35s (min). the long watchdog period mode provides an extended time for the system to power up and fully initialize all p and system components before assuming responsibility for routine watchdog updates. the usual watchdog timeout period (1.12s min) begins after the initial watchdog timeout period (t wd-l ) expires or after the first transition on wdi ( figure 3 ). during normal operating mode, the supervisor asserts the wdo output if the p does not update the wdi with a valid transition (high to low or low to high) within the standard timeout period (t wd-s ) (1.12s min). connect mr to wdo to force a system reset in the event that no rising or falling edge is detected at wdi within the watchdog timeout period. wdo asserts low when no edge is detected by wdi, the rst output asserts low, the watchdog counter immediately clears, and wdo returns high. the watchdog counter restarts, using the long watchdog period, when the reset timeout period ends ( figure 4 ). ensuring a valid reset output down to v cc = 0v the max6730Cmax6735 guarantee proper operation down to v cc = +0.8v. in applications that require valid reset levels down to v cc = 0v, use a 100k pulldown resistor from rst to gnd. the resistor value used is not critical, but it must be large enough not to load the reset output when v cc is above the reset threshold. for most applications, 100k is adequate. note that this configuration does not work for the open-drain outputs of max6730/max6732/max6734. figure 3. watchdog input/output timing diagram ( mr and wdo not connected) t rp v th v cc (min) v cc 1, v cc 2 rstin rst wdo wdi < t wd-s < t wd-s > t wd-s t wd-s < t wd-s < t wd-s < t wd-l max6730Cmax6735 single/dual/triple-voltage p supervisory circuits with independent watchdog output www.maximintegrated.com maxim integrated 10 downloaded from: http:///
applications information interfacing to ps with bidirectional reset pins microprocessors with bidirectional reset pins can interface directly with the open-drain rst output options. however, conditions might occur in which the push-pull output ver - sions experience logic contention with the bidirectional reset pin of the p. connect a 10k resistor between rst and the ps reset i/o port to prevent logic conten - tion ( figure 5 ). falling v cc transients the devices p supervisors are relatively immune to short-duration falling v cc_ transients (glitches). small glitches on v cc_ are ignored by the max6730Cmax6735, preventing undesirable reset pulses to the p. the typical operating characteristics show maximum transient duration vs. reset threshold overdrive, for which reset figure 4. watchdog input/output timing diagram ( mr and wdo connected) figure 5. interfacing to ps with bidirectional reset i/o t rp > t wd-s t mr < t wd-s < t wd-l < t wd-l t rp v th v cc (min) v cc 1, v cc 2 rstin rst wdo wdi mr max6731max6733 max6735 v cc 1 v cc 1 v cc 2 v cc 2 reset to other system components gnd p rst gnd 10k ? reset max6730Cmax6735 single/dual/triple-voltage p supervisory circuits with independent watchdog output www.maximintegrated.com maxim integrated 11 downloaded from: http:///
pulses are not generated. the graph was produced using falling v cc_ pulses, starting above v th and ending below the reset threshold by the magnitude indicated (reset threshold overdrive). the graph shows the maximum pulse width that a falling v cc transient typically might have without causing a reset pulse to be issued. as the amplitude of the transient increases (i.e., goes further below the reset threshold), the maximum allowable pulse width decreases. a 0.1f bypass capacitor mounted close to v cc_ provides additional transient immunity. watchdog software considerations setting and resetting the watchdog input at different points in the program rather than pulsing the watchdog input high-low-high or low-high-low helps the watchdog timer closely monitor software execution. this technique avoids a stuck loop, in which the watchdog timer continues to be reset within the loop, preventing the watchdog from timing out. figure 6 shows an example flow diagram in which the i/o driving the watchdog input is set high at the beginning of the program, set low at the beginning of every subroutine or loop, and then set high again when the program returns to the beginning. if the program hangs in any subroutine, the i/o continually asserts low (or high), and the watchdog timer expires, issuing a reset or interrupt. figure 6. watchdog flow diagram start set wdi high program code return subroutine completed hang in subroutine subroutine or program loop set wdi low max6730C max6735 v ref reset timeout period reset output driver watchdog timer ref v cc 1 v ref / 2 gnd v cc 1 mr v cc 1 v cc 1 v cc 1 v cc 2 mrpullup v cc 1 v cc 2 rstin rst wdo wdi max6730Cmax6735 single/dual/triple-voltage p supervisory circuits with independent watchdog output www.maximintegrated.com maxim integrated 12 functional diagram downloaded from: http:///
package type package code outline no. land pattern no. 6 sot23 u6+1, u6-1 (max6733 only) 21-0058 90-0175 8 sot23 k8sn-1 (max6734 only), k8sn+1 21-0078 90-0176 *insert the threshold level suffixes for v cc 1 and v cc 2 (table 1) after ut or ka. for the max6730/max6731, insert only the v cc 1 threshold suffix after the ut. insert the reset timeout delay (table 2) after d to complete the part number. for example, the max6732utltd3+t provides a v cc 1 threshold of +4.625v, a v cc 2 threshold of +3.075v, and a 210ms reset timeout period. sample stock is generally held on standard versions only. standard versions have an order increment requirement of 2500 pieces. nonstandard versions have an order increment requirement of 10,000 pieces. contact factory for availability. +denotes lead(pb)-free packages and - denotes leaded packages. not all max6734ka_ _d_ options are available with leaded (-t) packages. see https://www.maximintegrated.com for available leaded options. some devices are available in both leaded and lead(pb)-free/ rohs compliant packaging. for top mark information, please go to https://www.maximinte - grated.com/en/design/packaging/topmark/ /v denotes an automotive qualified part. part* temp range pin-package max6730 ut_d_ +t -40c to +85c 6 sot23 max6731 ut_d_ +t -40c to +85c 6 sot23 max6732 ut_ _d_ +t -40c to +85c 6 sot23 max6733 ut_ _d_ -t -40c to +85c 6 sot23 max6734 ka_ _d_ -t -40c to +85c 8 sot23 max6734ka_ _ d_+t -40c to +85c 8 sot23 max6734ka_ _d_ /v+t -40c to +85c 8 sot23 max6735 ka_ _d_ +t -40c to +85c 8 sot23 ordering information max6730Cmax6735 single/dual/triple-voltage p supervisory circuits with independent watchdog output www.maximintegrated.com maxim integrated 13 part number voltage monitors rst output manual reset watchdog input watchdog output max6730 1 open drain open drain max6731 1 push-pull push-pull max6732 2 open drain open drain max6733 2 push-pull push-pull max6734 3 open drain open drain max6735 3 push-pull push-pull selector guide chip information process: bicmos package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. downloaded from: http:///
revision number revision date description pages changed 0 10/02 initial release. 1 12/02 released max6730/max6731. 1 2 1/03 released max6733. 1 3 3/04 updated typical operating circuit . 14 4 12/05 added lead-free notation to ordering information . 1 5 3/09 updated pin description and added package table . 7, 14 6 11/11 added automotive-qualiied part information 1 7 4/13 added package thermal characteristics and corrected power dissipation errors and package code for 8 sot23 2C4, 14 8 12/15 added lead-free part numbers to ordering information table, updated package information table, and removed standard versions table. 1, 13, 14 maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and speciications without n otice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. ? 2015 maxim integrated products, inc. 14 max6730Cmax6735 single/dual/triple-voltage p supervisory circuits with independent watchdog output revision history for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com. downloaded from: http:///

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