View SST12LF03-Q3DE_8485963.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

proprietary and confidential a microchip technology company ?2011 silicon storage technology, inc. ds75010b 09/11 data sheet www.microchip.com features ? input/output ports are matched to 50 ? internally and dc decoupled. ? packages available ? 20-contact uqfn ? 3mm x 3mm x 0.55mm ? all non-pb (lead-free) devices are rohs compliant transmitter chain: ? high gain: ? typically 28 db gain across 2.4?2.5 ghz over tempera- ture -20c to +85c for transmitter. ? high linear output power: ? meets 802.11g ofdm acpr requirement up to 21 dbm ? 3% added evm up to 19 dbm for 54 mbps 802.11g signal ? meets 802.11b acpr requirement up to 22 dbm ? high power-added efficiency/low operating cur- rent for 802.11b/g/n applications ? ~25% @ p out = 22 dbm for 802.11b/g ? low i ref power-up/down control ?i ref <2 ma ? low quiescent current ? ~55 ma i cq ? high-speed power-up/down ? turn on/off time (10%- 90%) <100 ns ? typical power-up/down delay with driver delay included <200 ns ? low shut-down current (~2 a) ? limited variation over temperature ? ~1 db power variation between -20c to +85c ? ~2 db gain variation between -20c to +85c ? temperature and load insensitive on-chip power detector ? >20 db dynamic range, temperature-stable, on-chip power detection receiver chain: ? lna on: ? typically 12 db gain ? 3.1 db noise figure ? >5db p1db bluetooth path: ? typically 2.5 db loss ? simultaneous bt/wlan rx mode: ? 8 db gain ? 3.1 db noise figure applications ? wlan (ieee 802.11b/g/n) ? home rf ? cordless phones ? 2.4 ghz ism wireless equipment ? zigbee? ? bluetooth? 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 the sst12lf03 is a fully integrated front-end module (fem) for wlan 802.11b/g/n and bluetooth? systems. the sst12lf03 rf modules includes a pa, a lna, and an antenna switch, making it ideal for wlan/bt embedded applications where small size and high performance are required. designed in compliance with ieee 802.11 b/g/n applications and based on gaas phemt/hbt technology, the sst12lf03 operates within the frequency range of 2.4- 2.5 ghz with a very low dc-current consumption. the transmitter chain has excellent linearity, typically 3% added evm up to 19 dbm output power for 54 mbps 802.11g operation, while meet- ing 802.11b spectrum mask at 22 dbm. the receiver chain provides a low noise amplifier and has options for simultaneous wlan and bluetooth operation.the sst12lf03 is offered in a 20-contact uqfn package. downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 2 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company product description the sst12lf03 is a 2.4 ghz front-end module (fem) designed in compliance with ieee 802.11b/g/n applications. it combines a high-performance power amplifier (pa), a low-noise amplifier, and an antenna switch. the single-pole, three-throw, antenna switch provides wlan transmit and receive capability as well as bluetooth ? connectivity. the receive path also allow for simultaneous wlan and bluetooth operation. the tx chain includes a high-efficiency pa based on the ingap/gaas hbt technology. this chain typ- ically provides 28 db gain with 25% power-added efficiency (pae) @ pout = 22 dbm for 802.11g and 802.11b operation. the tx chain has excellent linearity, typically 3% added evm at 19 dbm output power for 54 mbps 802.11g operation, while meeting 802.11g spectrum mask at 22 dbm. the sst12lf03 also features easy board-level usage along with high-speed power-up/down controls. ultra-low reference current (total i ref ~2 ma) makes the sst12lf03 controllable directly from the baseband chip. these features, coupled with low operating current, make the sst12lf03 ideal for the final stage power amplification in battery-powered 802.11b/g/n wlan transmitter applications. the sst12lf03 transmitter has a linear on-chip, single-ended power detector, which is temperature stable, load insensitive, and has a linear dynamic range greater than 20 db. the excellent on-chip power detector provides a reliable solution to board-level power control. in addition, the receiver path includes an lna, has the option for simultaneous wlan and bluetooth operation, and an optional low- loss lna bypass path. in wlan operating mode, the receiver provides typically 12 db gain and only 3.1 db noise figure and >5 db p1db. operating with simultaneous wlan/bt, the receiver will provide both the wlan and bluetooth ports with 8 db gain and 3.1 db noise figure. all input/output rf ports are single-ended, dc blocked, and internally matched to 50 ? ? no external dc-blocking capacitors or matching components are necessary. this helps reduce the system board bill of materials (bom) cost. the sst12lf03 is off ered in a 20-contact uqfn package. see figure 2 for pin assignments and table 1 for pin descriptions. downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 3 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company functional blocks figure 1: functional block diagram 20 75010 b1.1 dnctx gnd rx bt dnc srx dnc stx sref vcc2len pen vcc1 det ant sbt sbtr cnd vcc3 19 18 17 16 6 7891 0 11 12 13 14 15 5 4 3 2 1 downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 4 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company pin assignments figure 2: pin assignments for 20-contact uqfn 20 75010 p1.0 dnctx gnd rx bt dnc srx dnc stx sref vcc2len pen vcc1 det ant sbt sbtr cnd vcc3 19 18 17 16 6 7891 0 11 12 13 14 15 5 4 3 2 1 3x3 uqfn downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 5 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company pin descriptions table 1: pin description symbol pin no. pin name type 1 1. i=input, o=output function dnc 1 do not connect do not connect to this pin srx 2 wlan receive antenna switch control dnc 3 do not connect do not connect to this pin stx 4 stx wlan transmit antenna switch control sref 5 c ref control pin reference high-level input ant 6 antenna i/o antenna port, ac coupled sbt 7 sbt bt antenna switch control sbtr 8 sbtr switch control for simultaneous bt/rx gnd 9 ground ground pin vcc3 10 v cc3 pwr lna power supply bt 11 bt port, ac coupled rx 12 r x i wlan receive port, ac coupled gnd 13 ground ground pin tx 14 t x o wlan transmit port, ac coupled dnc 15 do not connect do not connect to this pin det 16 wlan transmit power detector vcc1 17 v cc1 wlan power amplifier power supply #1 pen 18 wlan pa enable len 19 lna enable vcc2 20 v cc2 pwr wlan power amplifier power supply #2 center gnd ground ground pin t1.0 75010 downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 6 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company electrical specifications the dc and rf specifications for the power amplifier are specified below. refer to table 3 for the dc voltage and current specifications. refer to figures 3 through 9 for the rf performance. absolute maximum stress ratings (applied conditions greater than those listed under ?absolute maximum stress ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied. exposure to absolute maximum stress rating con- ditions may affect device reliability.) input power to pin 3 (p in )..................................................... +5dbm average output power from pin 11 (p out ) 1 ...................................... +26dbm 1. never measure with cw source. pulsed single-tone source with <50% duty cycle is recommended. exceeding the max- imum rating of average output power could cause permanent damage to the device. supply voltage at pins 6 and 9 (v cc ) ...................................... -0.3v to +4.2v reference voltage to pin 4 (v ref )......................................... -0.3v to +3.3v dc supply current (i cc ) 2 ..................................................... 400ma 2. measured with 100% duty cycle 54 mbps 802.11g ofdm signal operating temperature (t a ) ............................................ -40oc to +85oc storage temperature (t stg )........................................... -40oc to +120oc maximum junction temperature (t j ) ........................................... +150oc surface mount solder reflow temperature ........................... 260c for 10 seconds table 2: operating range range ambient temp v cc extended -20c to +85c 3.3v table 3: dc electrical characteristics symbol parameter min. typ max. unit v cc tx supply voltage at pins 6 and 9 3.0 3.3 4.2 v i cq tx idle current for 802.11g to meet evm ~3% @ 19 dbm 55 ma v reg tx reference voltage 2.75 2.80 2.95 v pen pa enabled; pa off 2.0 v i cc tx supply current for 11g ofdm 54 mbps signal, p out = 22 dbm 175 ma for 11b dsss 1 mbps signal, p out = 22 dbm 185 ma v dd lna supply voltage at pin 10 3.0 3.3 4.2 v i dd lna supply current 15 ma v cntl control voltage logic high, srx, stx, sbt, len 2.8 3.3 v cc v control voltage logic low 0 1.5 v t3.1 75010 downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 7 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company table 4: tx chain wlan rf characteristics symbol parameter min. typ max. unit test condition f l-u frequency range 2412 2484 mhz g small signal gain 26 29 db tx and pa on g var1 gain variation over band (2412?2484 mhz) 0.5 db tx and pa on g var2 gain ripple over channel (20 mhz) 0.2 db tx and pa on p out output power meets 11g ofdm 6 mbps spectrum mask 20 22 dbm tx and pa on output power meets 11b dsss 1 mbps spectrum mask 20 22 dbm tx and pa on addedevm @ 19 dbm output power with 11g ofdm 54 mbps signal 3 % tx and pa on 2f, 3f, 4f, 5f harmonics at 22 dbm, without external filters -35 dbc tx and pa on iso1 isolation (tx to rx) -12 db tx and pa on iso2 isolation (tx to bt) -10 db tx and pa on iso3 isolation (rx to tx) -30 db tx and pa on iso4 isolation (bt to tx) -50 db tx and pa on t4.0 75010 table 5: rx chain wlan rf characteristics symbol parameter min. typ max. unit test condition f l-u frequency range 2412 2484 mhz g on gain with lna on 10 12 db len=srx=high pen=stx=sbt=sbtr=low p1db receiver 1 db compression 5 dbm len=srx=high pen=stx=sbt=sbtr=low g ons gain with lna on and simultaneous bt 7 8 db len=srx=high pen=stx=sbt=low il s insertion loss with lna bypassed to bt and rx simultaneous 4.8 db sbt=sbtr=high pen=stx=srx=len=low nf on noise figure with lna on 3.1 db len=srx=high pen=stx=sbt=sbtr=low nf ons noise figure with lna on and simul- taneous bt 3.1 db len=srx=high pen=stx=sbt=low i dd receiver supply current with lna on 15 ma len=high iso bt-rx isolation bt to rx 17 db len=srx=high pen=stx=sbt=sbtr=low iso bt-tx isolation tx to rx with tx on 25 db len=srx=high pen=stx=sbt=sbtr=low rl ant receiver input return loss at the antenna with lna on 12 db len=srx=high pen=stx=sbt=sbtr=low rl rx receiver output return loss with wlan only 12 db len=srx=high pen=stx=sbt=sbtr=low rx rxs receiver output return loss with simultaneous wlan/bt 10 db len=srx=high pen=stx=sbt=low t5.0 75010 downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 8 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company table 6: bluetooth chain rf characteristics symbol parameter min. typ max. unit test condition f l-u frequency range 2412 2484 mhz il loss: antenna to bt 2.5 db sbt=high len=pen=stx=srx=sbtr=low g ons gain with lna on and simultaneous bt 7 8 db len=srx=sbtr=high pen=stx=sbt=low nf ons noise figure with lna on and simul- taneous bt 3.1 db len=srx=sbtr=high pen=stx=sbt=low rl ant receiver input return loss at the antenna with lna on 12 db sbt=high pen=stx=sbtr=len=srx=low bt rx receiver output return loss 12 db sbt=high pen=stx=sbtr=len=srx=low rx rxs receiver output return loss with simultaneous wlan/bt 8 db sbt=sbtr=high pen=stx=len=srx=low t6.0 75010 table 7: switch control logic mode stx srx sbt sbtr pen len all off (not supported) llllll bluetooth on l l h l l h wlan tx on h l l l h l wlan rx on l h l l l h simultaneous wlan/bt rx on l h l h l h t7.0 75010 downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 9 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company typical wlan transmitter performance characteristics test conditions: v cc = 3.3v, pen=2.80v, stx=high, srx=sbt=sbtr=low, t a = 25c, unless otherwise specified figure 3: s-parameters for wlan transmitter s11 versus frequency -30 -25 -20 -15 -10 -5 0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 frequency (ghz) s11 (db) frequency (ghz) s21 (db) s22 (db) frequency (ghz) s12 (db) frequency (ghz) 75010 s-parms.1.0 s12 versus frequency -80 -70 -60 -50 -40 -30 -20 -10 0 s21 versus frequency -40 -30 -20 -10 0 10 20 30 40 s22 versus frequency -30 -25 -20 -15 -10 -5 0 8.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 10 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company typical wlan transmitter performance characteristics test conditions: v cc = 3.3v, pen=2.80v, stx=high, srx=sbt=sbt=low, t a = 25c, 54 mbps 802.11g ofdm signal equalizer training setting using channel estimation sequence and data figure 4: wlan tx evm with 802.11g ofdm 54 mbps 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 evm (%) output power (dbm) evm versus output power freq=2.412 ghz freq=2.442 ghz freq=2.472 ghz downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 11 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company figure 5: wlan tx gain with 802.11g ofdm 54 mbps figure 6: wlan tx supply current with 802.11g ofdm 54 mbps 75010 f8.0 20 22 24 26 28 30 32 34 36 38 40 0 1 2 3 4 5 6 7 8 9 10111213141516171819202122232425 gain (db) output power (dbm) gain versus output power freq=2.412 ghz freq=2.442 ghz freq=2.472 ghz 75010 f6.0 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 0 1 2 3 4 5 6 7 8 9 10111213141516171819202122232425 supply current (ma) output power (dbm) supply current versus output power freq=2.412 ghz freq=2.442 ghz freq=2.472 ghz downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 12 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company figure 7: wlan tx detector voltage with 802.11g ofdm 54 mbps 75010 f7.0 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 1.10 1.20 0 1 2 3 4 5 6 7 8 9 10111213141516171819202122232425 detector voltage (v) output power (dbm) detector voltage versus output power freq=2.412 ghz freq=2.442 ghz freq=2.472 ghz downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 13 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company typical wlan receiver performance characteristics test conditions: v dd = 3.3v, srx=len=high, stx = sbt=sbtr=low, t a = 25c, unless otherwise specified figure 8: wlan receiver gain s11 versus frequency -30 -25 -20 -15 -10 -5 0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 frequency (ghz) s11 (db) frequency (ghz) s21 (db) s22 (db) frequency (ghz) s12 (db) frequency (ghz) 75010 s-parms.2.0 s12 versus frequency -80 -70 -60 -50 -40 -30 -20 -10 0 s21 versus frequency -40 -30 -20 -10 0 10 20 30 40 s22 versus frequency -30 -25 -20 -15 -10 -5 0 8.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 14 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company figure 9: wlan rx noise figure 75010 f12.0 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 2.40 2.41 2.42 2.43 2.44 2.45 2.46 2.47 2.48 2.49 2.50 noise figure (db) frequency (ghz) noise figure versus frequency downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 15 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company figure 10: typical schematic for high-efficiency 802.11b/g/n applications 75010 schematic 1.0 12lf03 crx ctx 50 tx cbtb len det 20 19 18 17 16 6 7891 0 11 12 13 14 15 5 4 3 2 1 vcc 3.6 nh 4.7 f cref 50 ant vcc cbtr 50 bt 50 rx pen downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 16 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company product ordering information valid combinations for sst12lf03 sst12lf03 -q3de sst12lf03 evaluation kits sst12lf03 -q3de-k note: valid combinations are those products in mass production or will be in mass production. consult your sst sales representative to confirm availability of valid combinations and to determine availability of new combi- nations. sst 12 lf 03 - q3de xx xx xx - xxxx environmental attribute e 1 = non-pb contact (lead) finish package modifier d = 20contact package type q3 = uqfn product family identifier product type f = front-end module voltage l = 3.0-3.6v frequency of operation 2 = 2.4 ghz product line 1 = rf product 1. environmental suffix ?e? denotes non-pb solder. sst non-pb solder devices are ?rohs compliant?. downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 17 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company packaging diagrams figure 11: 20-contact ultra-thin qual flat no-lead (uqfn) sst package code: q3d note: 1. complies with jedec jep95 mo-248e, variant ueee except external paddle nominal dimensions, shape of terminals at the body edge and shape of inboard terminals near the corners. 2. from the bottom view, the pin #1 indicator may be either a 45-degree chamfer or a half-circle notch. 3. the external paddle is electrically connected to the die back-side and to v ss . this paddle must be soldered to the pc board; it is required to connect this paddle to the v ss of the unit. connection of this paddle to any other voltage potential result in shorts and electrical malfunction of the device. 4. untoleranced dimensions are nominal target dimensions. 5. all linear dimensions are in millimeters (max/min). 20-uqfn-3x3-q3d-1.0 1.7 0.4 bsc see notes 2 and 3 pin #1 0.250.15 0.075 1.7 0.15 0.05 max 0.450.35 0.600.50 top view bottom view side view 1mm 3.00 0.075 3.00 0.075 0.15 0.06 pin #1 (engraved indicator) downloaded from: http:///
proprietary and confidential ?2011 silicon storage technology, inc. ds75010b 09/11 18 2.4 ghz high-gain, high-efficiency front-end module sst12lf03 data sheet a microchip technology company table 8: revision history revision description date a ? initial release of data sheet jun 2011 b ? various updates in features and product description ? updated pin names in figure 1 on page 3, figure 2 on page 4, and table 1 on page 5 ? revised values in table 3 on page 6, table 5 on page 7, table 6 on page 8, and table 7 on page 8 ? minor change in ?product ordering information? on page 16 sep 2011 ? 2011 silicon storage technology, inc?a microchip technology company. all rights reserved. sst, silicon storage technology, the sst logo, superflash, mtp, and flashflex are registered trademarks of silicon storage tech- nology, inc. mpf, sqi, serial quad i/o, and z-scale are trademarks of silicon storage technology, inc. all other trademarks and registered trademarks mentioned herein are the property of their respective owners. specifications are subject to change without notice. refer to www.microchip.com for the most recent documentation. for the most current package drawings, please see the packaging specification located at http://www.microchip.com/packaging. memory sizes denote raw storage capacity; actual usable capacity may be less. sst makes no warranty for the use of its products other than those expressly contained in the standard terms and conditions of sale. for sales office locations and information, please see www.microchip.com. silicon storage technology, inc. a microchip technology company www.microchip.com isbn: 978-1-61341-643-3 downloaded from: http:///

▲Up To Search▲

Price & Availability of SST12LF03-Q3DE

	To Download SST12LF03-Q3DE Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .