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preliminary data sheet september 2001 l9500a high-voltage ringing slic for voip applications l9500a introduction the agere systems inc. l9500a is a subscriber line interface circuit that is optimized for short-loop, power-sensitive applications. this device provides the complete set of line interface functionality (includ- ing power ringing) needed to interface to a subscriber loop. this device has the capability to operate with a v cc supply of 3.3 v or 5 v and is designed to mini- mize external components required at all device interfaces. this device is optimized to interface to data over cable service interface specification (doc- sis) compliant cable modem gateway, multi-media adaptor, and residential gateway products, such as the broadcom ? bcm3351, bcm3352, bcm6352, and bcm1101 and equivalent products. features n differential ringing and codec interface n onboard ringing generation n three ringing input options: sine wave pwm logic level square wave n flexible v cc options: 5 v or 3.3 v v cc no C5 v required n battery switch to minimize off-hook power n eight operating states: scan mode for minimal power dissipation forward and reverse battery active on-hook transmission states ground start ring mode disconnect mode n ultralow on-hook power: 27 mw scan mode 38 mw active mode n loop start, ring trip, and ground start detection n software-controllable dual current limit option n 28-pin plcc package n 48-pin mlcc package applications n interface to broadcom : bcm3351 cable modem bcm3352 cable modem bcm6352 integrated multi-media adaptor bcm1101 residential gateway n cable modem n voice over internet protocol (voip) n voice over dsl n remote subscriber units n broadband wireless n short loop access description this device is optimized to provide battery feed, ring- ing, and supervision on short-loop plain old tele- phone service (pots) loops. this device provides power ring to the subscriber loop through amplification of a low-voltage input. it provides forward and reverse battery feed states, on- hook transmission, a low-power scan state, ground start (tip open), and a forward disconnect state. the device requires a v cc and battery to operate. v cc may be either a 5 v or a 3.3 v supply. the ring- ing signal is derived from the high-voltage battery. a battery switch is included to allow for use of a lower- voltage battery in the off-hook mode, thus minimizing short-loop off-hook power. ring mode overhead is collapsed, allowing rail-to-rail operation. in this manner, the l9500 can operate from a lower 75 v battery to minimize critical power consumption and at the same time extend subscriber ringing loop lengths to 500 w and beyond. loop closure, ring trip, and ground start detection is available. the loop closure detector has a fixed threshold with hysteresis. the ring trip detector requires a single-pole filter, thus minimizing external components required. the dc current limit is set and fixed by a logic-control- lable pin. ground or open applied to this pin sets the current limit at the low or high value. the device is offered with differential ringing and receive input, making it ideal for direct interface to docsis compliant cable modem gateway products.
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a 2 agere systems inc. table of contents contents page l9500a introduction ............................................................................................................ ......................................1 features....................................................................................................................... ...........................................1 applications................................................................................................................... ..........................................1 description .................................................................................................................... ..........................................1 features ....................................................................................................................... .............................................4 description.................................................................................................................... .............................................4 architecture diagram........................................................................................................... ......................................6 pin information ................................................................................................................ ..........................................7 operating states............................................................................................................... .........................................9 state definitions .............................................................................................................. ........................................10 forward active ................................................................................................................. .....................................10 reverse active................................................................................................................. .....................................10 scan........................................................................................................................... ...........................................10 on-hook transmissionforward battery ........................................................................................... .................10 on-hook transmissionreverse battery........................................................................................... .................10 disconnect ..................................................................................................................... .......................................10 ring........................................................................................................................... ............................................10 ground start ................................................................................................................... ......................................10 thermal shutdown ............................................................................................................... .................................10 absolute maximum ratings (@ t a = 25 c) ............................................................................................................11 electrical characteristics ..................................................................................................... ....................................12 test configurations ............................................................................................................ .....................................19 applications ................................................................................................................... ..........................................21 power control .................................................................................................................. .....................................21 dc loop current limit.......................................................................................................... ..................................22 overhead voltage ............................................................................................................... ..................................22 active mode .................................................................................................................... ...................................22 scan mode ...................................................................................................................... ...................................22 on-hook transmission mode...................................................................................................... .......................22 ring mode ...................................................................................................................... ....................................22 loop range ..................................................................................................................... .....................................22 battery reversal rate.......................................................................................................... .................................23 supervision .................................................................................................................... .......................................23 loop closure................................................................................................................... ......................................23 ring trip ...................................................................................................................... .........................................23 ground start ................................................................................................................... ......................................23 power ring ..................................................................................................................... ......................................24 sine wave input signal and sine wave power ring signal output .................................................................. 24 ac applications ................................................................................................................ ........................................25 ac parameters.................................................................................................................. .....................................25 design examples ................................................................................................................ ..................................26 first-generation codec ac interface networkresistive termination.............................................................. 26 broadcom 3352 interface network........................................................................................................ .............26 outline diagrams............................................................................................................... ......................................28 28-pin plcc .................................................................................................................... .....................................28 48-pin mlcc .................................................................................................................... ....................................29 48-pin mlcc, jedec mo-220 vkkd-2............................................................................................... ................30 ordering information .......................................................................................................... .....................................31
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a agere systems inc. 3 table of contents figures page figure 1. architecture diagram ................................................................................................ ................................6 figure 2. 28-pin plcc diagram ................................................................................................. ..............................7 figure 3. 48-pin mlf diagram .................................................................................................. ...............................7 figure 4. basic test circuit .................................................................................................. ..................................19 figure 5. metallic psrr ....................................................................................................... ..................................20 figure 6. longitudinal psrr ................................................................................................... ...............................20 figure 7. longitudinal balance ................................................................................................ ...............................20 figure 8. ac gains ............................................................................................................ ......................................20 figure 9. ringing waveform crest factor = 1.6 ................................................................................. ....................24 figure 10. ringing waveform crest factor = 1.2 ................................................................................ ...................24 figure 11. ring in operation .................................................................................................................... ..............25 figure 12. reference schematic with broadcom bcm embedded codec devices and agere l9500 slic .................................................................................................................... .......................26 tables page table 1. pin descriptions .................................................................................................... ....................................8 table 2. control states ........................................................................................................ .....................................9 table 3. supervision coding .................................................................................................... .................................9 table 4. recommended operating characteristics ............................................................................... ...............11 table 5. thermal characteristics ............................................................................................... .............................11 table 6. environmental ......................................................................................................... ..................................12 table 7. 5 v supply currents ................................................................................................... ...............................12 table 8. 5 v powering .......................................................................................................... ...................................12 table 9. 3.3 v supply currents ................................................................................................ ..............................13 table 10. 3.3 v powering ...................................................................................................... .................................13 table 11. 2-wire port ......................................................................................................... ....................................14 table 12. analog pin characteristics ......................................................................................... ...........................15 table 13. ac feed characteristics ............................................................................................ ............................16 table 14. logic inputs and outputs (v cc = 5 v) ...................................................................................................17 table 15. logic inputs and outputs (v cc = 3.3 v) ................................................................................................17 table 16. ground start ........................................................................................................ ...................................17 table 17. ringing specifications .............................................................................................. ..............................18 table 18. ring trip ........................................................................................................... ......................................18 table 19. typical active mode on- to off-hook tip/ring current-limit transient response ............................... 22 table 20. fb1 and fb2 values vs. typical ramp time ............................................................................ ............23 table 21. parts list l9500; agere l9500 and broadcom bcm3352 (per broadcom bcm93552sv application boardslic daughter boad components); fully programmable ........................................................ 27
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a 4 agere systems inc. features n on board balanced ringing generation: no ring relay no bulk ring generator required 15 hz to 70 hz ring frequency supported sine wave input-sine wave output pwm input-sine wave output square wave input-trapezoidal output n power supplies requirements: v cc talk battery and ringing battery required no C5 v supply required no high-voltage positive supply required n flexible vcc options: 5 v or 3.3 v v cc operation 5 v or 3.3 v v cc interchangeable and transparent to users n battery switch via logic control: minimize off-hook power dissipation n minimal external components required n eight operating states: forward active, v bat2 applied polarity reversal active, v bat2 applied on-hook transmission, v bat1 applied on-hook transmission polarity reversal, v bat1 applied ground start scan forward disconnect ring mode n unlatched parallel data control interface n ultralow slic power: scan 38 mw (v cc = 5 v) forward/reverse active 54 mw (v cc = 5 v) scan 27 mw (v cc = 3.3 v) forward/reverse active 41 mw (v cc = 3.3 v) n supervision: loop start, fixed threshold with hysteresis ring trip, single-pole ring trip filtering, fixed thresh- old as a function of battery voltage ground start fixed threshold with hysteresis n adjustable current limit: 25 ma or 40 ma via ground or open to control input n overhead voltage: clamped typically <51 v differentially clamped maximum <56.5 v single-ended n thermal shutdown protection with hysteresis n device interfaces: differential receive interface singled-ended transmit interface differential ring input n package options: 28-pin plcc 48-pin mlcc n 90 v cbic-s technology description the l9500 is designed to provide battery feed, ringing, and supervision functions on short plain old telephone service (pots) loops. this device is designed for ultralow power in all operating states. the l9500 offers 8 operating states. the device assumes use of a lower-voltage talk battery, a higher- voltage ringing battery, and a v cc supply. the l9500 requires only a positive v cc supply. no C5 v supply is needed. the l9500 can operate with a v cc of either 5 v or 3.3 v, allowing for greater user flex- ibility. the choice of v cc voltage is transparent to the user; the device will function with either supply voltage connected. two batteries are used: 1. a high-voltage ring battery (v bat1 ). v bat1 is a maximum C75 v. v bat1 is used for power ring signal amplification and for scan, on-hook transmission, and ground start modes. this supply is current limited to approximately the maximum power ringing current, typically 50 ma. 2. a lower-voltage talk battery (v bat2 ). v bat2 is used for active mode powering.
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a agere systems inc. 5 description (continued) forward and reverse battery active modes are used for off-hook conditions. since this device is designed for short-loop applications, the lower-voltage v bat2 is applied during the forward and reverse active states . battery reversal is quiet, without breaking the ac path. rate of battery reversal may be ramped to control switching time. the magnitude of the overhead voltage in the forward and reverse active modes has a typical default value of 7.0 v, allowing for an on-hook transmission of an undis- torted signal of 3.14 dbm into 900 w . additionally, this allows sufficient overhead for 500 mv of meter pulse if desired. this overhead is fixed. the ring trip detector is turned off during active modes to conserve power. because on-hook transmission is not allowed in the scan mode, an on-hook transmission mode is defined. this mode is functionally similar to the active mode, except the tip ring voltage is derived from the higher v bat1 rather than v bat2 . in the on-hook transmission modes with a primary bat- tery whose magnitude is greater than a nominal 51 v, the magnitude of the tip-to-ground and ring-to- ground voltage is clamped at less than 56.5 v. to minimize on-hook power, a low-power scan mode is available. in this mode, all functions except off-hook supervision are turned off to conserve power. on-hook transmission is not allowed in the scan mode. in the scan mode with a primary battery whose magni- tude is greater than a nominal 51 v, the magnitude of the tip-to-ground and ring-to-ground voltage is clamped at less than 56.5 v. a forward disconnect mode is provided, where all cir- cuits are turned off and power is denied to the loop. the device offers a ring mode, in which a power ring signal is provided to the tip/ring pair. during the ring mode, a user-supplied, low-voltage ring signal is differ- entially input to the devices ring in input. this signal is amplified to produce the power ring signal. this signal may be a sine wave or filtered square wave to produce a sine wave on trapezoidal output. ring trip detector and common-mode current detector are active during the ring mode. with maximum v bat1 and a sine wave input, the l9500 has sufficient power to ring a 5 ren (1386 w + 40 m f) ringing load into 500 w of physical resistance. this feature eliminates the need for a separate external ring relay, associated external circuitry, and a bulk ring- ing generator. see the applications section of this data sheet for more information. both the ring trip and loop closure supervision func- tions are included. the loop closure has a fixed typical 10.5 ma on- to off-hook threshold in the active mode and a fixed 11.5 ma on- to off-hook threshold from the scan mode. in either case, there is a 2 ma hysteresis. the ring trip detector requires only a single-pole filter at the input, minimizing external components. the ring trip threshold at a given battery voltage is fixed. typical ring trip threshold is 42.5 ma for a C70 v v bat1. the device offers a ground start mode. in this mode the tip drive amplifier is turned off. the device presents a high impedance (>100 k w ) to pt and a current limited battery (v bat1 ) to pr. v bat1 is clamped to less than 56.5 v in this mode at pr. the nstat loop current detctor is used for ring ground detection. in the ground start mode, since the loop current is common mode, the loop closure threshold is reduced in half, thus main- taining loop supervision at specified levels. upon reaching the thermal shutdown temperature, the device will enter an all off mode. upon cooling, the device will re-enter the state it was in prior to thermal shutdown. hysteresis is built in to prevent oscillation. data control is via a parallel unlatched control scheme. the dc current limit is fixed to either 25 ma or 40 ma depending if ground or open is applied to the v prog current limit programming pin. programming accuracy is 8%. circuitry is added to the l9500 to minimize the inrush of current from the v cc supply and to the battery supply during an on- to off-hook transition, thus saving in power supply design cost. see the applications section of this data sheet for more information. the l9500 uses a voltage feed-current sense architec- ture; thus the transmit gain is a transconductance. the l9500 transconductance is set via a single external resistor, and this device is designed for optimal perfor- mance with a transconductance set at 300 v/a. this interface is single ended. the l9500 offers a differen- tial receive interface with a gain of 8. the l9500 is internally referenced to 1.5 v. this refer- ence voltage is output at the v ref output of the device. the slic output vitr is also referenced to 1.5 v. the slic inputs rcvp/rcvn are floating inputs. the l9500 is packaged in a 28-pin plcc or a 48-pin mlcc package.
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a 6 agere systems inc. architecture diagram 12-3530.f (f) figure 1. architecture diagram v ref vitr txi itr vtx pr pt cf2 cf1 fb2 fb1 power agnd v cc bgnd v bat2 v bat1 v prog nstat rtflt dcout 1.5 v band-gap reference aac b = 20 out (itr/306) tip/ring current sense +1 rft 18 w rfr 18 w v reg C1 v reg ringing 35x parallel data interface ring inn b0 b1 b2 x1 x1 rcvn rcvp current limit and inrush control ring loop rectifier vitr trip closure v ref C + + C + C C + gain ax ac interface ring inp gain = 4
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a agere systems inc. 7 pin information 12-3558e figure 2. 28-pin plcc diagram 12-3361.b figure 3. 48-pin mlf diagram b0 b1 b2 pr pt fb1 ring inp cf2 cf1 rtflt 5 6 7 8 9 10 11 4212827 3 12 14 15 16 17 18 13 25 24 23 22 21 20 19 nstat v bat2 agnd v prog nc v bat1 v cc bgnd l9500 dcout ring inn v ref fb2 vtx txi vitr rcvp rcvn 26 itr 28-pin plcc pinout 1 3 4 6 7 8 9 10 11 12 2 48 46 45 44 43 42 41 40 38 37 47 13 16 17 18 19 20 21 22 23 24 14 36 33 32 31 30 29 28 27 26 25 35 b2 pt fb1 ring inp agnd ring inn pr rcvn nstat rcvp txi itr fb2 bgnd v ref v bat2 vitr 34 vtx 39 15 5 dcout cf2 cf1 rtflt v cc v bat1 v prog b1 b0 35 l9500 48-pin mlcc pinout nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc nc
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a 8 agere systems inc. pin information (continued) table 1. pin descriptions 28-pin plcc 48-pin mlcc symbol type name/function 143nstato loop closure detector outputring trip detector output. when low, this logic output indicates that an off-hook condition exists or ringing is tripped or a ring ground has occurred. 245vitro transmit ac output voltage. output of internal aac amplifier. this output is a voltage that is directly proportional to the differ- ential ac tip/ring current. 3 47 rcvp i receive ac signal input (noninverting). this high-impedance input controls to ac differential voltage on tip and ring. this node is a floating input. 4 48 rcvn i receive ac signal input (inverting). this high-impedance input controls to ac differential voltage on tip and ring. this node is a floating input. 5 1 ring inn i power ring signal input. couple to a sine wave or lower crest factor low-voltage ring signal. the input here is amplified to pro- vide the full power ring signal at tip and ring. this signal may be applied continuously, even during nonringing states. 6 2 ring inp i power ring signal input. couple to a sine wave or lower crest factor low-voltage ring signal. the input here is amplified to pro- vide the full power ring signal at tip and ring. this signal may be applied continuously, even during nonringing states. 7 6 dcout o dc output voltage. this output is a voltage that is directly pro- portional to the absolute value of the differential tip/ring current. this is used to set ring trip threshold. 88cf2 filter capacitor. connect a capacitor from this node to ground. 910cf1 filter capacitor. connect a capacitor from this node to cf2. 10 12 rtflt ring trip filter. connect this lead to dcout via a resistor and to agnd with a capacitor to filter the ring trip circuit to prevent spurious responses. a single-pole filter is needed. 11 13 v ref o slic internal reference voltage. output of internal 1.5 v ref- erence voltage. 12 15 agnd gnd analog signal ground. 13 16 v cc pwr analog power supply. user choice of 5 v or 3.3 v nominal power or supply. 14 19 v bat1 pwr battery supply 1. high-voltage battery. 15 21 v bat2 pwr battery supply 2. lower-voltage battery. 16 23 bgnd gnd battery ground. ground return for the battery supplies. 17 3, 4, 5, 7, 9, 11, 14, 17, 18, 20, 22, 27, 29, 30, 32, 36, 37, 40, 42, 44, 46 nc no connection. 18 24 v prog i current-limit program input. connect ground to this pin to set current limit to 25 ma; leave this pin open to set current limit to 40 ma.
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a agere systems inc. 9 pin information (continued) table 1. pin descriptions (continued) operating states table 2. control states table 3. supervision coding 28-pin plcc 48-pin mlcc symbol type name/function 19 25 fb2 polarity reversal slowdown capacitor. connect a capacitor from this node for controlling rate of battery reversal. if ramped bat- tery reversal is not desired, this pin is left open. 20 26 fb1 polarity reversal slowdown capacitor. connect a capacitor from this node for controlling rate of battery reversal. if ramped bat- tery reversal is not desired, this pin is left open. 21 28 pt i/o protected tip. the output drive of the tip amplifier and input to the loop sensing circuit. connect to loop through overvoltage and overcurrent protection. 22 31 pr i/o protected ring. the output drive of the ring amplifier and input to the loop sensing circuit. connect to loop through overvoltage and overcurrent protection. 23 33 b2 i u state control input. these pins have an internal 100 k w pull-up. 24 34 b1 i u state control input. these pins have an internal 100 k w pull-up. 25 35 b0 i u state control input. these pins have an internal 100 k w pull-up. 26 38 itr i transmit gain. input to ax amplifier. connect a 4.75 k w resistor from this node to vtx to set transmit gain. gain shaping for termi- nation impedance with a first generation codec is also achieved with a network from this node to vtx. 27 39 vtx o ac output voltage. output of internal ax amplifier. the voltage at this pin is directly proportional to the differential tip/ring current. 28 41 txi i ac/dc separation. input to internal aac amplifier. connect a 0.1 m f capacitor from this pin to vtx. b0 b1 b2 state 0 0 1 forward active 0 1 1 reverse active 0 0 0 on-hook transmission forward battery 0 1 0 on-hook transmission reverse battery 1 1 0 ground start 100scan 1 1 1 disconnectdevice will power up in this state 101ring nstat 0 = off-hook or ring trip or thermal shutdown or ring ground. 1 = on-hook and no ring trip and no thermal shutdown and no ring ground.
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a 10 agere systems inc. state definitions forward active n pin pt is positive with respect to pr. n v bat2 is applied to tip/ring drive amplifiers. n loop closure and common-mode detect are active. n ring trip detector is turned off to conserve power. n overhead is set to nominal 6.0 v for undistorted transmission of 3.14 dbm into 900 w . reverse active n pin pr is positive with respect to pt. n v bat2 is applied to tip/ring drive amplifiers. n loop closure and common-mode detect are active. n ring trip detector is turned off to conserve power. n overhead is set to nominal 6.0 v for undistorted transmission of 3.14 dbm into 900 w . scan n except for loop closure, all circuits (including ring trip and common-mode detector) are powered down. n on-hook transmission is disabled. n pin pt is positive with respect to pr, and v bat1 is applied to tip/ring. n the tip to ring on-hook differential voltage will be typ- ically between C44 v and C51 v with a C70 v primary battery. on-hook transmission forward battery n pin pt is positive with respect to pr. n v bat1 is applied to tip/ring drive amplifiers. n supervision circuits, loop closure, and common- mode detect are active. n ring trip detector is turned off to conserve power. n on-hook transmission is allowed. n the tip-to-ring on-hook differential voltage will be typ- ically between C41 v and C49 v with a C70 v primary battery. on-hook transmission reverse battery n pin pr is positive with respect to pt. n v bat1 is applied to tip/ring drive amplifiers. n supervision circuits, loop closure, and common- mode detect are active. n ring trip detector is turned off to conserve power. n on-hook transmission is allowed. n the tip-to-ring on-hook differential voltage will be typ- ically between C41 v and C49 v with a C70 v primary battery. disconnect n the tip/ring amplifiers and all supervision are turned off. n the slic goes into a high-impedance state. n nstat is forced high (on-hook). n device will power up in this state. ring n power ring signal is applied to tip and ring. n input waveform at ring in is amplified. n ring trip supervision and common-mode current supervision are active; loop closure is inactive. n overhead voltage is reduced to typically 4 v. n current is limited by saturation current of the amplifi- ers themselves, typically 100 ma at 125 c. ground start n tip drive amplifer is turned off. n device presents a high impedance (>100 k w ) to pin pt. n device presents a clamped (<56.5 v) current-limited battery (v bat1 ) to pr. n output pin rgdet indicates current flowing in the ring lead. thermal shutdown n not controlled via truth table inputs. n this mode is caused by excessive heating of the device, such as may be encountered in an extended power-cross situation. nstat output is forced low or off hook during a thermal shutdown event.
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a agere systems inc. 11 absolute maximum ratings (@ t a = 25 c) stresses in excess of the absolute maximum ratings can cause permanent damage to the device. these are abso- lute stress ratings only. functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. exposure to absolute maximum ratings for extended periods can adversely affect device reliability. note: the ic can be damaged unless all ground connections are applied before, and removed after, all other connections. furtherm ore, when powering the device, the user must guarantee that no external potential creates a voltage on any pin of the device that exceeds the device ratings. for example, inductance in a supply lead could resonate with the supply filter capacitor to cause a destructive overvolt- age. table 4. recommended operating characteristics table 5. thermal characteristics 1. this parameter is not tested in production. it is guaranteed by design and device characterization. 2. airflow, pcb board layers, and other factors can greatly affect this parameter. parameter symbol min max unit dc supply (v cc ) C0.5 7.0 v battery supply (v bat1 )C80v battery supply (v bat2 )v bat1 v logic input voltage C0.5 v cc + 0.5 v logic output voltage C0.5 v cc + 0.5 v operating temperature range C40 125 c storage temperature range C40 150 c relative humidity range 5 95 % pt or pr fault voltage (dc) v pt , v pr v bat C 5 3 v pt or pr fault voltage (10 x 1000 m s) v pt , v pr v bat C 15 15 v ground potential difference (bgnd to agnd) 1 v parameter min typ max unit 5 v dc supplies (v cc )5.05.25v 3 v dc supplies (v cc ) 3.13 3.3 v high office battery supply (v bat1 ) C60 C70 C75 v auxiliary office battery supply (v bat2 )C12 v bat1 v operating temperature range C40 25 85 c parameter min typ max unit thermal protection shutdown (t jc ) 150 165 c 28 plcc thermal resistance junction to ambient ( q ja ) 1, 2 : natural convection 2s2p board natural convection 2s0p board wind tunnel 100 linear feet per minute (lfpm) 2s2p board wind tunnel 100 linear feet per minute (lfpm) 2s0p board 35.5 50.5 31.5 42.5 c/w c/w c/w c/w 48 mlf thermal resistance junction to ambient ( q ja ) 1, 2 : 38 c/w
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a 12 agere systems inc. electrical characteristics table 6. environmental 1. not to exceed 26 grams of water per kilogram of dry air. table 7. 5 v supply currents v bat1 = C70 v, v bat2 = C21 v, v cc = 5 v. table 8. 5 v powering v bat1 = C70 v, v bat2 = C21 v, v cc = 5 v. parameter min typ max unit temperature range C40 85 c humidity range 1 595 1 %rh parameter min typ max unit supply currents (scan state; no loop current): i vcc i vbat1 i vbat2 4.30 0.24 3 4.80 0.35 6 ma ma m a supply currents (forward/reverse active; no loop current, with or without ppm, v bat2 applied): i vcc i vbat1 i vbat2 5.95 25 1.2 7.0 85 1.40 ma m a ma supply currents (on-hook transmission mode; no loop current, with or without ppm, v bat1 applied): i vcc i vbat1 i vbat2 6.0 1.5 1.5 7.0 1.9 6 ma ma m a supply currents (disconnect mode): i vcc i vbat1 i vbat2 2.7 15 3.5 3.75 110 25 ma m a m a supply currents (ground start mode, no loop current): i vcc i vbat1 i vbat2 4.0 0.24 2 ma ma m a supply currents (ring mode; no load): i vcc i vbat1 i vbat2 5.9 1.8 2 6.5 2.2 6 ma ma m a parameter min typ max unit power dissipation (scan state; no loop current) 38 46 mw power dissipation (forward/reverse active; no loop current, v bat2 applied) 57 64 mw power dissipation (on-hook transmission mode; no loop current, v bat1 applied) 135 165 mw power dissipation (disconnect mode) 14 23 mw power dissipation (ground start mode) 37 mw power dissipation (ring mode; no load) 156 184 mw
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a agere systems inc. 13 electrical characteristics (continued) table 9. 3.3 v supply currents v bat1 = C70 v, v bat2 = C21 v, v cc = 3.3 v. table 10. 3.3 v powering v bat1 = C70 v, v bat2 = C21 v, v cc = 3.3 v. parameter min typ max unit supply currents (scan state; no loop current): i vcc i vbat1 i vbat2 3.2 0.24 3 3.6 0.35 6 ma ma m a supply currents (forward/reverse active; no loop current, v bat2 applied): i vcc i vbat1 i vbat2 4.8 25 1.2 5.7 85 1.4 ma m a ma supply currents (on-hook transmission mode; no loop current, v bat1 applied): i vcc i vbat1 i vbat2 4.9 1.5 1.5 5.7 1.9 6 ma ma m a supply currents (disconnect mode): i vcc i vbat1 i vbat2 1.8 8 2 2.5 110 25 ma m a m a supply currents (ground start mode, no loop current): i vcc i vbat1 i vbat2 3.1 0.24 2 ma ma m a supply currents (ring mode; no load): i vcc i vbat1 i vbat2 4.70 1.8 2 5.4 2.2 6 ma ma m a parameter min typ max unit power dissipation (scan state; no loop current) 27 36.5 mw power dissipation (forward/reverse active; no loop current, v bat2 applied) 42 53 mw power dissipation (on-hook transmission mode; no loop current, v bat1 applied) 121 151 mw power dissipation (disconnect mode) 6.5 15 mw power dissipation (ground start mode) 27 mw power dissipation (ring mode; no loop current) 141 172 mw
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a 14 agere systems inc. electrical characteristics (continued) table 11. 2-wire port parameter min typ max unit tip or ring drive current = dc + longitudinal + signal currents 105 map tip or ring drive current = ringing + longitudinal 65 map signal current 10 marms longitudinal current capability per wire (longitudinal current is indepen- dent of dc loop current.) 8.5 15 marms ringing current (r load = 1386 w + 40 m f) 29 marms ringing current limit (r load = 100 w )50map dc loop currenti lim (v bat2 applied, r loop = 100 w ): v prog = 0 v prog = open 25 40 ma ma dc current variation 8 % dc feed resistance (does not include protection resistors) 50 w open loop voltages: scan mode: |v bat1 | > 51 v |v tip | C |v ring | pr to battery ground pt to battery ground oht mode: |v bat1 | > 51 v |v tip | C |v ring | pr to battery ground pt to battery ground active mode: |pt C pr| C |v bat2 | ring mode: |pt C pr| C |v bat1 | 44 41 5.75 51 49 6.25 4 56.5 56.5 56.5 56.5 7.75 v v v v v v v v
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a agere systems inc. 15 electrical characteristics (continued) table 11. 2-wire port (continued) table 12. analog pin characteristics parameter min typ max unit loop closure threshold: active/on-hook transmission modes scan mode 10.5 11.5 ma ma loop closure threshold hysteresis: v cc = 5 v v cc = 3.3 v 2 2 ma ma longitudinal to metallic balance at pt/pr test method: q552 (11/96) section 2.1.2 and ieee ? 455: 300 hz to 600 hz 600 hz to 3.4 khz 52 52 db db metallic to longitudinal (harm) balance: 200 hz to 1000 hz 100 hz to 4000 hz 40 40 db db psrr 500 hz3000 hz: v bat1 , v bat2 v cc (5 v operation) 45 35 db db parameter min typ max unit txi (input impedance) 100 k w output offset (vtx) output offset (vitr) output drive current (vtx) output drive current (vitr) output voltage swing: maximum (vtx, vitr) minimum (vtx) minimum (vitr) output short-circuit current output load resistance output load capacitance 300 10 agnd agnd + 0.25 agnd + 0.35 10 20 10 100 v cc v cc C 0.5 v cc C 0.4 50 mv mv m a m a v v v ma k w pf rcvn and rcvp: input voltage range (v cc = 5 v) input voltage range (v cc = 3.3 v) input bias current 0 0 0.05 v cc C 0.5 v cc C 0.3 v v m a differential pt/pr current sense (dcout): gain (pt/pr to dcout) offset voltage at i loop = 0 C10 67 10 v/a mv
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a 16 agere systems inc. electrical characteristics (continued) table 13. ac feed characteristics 1. set externally either by discrete external components or a third- or fourth-generation codec. any complex impedance r1 + r2 | | c between 150 w and 1400 w can be synthesized. 2. this parameter is not tested in production. it is guaranteed by design and device characterization. 3. vitr transconductance depends on the resistor from itr to vitr. this gain assumes an ideal 4750 w , the recommended value. positive cur- rent is defined as the differential current flowing from pt to pr. parameter min typ max unit ac termination impedance 1 150 600 1400 w total harmonic distortion (200 hz 4 khz) 2 : off-hook on-hook 0.3 1.0 % % transmit gain (f = 1004 hz, 1020 hz) 3 : pt/pr current to vitr 300 C 3% 300 300 + 3% v/a receive gain, f = 1004 hz, 1020 hz open loop rcvp or rcvn to ptpr 7.76 8 8.24 gain vs. frequency (transmit and receive) 2 600 w termination, 1004 hz, 1020 hz reference: 200 hz300 hz 300 hz3.4 khz 3.4 khz20 khz 20 khz266 khz C0.3 C0.05 C3.0 0 0 0 0.05 0.05 0.05 2.0 db db db db gain vs. level (transmit and receive) 2 0 dbv reference: C55 db to +3.0 db C0.05 0 0.05 db idle-channel noise (tip/ring) 600 w termination: psophometric c-message 3 khz flat C82 8 C77 13 20 dbmp dbrnc dbrn idle-channel noise (vtx) 600 w termination: psophometric c-message 3 khz flat C82 8 C77 13 20 dbmp dbrnc dbrn
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a agere systems inc. 17 electrical characteristics (continued) table 14. logic inputs and outputs (v cc = 5 v) table 15. logic inputs and outputs (v cc = 3.3 v) table 16. ground start parameter symbol min typ max unit input voltages: low level high level v il v ih C0.5 2.0 0.4 2.4 0.7 v cc v v input current: low level (v cc = 5.25 v, v i = 0.4 v) high level (v cc = 5.25 v, v i = 2.4 v) i il i ih 100 75 m a m a output voltages (open collector with internal pull-up resistor): low level (v cc = 4.75 v, i ol = 360 m a) high level (v cc = 4.75 v, i oh = C20 m a) v ol v oh 0 2.4 0.2 0.4 v cc v v parameter symbol min typ max unit input voltages: low level high level v il v ih C0.5 2.0 0.2 2.5 0.5 v cc v v input current: low level (v cc = 3.46 v, v i = 0.4 v) high level (v cc = 3.46 v, v i = 2.4 v) i il i ih 50 50 m a m a output voltages (open collector with internal 60 k w pull-up resistor): low level (v cc = 3.13 v, i ol = 360 m a) high level (v cc = 3.13 v, i oh = C5 m a) v ol v oh 0 2.2 0.2 0.5 v cc v v parameter min typ max unit tip open modetip input impedance 150 k w threshold 13 ma hysteresis: v cc = 5 v v cc = 3.3 v 2 2 ma ma
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a 18 agere systems inc. electrical characteristics (continued) table 17. ringing specifications table 18. ring trip ringing will not be tripped by the following loads: n 10 k w resistor in parallel with a 6 f capacitor applied across tip and ring. ring frequency = 17 hz to 23 hz. n 100 w resistor in series with a 2 f capacitor applied across tip and ring. ring frequency = 17 hz to 23 hz. parameter min typ max unit ring inn/p : input voltage swing input impedance 0 100 v cc v k w ring signal isolation: pt/pr to vtx ring mode 60 db ring signal isolation: ring in to pt/pr nonring mode 80 db ring signal distortion: 5 ren 1380 w , 40 f load, 100 w loop 3 % differential gain: ring inn/p to pt/prvring inn/p = 0.7 vp, v bat1 = C70 v, r load = 1400 w 115 128 140 parameter min typ max unit ring trip (nstat = 0): loop resistance (total) v bat1 applied 100 600 w ring trip (nstat = 1): loop resistance (total) v bat1 applied 10 k w trip time (f = 20 hz) 100 ms hysteresis 7 ma
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a agere systems inc. 19 test configurations figure 4. basic test circuit v bat2 v bat1 bgnd v cc agnd 0.1 m f 0.1 m f 0.1 m f rtflt dcout pr pt v prog v ref 0.1 m f 383 k w 30 w 30 w cf1 cf2 b0 b1 b2 0.1 m f ring inn ring inp vitr rcvp rcvn itr vtx txi v bat2 v bat1 v cc r loop 100 w /600 w tip ring fb2 fb1 0.1 m f l9500 nstat b0 b1 b2 4750 w 0.1 m f vitr rcv ring in ring in 60.4 k w 0.1 m f 26.7 k w 69.8 k w rcv basic test circuit
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a 20 agere systems inc. test configurations (continued) 12-2582.c (f) figure 5. metallic psrr 12-2583.b (f) figure 6. longitudinal psrr 12-2584.c (f) figure 7. longitudinal balance 12-2587.g (f) figure 8. ac gains v s 4.7 m f 100 w v bat or v cc disconnect v t/r v bat or v cc tip ring basic test circuit + C psrr = 20log v s v t/r 600 w bypass capacitor v s 4.7 m f 100 w v bat or v cc disconnect bypass capacitor 56.3 w v bat or v cc tip ring basic test circuit psrr = 20log v s v m 67.5 w 10 m f 10 m f 67.5 w v m + C tip ring basic test circuit longitudinal balance = 20log v s v m 368 w 100 m f 100 m f 368 w v m + C v s pt pr basic test circuit 600 w v t/r + C g xmt = v xmt v t/r g rcv = v t/r v rcv rcv v s vitr rcv
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a agere systems inc. 21 applications power control under normal device operating conditions, power dissi- pation on the device must be controlled to prevent the device temperature from rising above the thermal shut- down and causing the device to shut down. power dis- sipation is highest with higher battery voltages, higher current limit, and under shorter dc loop conditions. additionally, higher ambient temperature will also reduce thermal margin. to support required power ringing voltages, this device is meant to operate with a high-voltage primary battery (C65 v to C75 v typically). thus, power control is nor- mally achieved by use of the battery switch and an aux- iliary lower absolute voltage battery. operating temperature range, maximum current limit, maximum battery voltage, minimum dc loop length and protection resistors values, airflow, and number of pc board lay- ers will influence the overall thermal performance. the following example illustrates typical thermal design considerations. the thermal resistance of the 28-pin plcc package is typically 35.5 c/w, which is representative of the natu- ral airflow as seen in a typical switch cabinet with a multilayer board. the l9500 will enter thermal shutdown at a typical tem- perature of 150 c. the thermal design should ensure that the slic does not reach this temperature under normal operating conditions. for this example, assume a maximum ambient operat- ing temperature of 85 c, a designed current limit of 30 ma, a maximum battery of C75 v, and an auxiliary battery of C21 v. assume a (worst-case) minimum dc loop of 20 w of wire resistance, 30 w protection resis- tors, and 200 w for the handset. additionally, include the effects of parameter tolerance. 1. t tsd C t ambient(max) = allowed thermal rise. 150c C 85 c = 65 c. 2. allowed thermal rise = package thermal impedance ? slic power dissipation. 65 c = 35.5c/w ? slic power dissipation slic power dissipation (p d ) = 1.83 w. thus, if the total power dissipated in the slic is less than 1.83 w, it will not enter the thermal shutdown state. total slic power is calculated as: to ta l p d = maximum battery ? maximum current limit + slic quiescent power. for the l9500a, the worst-case slic on-hook active power is 64 mw. thus, total off-hook power = (i loop )(current-limit tolerance) * (v batapplied ) + slic on-hook power total off-hook power = (0.030 a)(1.08) * (21) + 75 mw total off-hook power = 744.4 mw the power dissipated in the slic is the total power dis- sipation less the power that is dissipated in the loop. slic p d = total power C loop power loop off-hook power = (i loop * 1.08) 2 ? (r loop(dc) min + 2r protection + r handset ) loop off-hook power = ((0.030 a)(1.08)) 2 ? (20 w + 60 w + 200 w ) loop off-hook power = 293.9 mw slic off-hook power = total off-hook power C loop off-hook power slic off-hook power = 744.4 mw C 293.9 mw slic off-hook power = 450.5 mw < 1.83 w thus, under the worst-case normal operating condi- tions of this example, the thermal design, using the auxiliary, is adequate to ensure the device is not driven into thermal shutdown under worst-case operating con- ditions.
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a 22 agere systems inc. applications (continued) dc loop current limit current limit may be chosen from two discrete values, 25 ma or 40 ma, depending on if v prog is grounded (25 ma) or left floating (40 ma). note that there is a 12.5 k w slope to the i/v characteristic in the current- limit region; thus, once in current limit, the actual loop current will increase slightly, as loop length decreases. the above describes the active mode steady-state cur- rent-limit response. there will be a transient response of the current-limit circuit upon an on- to off-hook transi- tion. typical active mode transient current-limit response is given in table 19. table 19. typical active mode on- to off-hook tip/ ring current-limit transient response overhead voltage active mode overhead is fixed to a nominal 7.0 v, which is adequate for an on-hook transmission of 3.14 dbm into 900 w with additional head room for a 500 mv ppm signal. scan mode if the magnitude of the primary battery is greater than 51 v, the magnitude of the open loop tip-to-ring open loop voltage is clamped typically between 44 v and 51 v. if the magnitude of the primary battery is less than a nominal 51 v, the overhead voltage will track the magnitude of the battery voltage, i.e., the magnitude of the open circuit tip-to-ring voltage will be 4 v to 6 v less than battery. in the scan mode, overhead is unaffected by v ovh . on-hook transmission mode if the magnitude of the primary battery is greater than 51 v, the magnitude of the open loop tip-to-ring open loop voltage is clamped typically between 41 v and 49 v. if the magnitude of the primary battery is less than a nominal 51 v, the overhead voltage will track the magnitude of the battery voltage, i.e., the magnitude of the open circuit tip-to-ring voltage will be 6 v to 8 v less than battery. in the scan mode, overhead is unaffected by v ovh . ring mode in the ring mode, to maximize ringing loop length, the overhead is decreased to the saturation of the tip ring drive amplifiers, a nominal 4 v. the tip to ground volt- age is 1 v, and the ring to v bat1 voltage is 3 v. in the ring mode, overhead is unaffected by v ovh . during the ring mode, to conserve power, the receive input at rcvn/rcvp is deactivated. during the ring mode, to conserve power, the acc amplifier in the transmit direction at vitr is deactivated. however, the ax amplifier at vtx is active during the ring mode; dif- ferential ring current may be sensed at vtx during the ring mode. loop range the dc loop range is calculated using: r l = C 2r p C r dc v bat2 is typically applied under off-hook conditions for power conservation and slic thermal considerations. the l9500 is intended for short-loop applications and, therefore, will always be in current limit during off-hook conditions. however, note that the ringing loop length rather than the dc loop length will be the factor to deter- mine operating loop length. parameter value unit dc loop current: active mode r loop = 100 w on- to off-hook transition t < 5 ms i lim + 60 ma dc loop current: active mode r loop = 100 w on- to off-hook transition t < 50 ms i lim + 20 ma dc loop current: active mode r loop = 100 w on- to off-hook transition t < 300 ms i lim ma v bat2 v oh C i limit -------------------------------------
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a agere systems inc. 23 applications (continued) battery reversal rate the rate of battery reverse is controlled or ramped by capacitors fb1 and fb2. a chart showing fb1 and fb2 values vs. typical ramp time is given below. leave fb1 and fb2 open if it is not desired to ramp the rate of bat- tery reversal. table 20. fb1 and fb2 values vs. typical ramp time supervision the l9500 offers the loop closure and ring trip supervi- sion functions. internal to the device, the outputs of these detectors are multiplexed into a single package output (nstat). the ring trip detector is valid on nstat during the ring mode and loop closure detector is valid on nstat during active and on-hook transmis- sion modes. additionally, common-mode current is detected for ground start applications. this status is output onto nstat and is valid during ground start mode. loop closure the loop closure has a fixed typical 10.5 ma on- to off- hook threshold in the active mode and a fixed 11.5 ma on- to off-hook threshold from the scan mode. in either case, there is a 2 ma hysteresis with v cc = 5 v and a 2 ma hysteresis with v cc = 3.3 v. ring trip the ring trip detector requires only a single-pole filter at the input, minimizing external components. an r/c combination of 383 k w and 0.1 m f, for a filter pole at 5.15 hz, is recommended. the ring trip threshold is internally fixed as a function of battery voltage and is given by: rt (ma) = 67 * {(0.0045 * v bat1 ) + 0.317} where: rt is ring trip current in ma. v bat1 is the magnitude of the ring battery in v. there is a 6 ma to 8 ma hysteresis. ground start in the ground start applications, the loop closure detec- tor detector is also used to indicate that ring-ground has occurred. during ground start mode, loop current will be common mode, rather than differential as in loop start mode. thus, in ground start the threshold of the loop closure detector is reduced by one half the thresh- old seen in the loop start mode.this ouput is seen at the nstat output pin. c fb1 and c fb2 transition time 0.01 m f 20 ms 0.1 m f 220 ms 0.22 m f 440 ms 0.47 m f 900 ms 1.0 m f 1.8 s 1.22 m f2.25 s 1.3 m f 2.5 s 1.4 m f 2.7 s 1.6 m f 3.2 s
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a 24 agere systems inc. applications (continued) power ring the device offers a ring mode, in which a balanced power ring signal is provided to the tip/ring pair. during the ring mode, a user-supplied low-voltage ring signal is input to the devices ring in input. this signal is amplified to produce the balanced power ring signal. the user may supply a sine wave input, pwm input, or a square wave to produce sinusoidal or trapezoidal ringing at tip and ring. various crest factors are shown below for illustrative purposes. 12-3346a (f) note: slew rate = 5.65 v/ms; trise = tfall = 23 ms; pwidth = 2 ms; period = 50 ms. figure 9. ringing waveform crest factor = 1.6 12-3347a (f) note: slew rate = 10.83 v/ms; trise = tfall = 12 ms; pwidth = 13 ms; period = 50 ms. figure 10. ringing waveform crest factor = 1.2 sine wave input signal and sine wave power ring signal output the low-voltage sine wave input is applied differentially or single ended to the l9500 at pins ring inp and ring inn . during the ring mode, the signals at pins ring inp and ring inn are amplified and presented to the subscriber loop. the differential gain from ring in to tip and ring is a nominal 70. when the device enters the ring mode, the tip/ring overhead set at ovh and the scan clamp circuit are disabled, allowing the voltage magnitude of the power ring signal to be maximized. additionally, in the ring mode, the loop current limit is increased 2.5x the value set by the v prog voltage. the magnitude of the power ring voltage will be a func- tion of the gain of the ring amplifier, the high-voltage battery, and the input signal at ring in . the input range of the signal at ring in is 0 v to vcc. as the input volt- age at ring in is increased, the magnitude of the power ring voltage at tip and ring will increase linearly, per the gain of 70, until the tip and ring drive amplifiers begin to saturate. once the tip and ring amplifiers reach satura- tion, further increases of the input signal will cause clip- ping distortion of the power ring signal at tip and ring. the ring signal will appear balanced on tip and ring. that is, the power ring signal is applied to both tip and ring, with the signal on tip 180 out of phase from the signal on ring. it is recommended that the input level at ring in be adjusted so that the power ring signal at tip and ring is just at the edge or slightly clipping. this gives maxi- mum power transfer with minimal distortion of the sine wave. the tip side will saturate at a nominal 1 v above ground. the ring side will saturate at a nominal 3 v above battery. the input circuit for a sine wave along with waveforms to illustrate the tip and ring saturation is shown in figure 9. the point at which clipping of the power ring signal begins at tip and ring is a function of the battery volt- age, the input capacitor at ring in , and the input signal at ring in and vcc. during nonring modes, the sinusoi- dal ringing waveform may be left on at ring in . via the state table, the ring signal will be removed from tip and ring even if the low-voltage input is still present at ring in . time (s) C80 C60 C40 C20 0 20 40 60 80 0.00 0.02 0.06 0.04 0.08 0.10 0.12 0.14 0.16 0.18 0.20 volts (v) time (s) C80 C60 C40 C20 0 20 40 60 80 0.00 0.02 0.06 0.04 0.08 0.10 0.12 0.14 0.16 0.18 0.20 volts (v)
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a agere systems inc. 25 applications (continued) figure 11. ring in operation ac applications ac parameters there are four key ac design parameters. termination impedance is the impedance looking into the 2-wire port of the line card. it is set to match the impedance of the telephone loop in order to minimize echo return to the tele- phone set. transmit gain is measured from the 2-wire port to the pcm highway, while receive gain is done from the pcm highway to the transmit port. transmit and receive gains may be specified in terms of an actual gain, or in terms of a transmission level point (tlp), that is the actual ac transmission level in dbm. finally, the hybrid bal- ance network cancels the unwanted amount of the receive signal that appears at the codec input. gnd v bat pt +1 pr 35x ring inp l9500 v tip v ring C1 3.0 v 1.0 v v bat = C75 v 71 v ring inn
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a 26 agere systems inc. ac applications (continued) design examples broadcom 3352 interface network the following reference circuit shows the complete slic schematic for interface to the broadcom bcm3352 as designed on the broadcom bcm93352sv application reference design and board. figure 12. reference schematic with broadcom bcm embedded codec devices and agere l9500 slic v bat1 bgnd v bat2 agnd v cc c bat1 0.1 m f c bat2 0.1 m f c cc 0.1 m f rtflt dcout pr pt txi itr c rt 0.1 m f r rt 383 k w agere l7591 v bat1 fusible or ptc 50 w 50 w cf1 cf2 nstat b2 b1 b0 c f1 0.22 m f c f2 0.1 m f v ref rcvn vitr rcvp v bat1 d bat1 v bat2 c 9 d2 cm level vrxp l9500 fusible or ptc broadcom v prog c tx r gx 4750 w vtx 0.47 m f d0 det d1 ring inp ring inn c 9 68 nf c 10 68 nf c 3 3.3 nf c 2 3.3 nf vrxn r ing refp r ing refn r 4 78.7 k w r 7 54.9 k w ferrite bead 600 w v ddcore v ddi/o r 3 v cc = 3.3 v vcm c 4 v ref _io c 5 150 pf r 1 20 k w 0.1 m f c c1 c 1 3.3 nf vtxn vtxp bcm3351 r 2 20 k w c 6 150 pf c 7 150 pf r 5 174 k w r 6 88.7 k w r 8 88.7 k w r det 10 k w v cc bcm3352 bcm6352 bcm1101
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a agere systems inc. 27 ac applications (continued) design examples (continued) table 21. parts list l9500; agere l9500 and broadcom bcm3352 (per broadcom bcm93552sv application boardslic daughter boad components); fully programmable name value tolerance rating function fault protection r pt 50 w 1% fusible or ptc protection resistor. r pr 50 w 1% fusible or ptc protection resistor. protector agere l7591 secondary protection. power supply c bat1 0.1 m f 20% 100 v v bat filter capacitor. c bat2 0.1 m f 20% 50 v v bat filter capacitor. |v bat2 | < |v bat1 |. d bat1 1n4004 reverse current. c cc 0.47 m f 20% 10 v ceramic bypass capacitor. ferrite bead 600 w, murata ? blm11a601spb filtering. c f1 0.22 m f 20% 100 v filter capacitor. c f2 0.1 m f 20% 100 v filter capacitor. ring trip c rt 0.1 m f 20% 10 v ring trip filter capacitor. r rt 383 k w 1% 1/16 w ring trip filter resistor. ac interface r gx 4750 w 1% 1/16 w sets t/r to vitr transconductance. c tx 0.47 m f 20% 10 v ac/dc separation. c c1 0.1 m f 20% 10 v dc blocking capacitor. r 4 78.7 k w 1% 1/16 w ac interface. r 5 174 k w 1% 1/16 w ac interface. r 6 88.7 k w 1% 1/16 w ac interface. r 7 54.9 k w 1% 1/16 w ac interface. r 8 88.7 k w 1% 1/16 w ac interface. r det 10 k w 1% 1/16 w control.
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a 28 agere systems inc. outline diagrams 28-pin plcc dimensions are in millimeters. 5-2506r.8(f) 1.27 typ 0.330/0.533 0.10 seating plane 0.51 min typ 4.572 max 12 18 11 5 4126 25 19 12.446 0.127 pin #1 identifier zone 11.506 0.076 11.506 0.076 12.446 0.127
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a agere systems inc. 29 outline diagrams (continued) 48-pin mlcc dimensions are in millimeters. notes: the dimensions in this outline diagram are intended for informational purposes only. for detailed schemat- ics to assist your design efforts, please contact your agere sales representative. the exposed pad on the bottom of the package will be at v bat1 potential. 0195mod pin #1 identifier zone 1 7.00 6.75 seating plane 0.08 0.65/0.80 0.20 ref detail a 7.00 5.10 0.15 3 3.50 3.375 6.75 0.00/0.05 section cCc 11 spaces @ 0.50 = 5.50 0.50 bsc 0.18/0.30 0.30/0.45 0.01/0.05 1.00 max 12 0.18/0.30 0.24/0.60 0.24/0.60 2 1 3 2 0.50 bsc detail a cc view for even terminal/side c l exposed pad
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a 30 agere systems inc. outline diagrams (continued) 48-pin mlcc, jedec mo-220 vkkd-2 dimensions are in millimeters. notes: the dimensions in this outline diagram are intended for informational purposes only. for detailed schemat- ics to assist your design efforts, please contact your agere sales representative. the exposed pad on the bottom of the package will be at v bat1 potential. 0195a index area 7.00 3.50 seating plane 0.08 0.20 ref detail a 7.00 5.00/5.25 3.50 11 spaces @ 0.50 = 5.50 0.50 bsc 0.18/0.30 0.02/0.05 1.00 max 0.23 0.30/0.50 1 3 2 (7.00/2 x 7.00/2) pin #1 identifier zone top view side view detail b 0.23 0.18 0.18 bottom view 2.50/2.625 exposed pad detail b 0.50 bsc detail a view for even terminal/side c l
preliminary data sheet september 2001 high-voltage ringing slic for voip applications l9500a agere systems inc. 31 ordering information device part number description package comcode LUCL9500AGF-d slic 28-pin plcc, dry-bagged 108955501 LUCL9500AGF-dt slic 28-pin plcc, dry-bagged, tape and reel 108955519 lucl9500arg-d slic 48-pin mlf, dry-bagged 108955485
agere systems inc. reserves the right to make changes to the product(s) or information contained herein without notice. no liab ility is assumed as a result of their use or application. copyright ? 2001 agere systems inc. all rights reserved september 2001 ds01-303alc (replaces ds01-081alc) for additional information, contact your agere systems account manager or the f ollowing: internet: http://www.agere.com e-mail: docmaster@agere.com n. america: agere systems inc., 555 union boulevard, room 30l-15p-ba, allentown, pa 18109-3286 1-800-372-2447 , fax 610-712-4106 (in canada: 1-800-553-2448 , fax 610-712-4106) asia: agere systems hong kong ltd., suites 3201 & 3210-12, 32/f, tower 2, the gat eway, harbour city, kowloon tel. (852) 3129-2000 , fax (852) 3129-2020 china: (86) 21-5047-1212 (shanghai), (86) 10-6522-5566 (beijing), (86) 755-695-7224 (shenzhen) japan: (81) 3-5421-1600 (tokyo), korea: (82) 2-767-1850 (seoul), singapore: (65) 778-8833 , taiwan: (886) 2-2725-5858 (taipei) europe: tel. (44) 7000 624624 , fax (44) 1344 488 045 broadcom is a registered trademark of broadcom corporation. ieee is a registered trademark of the institute of electrical and electronics engineers, inc. murata is a registered trademark of murata manufacturing company ltd.

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