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this is information on a product in full production. december 2015 docid028720 rev 1 1/19 hvled002 high performance current mode led controller datasheet - production data features ? trimmed oscillator for precise frequency control ? oscillator frequency gua ranteed at 250 khz ? current mode operation to 500 khz ? latching pwm for cycle-by-cycle current limiting ? internally trimmed reference with undervoltage lockout ? high current tote m pole output ? undervoltage lockout with hysteresis ? low start-up and operating current description the hvled002 control ic provides the necessary features to implement off- line or dc to dc fixed frequency current mode control schemes to implement led drivers. internally implemented circuits include a trimmed oscillator for the precise duty cycle control, undervoltage lockout, a precision reference trimmed for accuracy at the error amplifier input, a pwm comparator which also provides current limit control and a totem pole output stage designed to the source or sink high peak current. the output stage, suitable for driving n-channel mosfets, is low in the off- state. figure 1. block diagram so-8 table 1. device summary order codes package packaging hvled002 so8 tube HVLED002TR tape and reel www.st.com
contents hvled002 2/19 docid028720 rev 1 contents 1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 pin connection and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.1 supply voltage and undervoltage lockout . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.2 reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.3 oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.4 current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.5 error amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.6 totem pole output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.7 typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6.1 so-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
docid028720 rev 1 3/19 hvled002 list of figures 19 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 figure 2. pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. open loop test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. timing resistor vs. oscillator frequency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 5. output deadtime vs. os cillator frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 6. oscillator discharge current vs. te mperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 7. maximum output duty cycle vs. timing resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 8. error amplifier open loop gain and phase vs. frequen cy . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 9. current sense input threshold vs. error amplifier output voltage . . . . . . . . . . . . . . . . . . . . . 9 figure 10. reference voltage change vs. source current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 11. reference short-circuit current vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 12. output saturation voltage vs. load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 13. supply current vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 14. oscillator and output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 15. error amplifier config uration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 20. error amplifier compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 16. undervoltage lockout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 17. current sense circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 18. soft-start circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 19. external clock synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 21. leading edge blanking circuitries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 22. shutdown circuitries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 23. typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 24. so-8 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
absolute maximu m ratings hvled002 4/19 docid028720 rev 1 1 absolute maximum ratings table 2. absolute maximum ratings (1) 1. all voltages are with respect to the pin 5, all currents are positive into the specified terminal. symbol parameter value unit v i supply voltage 30 v i o output current 1 a e o output energy (capacitive load) 5 j analog inputs (pins 2, 3) - 0.3 to 5.5 v error amplifier output sink current 10 ma
docid028720 rev 1 5/19 hvled002 pin connection and functions 19 2 pin connection and functions figure 2. pin connection (top view) 3 thermal data table 3. pin functions no. function description 1 comp this pin is the error amplifier output and is made available for loop compensation. 2v fb this is the inverting input of the error am plifier. it is normally connected to the switching power supply output through a resistor divider. 3i sense a voltage proportional to the inductor current is connected to this input. the pwm uses this information to termi nate the output s witch conduction. 4r t /c t the oscillator frequency and maximum output duty cycle are programmed by the connecting resistor r t to v ref and the capacitor c t to ground. an operation to 500 khz is possible. 5 ground this pin is the ground reference of the device. 6output this output directly drives the gate of a power mosfet. peak currents up to 1 a are sourced and sunk by this pin. 7v i this pin is the positive supply of the control ic. 8v ref this is the reference output. it provides the charging current for the capacitor c t through the resistor r t . table 4. thermal data symbol description so8 unit r th j-amb thermal resistance junction ambient 150 c/w t stg storage temperature range -65 to 150 c t j junction operating temperature -40 to 150 c t l lead temperature (soldering 10 s) 300 c
electrical characteristics hvled002 6/19 docid028720 rev 1 4 electrical characteristics unless otherwise stated, thes e specifications apply for 0 t amb 85 c; v i = 15 v; r t = 10 k ? ; c t = 3.3 nf (a) . a. max. package power dissipation limits mu st be respected; low duty cycle pulse techniques are used during the test maintaining t j as close to t amb as possible. table 5. electrical characteristics symbol parameter test conditions min. typ. max. unit supply voltage v i max. operative volt. 25 v reference section v ref output voltage t j = 25 c, i o = 1 ma 4.95 5.00 5.05 v ? v ref line regulation 12 v vi 25 v 2 20 mv ? v ref load regulation 1 i o 20 ma 3 25 mv ? v ref / ? t temperature stability (1) 0.2 mv/c total output variation line, load, temperature 4.82 5.18 v e n output noise voltage 10 hz f 10 khz, t j = 25 c (1) 50 v long term stability t amb = 125 c, 1000 hrs (1) 525mv i sc output short-circuit -30 -100 -180 ma oscillator section f osc frequency t j = 25 c t a = 0 to 85 c t j = 25 c (r t = 6.2 k ? , c t = 1 nf) 49 48 225 52 - 250 55 56 275 khz ? f osc / ? v frequency change with volt. v cc = 12 v to 25 v - 0.2 1 % ? f osc / ? t frequency change with temp. t amb = 0 c to 85 c - 0.5 - % v osc oscillator voltage swing peak-to-peak - 1.6 - v i dischg discharge current (v osc = 2 v) t j = 25 c 7.8 8.3 8.8 ma t a = 0c to 85c 7.6 - 8.8 ma error amplifier section v ref,ea input voltage v (comp) = 2.5 v 2.42 2.50 2.58 v i b input bias current v fb = 5 v -0.1 -2 a a vol 2 v v o 4 v 65 90 db bw unity gain bandwidth t j = 25 c (1) 0.7 1 mhz psrr power supply reject. ratio 12 v v i 25 v 60 70 db i o output sink current v (vfb) = 2.7 v, v (comp) = 1.1 v 2 12 ma
docid028720 rev 1 7/19 hvled002 electrical characteristics 19 io output source current v (vfb) = 2.3 v, v (comp) = 5 v -0.5 -1 ma v comp high v (vfb) = 2.3 v; r l = 15 k ? between comp and ground 56.2 v vcomp low v (vfb) = 2.7 v; r l = 15 k ? between comp and vref 0.8 1.1 v current sense section g v gain (2) , (3) 3v/v maxcs maximum input signal v (comp) = 5.6 v 258 267 276 mv svr supply voltage rejection 12 vi 25 v (1) 70 db i b input bias current -2 -10 a delay to output 150 300 ns output section v ol output low level i sink = 20 ma 0.1 0.4 v i sink = 200 ma 1.6 2.2 v v oh output high level i source = 20 ma 13 13.5 v i source = 200 ma 12 13.5 v v ols uvlo saturation vcc = 6 v; i sink = 1 ma 0.1 1.1 v t r rise time t j = 25 c; c l = 1 nf (1) 50 150 ns t f fall time t j = 25 c; c l = 1 nf (1) 50 150 ns undervoltage lockout section v on start threshold increasing voltage 7.8 8.4 9.0 v v off min. operating voltage after turn-on decreasing voltage 7.0 7.6 8.2 v pwm section maximum duty cycle 94 96 100 % minimum duty cycle 0 % total standby current i st start-up current 0.3 0.5 ma i i operating supply current v (vfb) = v (comp) = 0 v 12 17 ma 1. these parameters, although guaranteed, are not 100% tested in production. 2. parameter measured at the trip point of the latch with v (vfb) = 0. 3. gain defined as : a = ? v (comp) / ? v (isense) ; 0 v (isense) 267 mv. table 5. electrical ch aracteristics (continued) symbol parameter test conditions min. typ. max. unit
electrical characteristics hvled002 8/19 docid028720 rev 1 figure 3. open loop test circuit high peak currents associated with capacitive loads necessitate careful grounding techniques. timing and bypass capacitors should be connected close to the pin 5 in a single point ground. the transistor and 5 k ? potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to the pin 3. r t a 2n2222 error amp. adjust i sense adjust comp v fb i sense r t /c t 1 2 3 4 c t 7 6 5 8 v ref v i output ground 0.1 f 0.1 f v ref v i output ground 1w hvled002 am039820 figure 4. timing resistor vs. oscillator frequency figure 5. output deadtime vs. oscillator frequency
docid028720 rev 1 9/19 hvled002 electrical characteristics 19 figure 6. oscillator discharge current vs. temperature figure 7. maximum output duty cycle vs. timing resistor figure 8. error amplifier open loop gain and phase vs. frequency figure 9. current sense input threshold vs. error amplifier output voltage
electrical characteristics hvled002 10/19 docid028720 rev 1 figure 10. reference voltage change vs. source current figure 11. reference short-circuit current vs. temperature figure 12. output saturation voltage vs. load current figure 13. supply current vs. supply voltage figure 14. oscillator and output waveforms figure 15. error amplifier configuration
docid028720 rev 1 11/19 hvled002 electrical characteristics 19 figure 20. error amplifier compensation figure 16. undervoltage lockout figure 17. current sense circuit figure 18. soft-start circuit figure 19. external clock synchronization &" 3 j n" 3 e 3 3 $ g 3 g 'spn7 0 7 &" 3 1 n" 3 e 3 3 $ g 3 g 'spn7 0 7 &sspsbnqmjgjfsdpnqfotbujpodjsdvjugpstubcjmj[johbozdvssfo unpefupqpmphzfydfqu gpscpptuboegmzcbdldpowfsufstpqfsbujohxjuidpoujovpvtjoev dupsdvssfou $ 1 3 j &sspsbnqmjgjfsdpnqfotbujpodjsdvjugpstubcjmj[johdvssfounp efcpptuboegmzcbdl upqpmphjftpqfsbujohxjuidpoujovpvtjoevdupsdvssfou ".
application information hvled002 12/19 docid028720 rev 1 5 application information 5.1 supply voltage an d undervoltage lockout the hvled002 device is able to operate with a very wide range of supply voltage between 8.4 v and 30 v. the uvlo circuit insures that vcc is adequate to make the hvled002 fully operational before enabling the output stage. figure 16 shows that the uvlo turn-on and turn-off thresholds are fixed internally at 8.4 v and 7.6 v respectively. the hysteresis prevents v cc oscillations during power sequencing and the start-up current is less than 1 ma. during uvlo, the output driver is in a low state and it can easily sink 1 ma, enough to insure the mosfet is held off. 5.2 reference voltage the hvled002 contains a precision reference vo ltage (5 v) that generates all the internal reference voltages such as the error amplifier's reference (connected to its non-inverting input), current sense clamp limit (maxcs) and oscillator' s internal bias currents and thresholds. the reference voltage is also available on th e vref pin that, thanks to its high output current capability (over 20 ma), is able to supply not on ly nearby passive circuitries but also auxiliary microcontrollers. the pin must be bypassed with at least a 0. 1 f ceramic capacitor placed as close as possible to the respective vref and gnd pins. 5.3 oscillator the hvled002 oscillator is programmed as shown in figure 14 . the timing capacitor ct is charged from a reference voltage (e.g.: vref) through the timing resistor rt, and discharged by an internal current source. the mosfet is turned on (gd pi n high) when the oscillator star ts the charge of the ct. as soon as the voltage of the ct reaches an upper threshold the internal discharge current is activated until the ct voltage reaches a lower threshold. this occurrence initiates a new oscillator cycle. the difference between the upper and the lower thresholds (vosc) determines the duration of charging and discharging time. during the discharging time (also called deadtime) the mosfet is off and any spurious gd triggeri ng is avoided. the deadtime also limits the maximum obtainable duty cycle. the oscillator can be differently co nnected to external circuitry to obtain different operating schemes. connecting the rt to vref a very accurate fixed frequency operation is achieved: the rt,ct combinations are plot into figure 5 on page 8 , figure 6 and figure 8 for a quick reference, or calculated as follows: equation 1 fosc (khz) = 1.72 / [rt (k ? ) x ct (f)]
docid028720 rev 1 13/19 hvled002 application information 19 connecting the rt to a variable voltage, dependency of the operating frequency on said voltage is introduced. a pull-down switch can be used to reset the ct during the mosfet's on time, for example to operate in fixed off time. a synchronous operation is also possible using circuitries like the one proposed as an example in figure 19 . the hvled002 oscillator can be used to a maximum of 500 khz. 5.4 current sense the peak current mode operation of the hv led002 is made by the embedded current sense comparator: the said element turns off the mosfet as soon as the current sense input voltage is greater than the internal threshold derived by the comp pin voltage ( figure 17 ). the current sense pin (isense) is normally connec ted to a shunt resistor, put in series with the main switch, but different connections are also possible. under the normal operation the threshold volt age (vcs) is controlled by the e/a according to the following relation: equation 2 vcs = 1/3 * (vcomp - 1.4 v) vcs is upper limited to maxcs to reduce the shunt resistor power dissipation without the need of current transformers or offsets circui tries. this parameter is beneficial in those applications where both the peak current accu racy and the operating power dissipation are critical aspects (e.g.: led secondary side led current regulators). when the sensing current resistor is in seri es with the power switch, the current waveform will often have a large spike at its leading edge due to parasitic capacitances and gate driver charging currents. a very simple leading edge blan king (leb) circuit consists on an rc filter, but more effective active circuitries are also possible. figure 21. leading edge blanking circuitries $ 3 4 3 * 4 *4&/4& (/% )7-&% $ 3 4 3 * 4 *4&/4& 065165 (/% )7-&% ".
application information hvled002 14/19 docid028720 rev 1 5.5 error amplifier an error amplifier (e/a) structur e is present in the hvled002 ( figure 15 on page 10 ). the non-inverting input is internally connected to a very precise reference voltage (2.5 v 2%). the e/a output and inverting pin are connected re spectively to the pin 1 and 2, available for external compensation. the e/a output will so urce at least 0.5 ma and sink 2 ma. figure 8 on page 9 shows the open loop frequency response of the e/a. the output of the error amplifier can be forced to ground in different ways to shut down the application as shown in figure 22 . figure 22. shutdown circuitries 5.6 totem pole output the hvled002 has a single totem pole output which can be operated to the 1 amp peak current for driving mosfet gates, and a + 200 ma average current for bipolar power transistors. cross conduction between the driver's output transistors is minimal, the average added power with vin = 30 v is around 80 mw at 200 khz. limiting the peak current through the ic is ac complished by placing a resistor between the totem pole output and the gate of the mosfet. without this resistor, the peak current is limited only by the dv/dt rate of the totem pole switching and the fet gate capacitance. an additional discharging diode can be put in pa rallel with the said limit ing resistor to quickly turn off the mosfet, reduci ng the switching losses and the control to output delay. bias + - ea r + osc 2n 3905 2n 3903 1 ma r r 2r 1 2 8 4 the scr must be selected for a holding current of less than 0.5 ma at t a(min) . 5 am039818 the simple two-transistor circuit can be used in place of the scr as shown. all resistors are 10 k .
docid028720 rev 1 15/19 hvled002 application information 19 5.7 typical application the hvled002 device can be used as a second ary side step-down current regulator in the multiple staged led driver - see figure 23 . it is easy to configure the device to drive an inverse (or modified) buck topology base d on the fixed off-time (fot) algorithm. the mosfet remains on until the current sens e threshold is reached; during the on time, the oscillator remains reset to ground. the current sense thresh old is set by the saturation of the e/a to maxcs to guarantee the higher precision as possible. the mosfet is then turned off and the oscillato r is released: the resulting off time is fixed by the charging of the ct by rt, connected to vref. an optional auxiliary microcontro ller, supplied by vref itself can be used to dim the led current according to the information sent to the application by a remote controller. figure 23. typical application 1. optional for better performances. v in d q 1 l r s rt/ct 1 2 3 4 7 6 5 8 output ground hvled002 isense vfb comp vref vi vaux c gnd vdd gpio osc. reset dimming user interface 5.6 v ( 1 )
package information hvled002 16/19 docid028720 rev 1 6 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions a nd product status are available at: www.st.com . ecopack ? is an st trademark. 6.1 so-8 package information figure 24. so-8 package outline $09
docid028720 rev 1 17/19 hvled002 package information 19 table 6. so-8 package mechanical data symbol dimensions (mm) dimensions (inch) min. typ. max. min. typ. max. a 1.750 0.0689 a1 0.100 0.250 0.0039 0.0098 a2 1.250 0.0492 b 0.280 0.480 0.0110 0.0189 c 0.170 0.230 0.0067 0.0091 d (1) 1. dimension ?d? does not include mold fl ash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15 mm in total (both sides). 4.800 4.900 5.000 0.1890 0.1929 0.1969 e 5.800 6.000 6.200 0.2283 0.2362 0.2441 e1 (2) 2. dimension ?e1? does not include in terlead flash or protrusions. interl ead flash or protrusions shall not exceed 0.25 mm per side. 3.800 3.900 4.000 0.1496 0.1535 0.1575 e 1.270 0.0500 h 0.250 0.500 0.0098 0.0197 l 0.400 1.270 0.0157 0.0500 l1 1.040 0.0409 k0808 ccc 0.10 0.0039
revision history hvled002 18/19 docid028720 rev 1 7 revision history table 7. document revision history date revision changes 15-dec-2015 1 initial release.
docid028720 rev 1 19/19 hvled002 19 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics ? all rights reserved

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