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standard power data sheet rev. 1.1, 2014-10-30 IFX54441 wide input range low noise 300ma ldo
type package marking IFX54441ejv pg-dso-8 exposed pad 54441ev IFX54441ejv33 pg-dso-8 exposed pad 54441e33 IFX54441ldv pg-tson-10 544lv IFX54441ldv33 pg-tson-10 544l33 pg-dso-8 exposed pad pg-tson-10 data sheet 2 rev. 1.1, 2014-10-30 wide input range low noise 300ma ldo IFX54441 1overview features ? low noise down to 24 v rms (bw = 10 hz to 100 khz) ? 300ma current capability ? low quiescent current: 30 a ? wide input voltage range: 1.8 v to 20 v ? 2.5% output voltage accuracy (over full temperature and load range) ? low dropout voltage: 270 mv ? very low shutdown current: < 1a ? no protection diodes needed ? fixed output voltage: 3.3v ? adjustable version with ou tput from 1.22v to 20v ? stable with 3.3 f output capacitor ? stable with aluminium, tantalum or ceramic capacitors ? reverse battery protection ? no reverse current ? overcurrent and overtemperature protected ? dso-8 exposed pad and tson-10 exposed pad packages ? green product (rohs compliant) applications ? microcontroller supply ? battery-powered systems ? noise sensitive instruments ? radar applications ? image sensors the IFX54441 is not qualified and manufactured accordi ng to the requirements of infineon technologies with regards to automotive and/or transportation applications. for automotive applications please refer to the infineon tlx (tle, tls, tlf.....) vo ltage regulator products.
IFX54441 overview data sheet 3 rev. 1.1, 2014-10-30 the IFX54441 is a micropower, low noise, low dropout volt age regulator. the device is capable of supplying an output current of 300 ma with a dropout voltage of 270 mv. designed for use in battery-powered systems, the low quiescent current of 30 a makes it an ideal choice. a key feature of the IFX54441 is its low output noise. by ad ding an external 0.01 f bypass capacitor output noise values down to 24 v rms over a 10 hz to 100 khz bandwidth can be re ached. the IFX54441 voltage regulator is stable with output capacitors as sm all as 3.3 f. small ceramic capacitors can be used without the series resistance required by many other regulators. its internal protection circuitry includes reverse battery protection, current limiting and reverse current protection. the if x54441 comes as fixed output voltage 3.3v as well as adjustable device with a 1.22 v reference voltage. it is available in a dso-8 exposed pad and as well as in a tson-10 exposed pad package.
data sheet 4 rev. 1.1, 2014-10-30 IFX54441 block diagram 2 block diagram note: pin numbers in the block diagrams refer to the dso-8 ep package type. figure 1 block diagram IFX54441 fixed voltage version figure 2 block diagram IFX54441 adjustable version bias voltage reference saturation control temperature protection over current protection IFX54441 in en gnd byp out sense error amplifier 1 2 4 5 8 6 bias voltage reference saturation control temperature protection over current protection IFX54441 adj in en gnd byp out adj error amplifier 1 2 4 5 8 6
IFX54441 pin configuration data sheet 5 rev. 1.1, 2014-10-30 3 pin configuration 3.1 pin assignment figure 3 pin configuration of IFX54441 in pg-dso-8 exposed pad for fixed voltage and adjustable version figure 4 pin configuration of IFX54441 in tson 10 for fixed voltage and adjustable version in nc gnd out adj nc byp en 1 3 2 8 7 6 45 in nc gnd out sense nc byp en 1 3 2 8 7 6 45 IFX54441 ej v33 IFX54441 ej v 9 9 1 2 3 4 5 10 9 8 7 6 out out nc sense byp in in nc en gnd 1 2 3 4 5 10 9 8 7 6 out out nc adj byp in in nc en gnd IFX54441ld v33 IFX54441ld v 11 11
data sheet 6 rev. 1.1, 2014-10-30 IFX54441 pin configuration 3.2 pin definitions and functions pin symbol function 1 (dso-8 ep) 1,2 (tson-10) out output . supplies power to the load. for this pin a minimum output capacitor of 3.3 f is required to preven t oscillations. larger ou tput capacitors may be required for applications wit h large transient loads in order to limit peak voltage transients or when the regulator is appli ed in conjunction with a bypass capacitor. for more details please refer to th e section ?application information? on page 24 . 2 (dso-8 ep) 4 (tson-10) sense (fix voltage version) output sense. for the fixed voltage version the sense pin is the input to the error amplifier. this allows to achieve an optimized regulation performance in case of small voltage drops r p that occur between regulator and load. in applications where such drops are relevant they can be eliminated by connecting the sense pin directly at the load. in standard configuration the sense pin can be connected directly to the out pin. for further details please refer to the section ?kelvin sense connection? on page 25 . 2 (dso-8 ep) 4 (tson-10) adj (adjustable version) adjust. for the adjustable version the adj pin is the input to the error amplifier. the adj pin voltage is 1.22v referenced to ground and allows a output voltage range from 1.22v to 20v - v dr . the adj pin is internally clamped to 7 v. please note that the bias current of the adj pin is flowing into the pin. 1) 3, 7 (dso-8 ep) 3, 8 (tson-10) nc no connect. the nc pins have no connection to any internal circuitry. connect either to gnd or leave open. 4 (dso-8) 5 (tson-10) byp bypass. the byp pin is used to bypass the re ference of the if x54441 to achieve low noise performance. th e byp-pin is clamped intern ally to 0.6 v (i.e. one v be ). a small capacitor from the ou tput to the byp pin will bypass the reference to lower the output voltage noise 2) . if not used this pin must be left unconnected. 5 (dso-8 ep) 7 (tson-10) en enable. with the en pin the IFX54441 can be put into a low power shutdown state. the output will be off wh en the en is pulled low. the en pin can be driven by 5v logic or open-collector logic with pull-up resistor. the pull-up resistor is required to supply the pull-up current of the open-collector gate 3) and the en pin current 4) . please note that if the en pin is not used it must be connected to v in . it must not be left floating. 6 (dso-8 ep) 6,(tson-10) gnd ground. for the adj version connect the bott om of the output voltage setting resistor divider directly to the gnd pin for optimum load regulation performance. 8 (dso-8 ep) 9, 10 (tson-10) in input. via the input pin in the power is supplied to the device. a capacitor at the input pin is required if the device is more than 6 inches away from the main input filter capacitor or if no n-negligible inductance is present at the in pin 5) . the IFX54441 is designed to withstand revers e voltages on the input pin with respect to gnd and output. in the case of reverse input (e.g. due to a wrongly attached battery) the device will act as if there is a diode in series with it s input. in this way there will be no reverse current flowing into the regulator and no reverse voltage will appear at the load. hence, the device will protect both - the device itself and the load. 9 (dso-8 ep) 11 (tson-10) tab exposed pad. to ensure proper thermal performance, solder pin 11 (exposed pad) of tson10 to the pcb ground and tie directly to pin 6. in the case of dso- 8 ep as well solder pin 9 (exposed pad) to the pcb ground and tie directly to pin 6.
IFX54441 pin configuration data sheet 7 rev. 1.1, 2014-10-30 1) the typical value of the adj pin bias current is 60 na wi th a very good temperature stability.see also the corresponding typical performance graph ?adjust pin bias current i adj versus junction temperature t j ? on page 20 . 2) a maximum value of 10 nf can be used for reducing output voltage noise over the bandwidth from 10 hz to 100 khz. 3) normally several microamperes. 4) typical value is 1 a. 5) in general the output impedance of a battery rises with frequen cy, so it is advisable to incl ude a bypass capacitor in batter y- powered circuits. depending on actual conditions an i nput capacitor in the range of 1 to 10 f is sufficient.
data sheet 8 rev. 1.1, 2014-10-30 IFX54441 general product characteristics 4 general product characteristics 4.1 absolute maximum ratings notes 1. stresses above the ones listed here may cause perma nent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. integrated protection func tions are designed to prevent ic destructi on under fault conditions described in the data sheet. fault conditions are considered as ?outside? normal operating range. pr otection functi ons are not designed for continuous repetitive operation. table 1 absolute maximum ratings 1) t j = -40 c to +150 c; all voltages with respect to gr ound, positive current flowing into pin (unless otherwise specified) 1) not subject to production test, specified by design. parameter symbol va lues unit note / test condition number min. typ. max. input voltage voltage v in -20 ? 20 v ? p_4.1.1 output voltage voltage v out -20 ? 20 v ? p_4.1.2 input to output differential voltage v in -v out -20 ? 20 v ? p_4.1.3 sense pin voltage v sense -20 ? 20 v ? p_4.1.4 adj pin voltage v adj -7 ? 7 v ? p_4.1.5 byp pin voltage v byp -0.6 ? 0.6 v p_4.1.6 enable pin voltage v en -20 ? 20 v ? p_4.1.7 temperatures junction temperature t j -40 ? 150 c ? p_4.1.8 storage temperature t stg -55 ? 150 c ? p_4.1.9 esd susceptibility all pins v esd -2 ? 2 kv hbm 2) 2) esd susceptibility, hbm accordin g to ansi/esda/jedec js001 (1.5 k ? , 100 pf) p_4.1.10 all pins v esd -1 ? 1 kv cdm 3) 3) esd susceptibility, charged device model ?cdm? according jedec jesd22-c101 p_4.1.11
IFX54441 general product characteristics data sheet 9 rev. 1.1, 2014-10-30 4.2 functional range note: within the functional or operating range, the ic operat es as described in the circuit description. the electrical characteristics are specif ied within the conditions given in th e electrical char acteristics table. 4.3 thermal resistance note: this thermal data was generated in accordance wit h jedec jesd51 standards. fo r more information, go to www.jedec.org . table 2 functional range parameter symbol values unit note / test condition number min. typ. max. input voltage range (3.3 v voltage version) v in 3.8 v ? 20 v ? p_4.2.1 input voltage range (adjustable voltage version) v in 2.3 ? 20 v ? 1) 1) for the IFX54441 adjustable version the minimum limit of the functional range v in is tested and specified with the adj- pin connected to the out pin. p_4.2.2 operating junction temperature t j -40 ? 125 c ? p_4.2.3 table 3 thermal resistance 1) 1) not subject to production test, specified by design. parameter symbol values unit note / test condition number min. typ. max. IFX54441 ej (pg-dso8 exposed pad) junction to case r thjc ? 7.0 ? k/w ? p_4.3.1 junction to ambient r thja ?39?k/w? 2) p_4.3.2 junction to ambient r thja ? 155 ? k/w footprint only 3) p_4.3.3 junction to ambient r thja ?66?k/w300 mm 2 heatsink area on pcb 3) p_4.3.4 junction to ambient r thja ?52?k/w600 mm 2 heatsink area on pcb 3) p_4.3.5 IFX54441 ld (pg-tson10) junction to case r thjc ? 6.4 ? k/w ? p_4.3.6 junction to ambient r thja ?53?k/w? 2) p_4.3.7 junction to ambient r thja ? 183 ? k/w footprint only 3) p_4.3.8 junction to ambient r thja ?69?k/w300 mm 2 heatsink area on pcb 3) p_4.3.9 junction to ambient r thja ?57?k/w600 mm 2 heatsink area on pcb 3) p_4.3.10
data sheet 10 rev. 1.1, 2014-10-30 IFX54441 general product characteristics 2) specified r thja value is according to jedec jesd51-2,-5,-7 at na tural convection on fr4 2s2p board; the product (chip+package) was simulated on a 76.2 x 114.3 x 1.5 mm boar d with 2 inner copper layers (2 x 70 m cu, 2 x 35 m cu). where applicable a thermal via array under the ex posed pad contacted the first inner copper layer. 3) specified r thja value is according to jedec jesd 51-3 at natural convection on fr4 1s0p board; the product (chip+package) was simulated on a 76.2 114.3 1.5 mm 3 board with 1 copper layer (1 x 70 m cu).
IFX54441 electrical characteristics data sheet 11 rev. 1.1, 2014-10-30 5 electrical characteristics 5.1 electrical characteristics table table 4 electrical characteristics -40 c < t j < 125 c; all voltages with respect to ground; positive current defined flowing out of pin; unless otherwise specified. parameter symbol values unit note / test condition number min. typ. max. minimum operating voltage v in,min ?1.82.3v i out = 300 ma 1)2)3) p_5.1.1 output voltage 4) IFX54441ej v33 IFX54441ld v33 v out 3.220 3.30 3.380 v 1 ma < i out <300ma, 4.3 v < v in <20v p_5.1.2 IFX54441ejv IFX54441ldv v out 1.190 1.22 1.250 v 1m a < i out <300ma; 2.3 v < v in <20v 3) p_5.1.3 line regulation IFX54441ej v33 IFX54441ld v33 ? v out ?120mv ? v in = 3.8 v to 20 v; i out =1ma p_5.1.4 IFX54441ej v IFX54441ld v ? v out ?120mv ? v in = 2.0 v to 20 v; i out =1ma 3) p_5.1.5 load regulation IFX54441ejv33 IFX54441ldv33 ? v out ?615mv t j =25c; v in =4.3v; ? i out = 1 to 300 ma p_5.1.6 IFX54441ejv33 IFX54441ldv33 ? v out ??28mv v in =4.3v; ? i out = 1 to 300 ma p_5.1.7 IFX54441ejv IFX54441ldv ? v out ?38mv t j =25c; v in =2.3v; ? i out = 1 to 300 ma 3) p_5.1.8 IFX54441ejv IFX54441ldv ? v out ??12mv v in =2.3v; ? i out = 1 to 300 ma 3) p_5.1.9 dropout voltage 2)5)6) dropout voltage v dr ? 100 130 mv i out =10ma; v in = v out,nom ; t j =25c p_5.1.10 dropout voltage v dr ??190mv i out =10ma; v in = v out,nom p_5.1.11 dropout voltage v dr ? 150 190 mv i out =50ma; v in = v out,nom ; t j =25c p_5.1.12 dropout voltage v dr ??250mv i out =50ma; v in = v out,nom p_5.1.13 dropout voltage v dr ? 190 220 mv i out = 100 ma; v in = v out,nom ; t j =25c p_5.1.14 dropout voltage v dr ??300mv i out = 100 ma; v in = v out,nom p_5.1.15 dropout voltage v dr ? 270 300 mv i out = 300 ma; v in = v out,nom ; t j =25c p_5.1.16
data sheet 12 rev. 1.1, 2014-10-30 IFX54441 electrical characteristics dropout voltage v dr ??400mv i out = 300 ma; v in = v out,nom p_5.1.17 gnd pin current 5)7) gnd pin current i gnd ?3060a v in = v out,nom; i out =0ma p_5.1.18 gnd pin current i gnd ?50100a v in = v out,nom; i out =1ma p_5.1.19 gnd pin current i gnd ? 300 850 a v in = v out,nom; i out =50ma p_5.1.20 gnd pin current i gnd ?0.72.2ma v in = v out,nom; i out = 100 ma p_5.1.21 gnd pin current i gnd ?412ma v in = v out,nom; i out = 300 ma p_5.1.22 quiescent current in off-mode (en-pin low) i q ?0.11a v in =6v; v en =0v; t j =25c p_5.1.23 enable enable threshold high v th,en ?0.82.0v v out = off to on p_5.1.24 enable threshold low v tl,en 0.25 0.65 ? v v out = on to off p_5.1.25 en pin current 8) i en ?0.01?a v en =0v; t j = 25c p_5.1.26 en pin current 8) i en ?1?a v en =20v; t j = 25c p_5.1.27 adjust pin bias current 9)11) adj pin bias current i bias,adj ?60?na t j = 25c p_5.1.28 output voltage noise 11) output voltage noise IFX54441ejv 10) IFX54441ldv 10) e no ?41? v rms c out = 10 f ceramic; c byp =10nf; i out = 300 ma; (bw = 10hz to100khz) p_5.1.29 output voltage noise IFX54441ejv 10) IFX54441ldv 10) e no ?28? v rms c out = 10 f ceramic +250m ? resistor in series; c byp =10nf; i out = 300 ma; (bw = 10 hz to100 khz) p_5.1.30 output voltage noise IFX54441ejv 10) IFX54441ldv 10) e no ?29? v rms c out = 22 f ceramic; c byp =10nf; i out = 300 ma; (bw = 10 hz to100 khz) p_5.1.31 output voltage noise IFX54441ejv 10) IFX54441ldv 10) e no ?24? v rms c out = 22 f ceramic +250m ? resistor in series; c byp =10nf; i out = 300 ma; (bw = 10 hz to100 khz) p_5.1.32 table 4 electrical characteristics (cont?d) -40 c < t j < 125 c; all voltages with respect to ground; positive current defined flowing out of pin; unless otherwise specified. parameter symbol values unit note / test condition number min. typ. max.
IFX54441 electrical characteristics data sheet 13 rev. 1.1, 2014-10-30 output voltage noise IFX54441ejv33 IFX54441ldv33 e no ?45? v rms c out = 10 f ceramic; c byp =10nf; i out = 300 ma; (bw = 10 hz to100 khz) p_5.1.33 output voltage noise IFX54441ejv33 IFX54441ldv33 e no ?35? v rms c out = 10 f ceramic +250m ? resistor in series; c byp =10nf; i out = 300 ma; (bw = 10 hz to100 khz) p_5.1.34 output voltage noise IFX54441ejv33 IFX54441ldv33 e no ?33? v rms c out = 22 f ceramic; c byp =10nf; i out = 300 ma; (bw = 10 hz to100 khz) p_5.1.35 output voltage noise IFX54441ejv33 IFX54441ldv33 e no ?30? v rms c out = 22 f ceramic +250m ? resistor in series; c byp =10nf; i out = 300 ma; (bw = 10 hz to100 khz) p_5.1.36 power supply ripple rejection 11) power supply ripple rejection psrr ?65?db v in - v out = 1.5 v (avg); v ripple =0.5vpp; f r =120hz; i out = 300 ma p_5.1.37 output current limitation output current limit i out,limit 320 ? ? ma v in =7v; v out = 0 v p_5.1.38 output current limit i out,limit 320 ? ? ma v in = v out,nom +1v or 2.3v 12) ; ? v out =-0.1v p_5.1.39 input reverse leakage current input reverse leakage i leak,rev ??1ma v in =-20v; v out = 0 v p_5.1.40 reverse output current 13) fixed voltage versions i reverse ?1020a v out = v out,nom ; v in < v out,nom ; t j =25c p_5.1.41 adjustable voltage version i reverse ?510a v out =1.22v; v in < 1.22 v; t j =25c 3) p_5.1.42 table 4 electrical characteristics (cont?d) -40 c < t j < 125 c; all voltages with respect to ground; positive current defined flowing out of pin; unless otherwise specified. parameter symbol values unit note / test condition number min. typ. max.
data sheet 14 rev. 1.1, 2014-10-30 IFX54441 electrical characteristics note: the listed characteristics are ensured over the operating range of the integrated circuit. typical characteristics specified mean valu es expected over the production spread. if not otherwise specified, typical characteristics apply at t a = 25 c and the given supply voltage. output capacitor 11) output capacitance c out 3.3 ? ? f c byp = 0 nf p_5.1.43 esr esr ? 14) ?3 ? ? p_5.1.44 1) this parameter defines the minimum input voltage for whic h the device is powered up and provides the maximum output current of 300 ma. due to the nominal output voltage of 3. 3 v of the fixed voltage version or depending on the chosen setting of the external voltage divider as well as on the appli ed conditions the device may either regulate its nominal output voltage or it may be in tracking mode. for further details please also refer to the v out specification in table 4 . 2) for the IFX54441ejv and IFX54441ldv adjustable versions the dropout voltage for certain output voltage / load conditions will be restricted by the minimum input voltage specification. 3) the adjustable versions of the IFX54441 are tested and spec ified for these conditions with the adj pin connected to the out pin. 4) the operation conditions are li mited by the maximum junction temperature. the regu lated output voltage specification will only apply for conditions where the limit of the maximum juncti on temperature is fulfilled. it will therefore not apply for all possible combinations of input voltage and output current at a given output voltage. wh en operating at maximum input voltage, the output current must be li mited for thermal reasons. the same holds true when operating at maximum output current where the input voltage range must be limited for thermal reasons. 5) to satisfy requirements for minimum input voltage, the adjustable version of the IFX54441 is tested and specified for these conditions with an external resistor divider (two 250 k ? resistors) for an output voltage of 2.44 v. the external resistors will add a 5 a dc load on the output. 6) the dropout voltage is the minimum inpu t to output voltage differential needed to maintain regulation at a specified output current. in dropout, the output voltage will be equal to v in - v dr . 7) gnd-pin current is tested with v in = v out,nom or v in = 2.3 v, whichever is greater, and a current source load. this means that this parameter is tested while being in dropout condition and thus reflects a worst case condition. the gnd-pin current will in most cases decrease slightly at higher input voltag es - please also refer to the corresponding typical performance graphs. 8) the en pin current flows into en pin. 9) the adj pin current flows into adj pin. 10) adj pin connected to out pin. 11) not subject to production test, specified by design. 12) whichever of the two values of v in is greater in order to also satisfy the requirements for v in,min . 13) reverse output current is tested with the in pin grounded a nd the out pin forced to the rated output voltage. this current flows into the out pin and out of the gnd pin. 14) c byp =0nf, c out 3.3 f; please note that for cases where a bypass capacitor at byp is used - dependi ng on the actual applied capacitance of c out and c byp - a minimum requirement for esr may apply. for further details please also refer to the corresponding typical performance graph. table 4 electrical characteristics (cont?d) -40 c < t j < 125 c; all voltages with respect to ground; positive current defined flowing out of pin; unless otherwise specified. parameter symbol values unit note / test condition number min. typ. max.
IFX54441 typical performanc e characteristics data sheet 15 rev. 1.1, 2014-10-30 6 typical performance characteristics dropout voltage v dr versus output current i out guaranteed dropout voltage v dr versus output current i out dropout voltage v dr versus junction temperature t j quiescent current versus junction temperature t j 0 50 100 150 200 250 300 0 50 100 150 200 250 300 350 400 450 500 i out [a] v dr [mv] t j = ?40 c t j = 25 c t j = 125 c 0 50 100 150 200 250 300 0 50 100 150 200 250 300 350 400 450 500 i out [a] v dr [mv] = guaranteed limits t j 25 c t j 125 c ?50 0 50 100 0 50 100 150 200 250 300 350 400 450 500 t j [ c] v dr [mv] i out = 10 ma i out = 50 ma i out = 100 ma i out = 300 ma ?50 0 50 100 0 5 10 15 20 25 30 35 40 45 50 t j [ c] i q [a] v in = 6 v i out = 0 ma . v en = v in
data sheet 16 rev. 1.1, 2014-10-30 IFX54441 typical performanc e characteristics output voltage v out versus junction temperature t j (IFX54441ejv33) output / adj pin voltage v out versus junction temperature t j (IFX54441ejv) quiescent current i q versus input voltage v in (IFX54441ejv33) quiescent current i q versus input voltage v in (IFX54441ejv) ?50 0 50 100 3.24 3.26 3.28 3.3 3.32 3.34 3.36 t j [ c] v out [v] i out = 1 ma ?50 0 50 100 1.2 1.205 1.21 1.215 1.22 1.225 1.23 1.235 1.24 t j [ c] adj pin voltage [v] i out = 1 ma 0 2 4 6 8 10 0 100 200 300 400 500 600 700 800 v in [v] i gnd [a] v out,nom = 3.3 v i out,nom = 0 ma v en = v in t j = 25 c 0 5 10 15 20 0 5 10 15 20 25 30 35 40 v in [v] i gnd [a] v out,nom = 1.22 v r load = 250 k v en = v in t j = 25 c
IFX54441 typical performanc e characteristics data sheet 17 rev. 1.1, 2014-10-30 gnd current i gnd versus input voltage v in (IFX54441ejv33) gnd current i gnd versus input voltage v in (IFX54441ejv) gnd current i gnd versus input voltage v in (IFX54441ejv33) gnd current i gnd versus input voltage v in (IFX54441ejv) 0 2 4 6 8 10 0 200 400 600 800 1000 1200 v in [v] i gnd [a] [* for v out = 3.3 v] t j = 25 c r load = 3.3 k / i out = 1 ma* r load = 330 / i out = 10 ma* r load = 66 / i out = 50 ma* 0 2 4 6 8 10 0 50 100 150 200 250 300 350 400 v in [v] i gnd [a] [* for v out = 1.22 v] t j = 25 c r load = 1.22 k / i out = 1 ma* r load = 122 / i out = 10 ma* r load = 24.4 / i out = 50 ma* 0 2 4 6 8 10 0 1 2 3 4 5 6 7 8 v in [v] i gnd [ma] [* for v out = 3.3 v] t j = 25 c r load = 33.0 / i out = 100 ma* r load = 11.0 / i out = 300 ma* . 0 2 4 6 8 10 0 1 2 3 4 5 6 7 8 v in [v] i gnd [ma] [* for v out = 1.22 v] t j = 25 c r load = 12.2 / i out = 100 ma* r load = 4.07 / i out = 300 ma* .
data sheet 18 rev. 1.1, 2014-10-30 IFX54441 typical performanc e characteristics gnd current i gnd versus output current i out en pin threshold (on-to-off) versus junction temperature t j en pin threshold (off-to-on) versus junction temperature t j en pin input current versus en pin voltage v en 0 50 100 150 200 250 300 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 i out [ma] i gnd [ma] v in = v out,nom + 1 v t j = 25 c ?50 0 50 100 0 0.2 0.4 0.6 0.8 1 1.2 t j [ c] v en,th [v] 1 ma 300 ma ?50 0 50 100 0 0.2 0.4 0.6 0.8 1 1.2 t j [ c] v en,th [v] 1 ma 300 ma 0 5 10 15 20 0 0.2 0.4 0.6 0.8 1 1.2 1.4 v en [v] i en [a] t j = 25 c v in = 20 v
IFX54441 typical performanc e characteristics data sheet 19 rev. 1.1, 2014-10-30 en pin input current versus junction temperature t j current limit versus input voltage v in current limit versus junction temperature t j reverse output current versus output voltage v out ?50 0 50 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 t j [ c] i en [a] v en = 20 v 0 1 2 3 4 5 6 7 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 v in [v] i out,max [a] v out = 0 v t j = 25 c ?50 0 50 100 0 0.2 0.4 0.6 0.8 1 1.2 t j [ c] i out,max [a] v in = 7 v v out = 0 v 0 2 4 6 8 10 0 10 20 30 40 50 60 70 80 90 v out [v] i out,rev [a] v in = 0 v t j = 25 c v out.nom = 1.22 v (adj) v out.nom = 3.3 v (v33)
data sheet 20 rev. 1.1, 2014-10-30 IFX54441 typical performanc e characteristics reverse output current versus junction temperature t j minimum input voltage 1) versus junction temperature t j 1) v in ,min is referred here as the minimum input volt age for which the requested current is provided and v out reaches 1 v. load regulation versus junction temperature t j adjust pin bias current i adj versus junction temperature t j ?50 0 50 100 0 2 4 6 8 10 12 14 16 18 20 t j [ c] i out,rev [a] v in = 0 v v out.nom = 1.22 v (adj) v out.nom = 3.3 v (v33) ?50 0 50 100 0 0.5 1 1.5 2 2.5 3 t j [ c] v in,min [v] i out = 1 ma i out = 300 ma ?50 0 50 100 ?25 ?20 ?15 ?10 ?5 0 5 t j [ c] v load [mv] i load = 1 ma to 300 ma v33: v in = 4.3 v v out.nom = 3.3 v adj: v in = 2.3 v v out.nom = 1.22 v ?50 0 50 100 0 20 40 60 80 100 120 140 t j [ c] i adj [na]
IFX54441 typical performanc e characteristics data sheet 21 rev. 1.1, 2014-10-30 esr stability versus output current i out (for c out =3.3f) esr( c out ) with c byp = 10 nf versus output capacitance c out input ripple rejection psrr versus frequency f input ripple rejection psrr versus junction temperature t j esr max c byp = 0 nf esr min c byp = 0 nf esr max c byp = 10 nf esr min c byp = 10 nf 0 50 100 150 200 250 300 10 ?1 10 0 10 1 i out [ma] esr(c out ) [ ] c out = 3.3 f (0.06 is measurement limit) 2 3 4 5 6 7 0 0.5 1 1.5 2 2.5 3 c out [f] esr(c out ) [ ] stable region above blue line c byp = 10 nf measurement limit i out = 300ma c byp = 0 nf i out = 300ma c byp = 10nf i out = 50ma c byp = 0 nf i out = 50ma c byp = 10nf 10 100 1k 10k 100k 0 10 20 30 40 50 60 70 80 90 100 f [hz] psrr [db] v in = v outnom + 1.5 v v ripple = 0.5 v pp c out = 10 f ?50 0 50 100 56 58 60 62 64 66 68 70 72 t j [ c] psrr [db] v in = v outnom + 1.5 v v ripple = 0.5 v pp f ripple = 120 hz c out = 10 f i out = 300ma; c byp = 0 nf i out = 300ma; c byp = 10nf
data sheet 22 rev. 1.1, 2014-10-30 IFX54441 typical performanc e characteristics output noise spectral density (adj) versus frequency ( c out =10f, i out =50ma 1) ) 1) load condition 50 ma is representing a worst case cond ition with regard to output voltage noise performance. output noise spectral density (adj) versus frequency ( c out =22f, i out =50ma 1) ) output noise spectral density (3.3 v) versus frequency ( c out =10f, i out =50ma 1) ) output noise spectral density (3.3 v) versus frequency ( c out =22f, i out =50ma 1) ) c byp = 0 nf; esr(c out )=0 c byp = 10 nf; esr(c out )=0 c byp = 10 nf; esr(c out )=250m 10 1 10 2 10 3 10 4 10 5 10 ?2 10 ?1 10 0 10 1 f [hz] output spectral noise density v/ hz c out = 10 f i out = 50 ma c byp = 0 nf; esr(c out )=0 c byp = 10 nf; esr(c out )=0 c byp = 10 nf; esr(c out )=250m output spectral noise density v/ hz c out = 22 f i out = 50 ma c byp = 0 nf; esr(c out )=0 c byp = 10 nf; esr(c out )=0 c byp = 10 nf; esr(c out )=250m output spectral noise density v/ hz c out = 10 f i out = 50 ma c byp = 0 nf; esr(c out )=0 c byp = 10 nf; esr(c out )=0 c byp = 10 nf; esr(c out )=250m output spectral noise density v/ hz c out = 22 f i out = 50 ma
IFX54441 typical performanc e characteristics data sheet 23 rev. 1.1, 2014-10-30 transient response c byp = 0nf (IFX54441ejv33) transient response c byp = 10nf (IFX54441ejv33) -0,3 -0,2 -0,1 0 0,1 0,2 0,3 0 100 200 300 400 500 600 700 800 900 1000 v out deviation / [v] time ( s) c out = 10 f c byp = 0 nf v in = 6 v 0 50 100 150 200 250 300 350 400 0 100 200 300 400 500 600 700 800 900 1000 load step / [ma] time ( s) i out : 100 to 300ma -0,15 -0,1 -0,05 0 0,05 0,1 0,15 0 20406080100120140160180200 v out deviation / [v] time / [ s] c out = 10 f c byp = 10 nf v in = 6v 0 50 100 150 200 250 300 350 400 0 20406080100120140160180200 load step / [ma] time / [ s] i out : 100 to 300ma
data sheet 24 rev. 1.1, 2014-10-30 IFX54441 application information 7 application information note: the following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. figure 5 typical application circuit IFX54441 (fixed voltage version) figure 6 typical application circui t IFX54441 (adjustable version) note: this is a very simplified example of an applicatio n circuit. the function must be verified in the real application 1)2) . 1) please note that in case a non-negligible inductance at in pin is present, e.g. due to long cables, traces, parasitics, etc, a bigger input capacitor c in may be required to filter its influence. as a rule of thumb if the in pin is more than six inches away from the main input filter capac itor an input capacitor value of c in = 10 f is recommended. 2) for specific needs a small optional resistor may be placed in series to very low esr output capacitors c out for enhanced noise performance (for details please see ?bypass capacitance and low noise performance? on page 25 ). r load c byp c out c in in gnd out en sense byp IFX54441 v in gnd 10nf 10f 1f v out r load c byp c in in gnd out en adj byp IFX54441 (adj) v in gnd 10nf 10f 1f c out v out r 1 r 2 calculation of v out : v out = 1.22v x (1 + r 2 / r 1 ) + (i adj x r 2 )
IFX54441 application information data sheet 25 rev. 1.1, 2014-10-30 the IFX54441 is a 300 ma low dropout regulator with very low quiescent current an d enable-functionality. the device is capable of supplying 300 m a at a dropout voltage of 270 mv. ou tput voltage noise numbers down to 24 v rms can be achieved over a 10 hz to 100 khz bandwi dth with the addition of a 10 nf reference bypass capacitor. the usage of a re ference bypass capacitor will additionally im prove transient respon se of the regulator, lowering the settling time for transient load conditions. the device has a low operating quiescent current of typical 30 a that drops to less than 1 a in shutdown (en-pin pulle d to low level). the device also incorporates several protection features which makes it idea l for battery-powered systems. it is protected against bo th reverse input and reverse output voltages. in battery backup applications where the output can be held up by a backup battery when the input is pulled to ground the device behaves li ke it has a diode in series with its output and prevents reverse current flow. 7.1 adjustable operation the adjustable version of the IFX54441 has an output voltage range of 1.22 v to 20 v - v dr . the output voltage is set by the ratio of two external resistors, as it can be seen in figure 6 (for the calculation of v out the formula given in the figure can be used). the device controls th e output to maintain the adj pin at 1.22 v referenced to ground. the current in r 1 is then equal 1.22 v / r 1 and the current in r 2 equals the current in r 1 plus the adj pin bias current. the adj pin bias current, which is ~ 60 na @ 25c, flows through r 2 into the adj pin. the value of r 1 should be not greater than 250 k ? in order to minimize errors in the ou tput voltage caused by the adj pin bias current. note that when the device is shutdown (i.e. low level applied to en pin) the output is turned off and consequently the divider current will be zero. for details of the adj pin bias current see also the corresponding typical performance graph figure ?adjust pin bias current i adj versus junction temperature t j ? on page 20 . 7.2 kelvin sense connection for the fixed voltage version of the IFX54441 the sense pin is the input to the error amplifier. an optimum regulation will be obtained at the point wh ere the sense pin is connected to the ou t pin of the regulator. in critical applications however small voltage drop s can be caused by the resistance r p of the pc-traces and thus may lower the resulting voltage at the load. this effect may be elim inated by connecting the sense pin to the output as close as possible at the load (see figure 7 ). please note that the voltage drop across th e external pc trace will add up to the dropout voltage of the regulator. figure 7 kelvin sense connection 7.3 bypass capacitance and low noise performance the IFX54441 regulator may be used in combination with a bypass capacitor connecting the out pin to the byp pin in order to minimize output voltage noise 1) .this capacitor will bypass the reference of the regulator, providing 1) a good quality low leakage capacitor is recommended. c in in gnd out en sense byp IFX54441 v in r load c out r p r p
data sheet 26 rev. 1.1, 2014-10-30 IFX54441 application information a low frequency noise pole. the noise pol e provided by such a bypass capaci tor will lower the output voltage noise in the considered band width. for a given output volt age actual numbers of the out put voltage noise will - next to the bypass capacitor itself - be depe ndent on the capacitance of the applied output capac itor and its esr: in case of the IFX54441ejv applied with unity gain (i.e. v out = 1.22 v) the usage of a bypass capacitor of 10 nf in combination with a (low esr) ceramic c out of 10 f will result in output voltage noise numbers of typical 41 v rms . this output noise level ca n be reduced to typical 28 v rms under the same conditions by adding a small resistor of ~250 m ? in series to the 10 f ceramic output capa citor acting as additional esr. a reduction of the output voltage noise can also be achieved by increasing capacitanc e of the output capacitor. for c out =22f (ceramic low esr) the output voltage noise will be typically around 29 v rms and can again be further lowered to 24 v rms by adding a small resistance of ~250 m ? in series to c out . in case of the fix voltage version IFX54441ejv33 the output voltage noise for the described cases vary from 45 v rms down to 30 v rms . for further details please also see ?output voltage noise 11) ? on page 12 ,, of the electrical characteristics. please note that next to reducing the output voltage noise leve l the usage of a bypass capacitor has the additional benefit of improving transient respon se which will be also explai ned in the next chapter. howe ver one needs to take into consideration that on the other hand the regulator start-up time is proportional to the size of the bypass capacitor and slows down to values around 15 ms when using a 10 nf bypass capacitor in combination with a 10 f c out output capacitor. 7.4 output capacitance requirements and transient response the IFX54441 is designed to be stable with a wide range of output capacitors. the esr of the output capacitor is an essential parameter with regard to stability, most notably with sm all capacitors. a mini mum output c apacitor of 3.3 f with an esr of 3 ? or less is recommended to prevent oscilla tions. like in general for ldo?s the output transient response of the IFX54441 will be a function of the outp ut capacitance. larg er values of output capacitance decrease peak deviations and thus improv e transient response for larger load current changes. bypass capacitors, used to decouple individual compon ents powered by t he IFX54441 will increa se the effective output capacitor value. please note th at with the usage of bypass capacitors for low noise operation either larger values of output capacitors are nee ded or a minimum esr requirement of c out may have to be considered (see also figure ?esr( c out ) with c byp = 10 nf versus output capacitance c out ? on page 21 as example). in conjunction with the usage of a 10 nf bypass capacitor an output capacitor c out 6.8 f is recommended. the benefit of a bypass capacitor to the transient response performa nce is impressive and illustrated as one example in figure 8 where the transient response of the IFX54441ejv33 to one and the same load step from 100 ma to 300 ma is shown with and without a 10 nf bypass capacitor: for the gi ven configuration of c out =10f with no bypass capacitor the load step will settle in the range of less than 100 s while for c out = 10 f in conjunction with a 10 nf bypass capacitor the same load step will settle in the range of 10 s. due to the shorter reaction time of the regulator by adding the bypa ss capacitor not only the settling ti me improves but also output voltage deviations due to load steps are sharply reduced. figure 8 influence of c byp : example of transient response to one and the same load step with and without c byp of 10 nf ( i out 100 ma to 300 ma, IFX54441ejv33) -0,3 -0,2 -0,1 0 0,1 0,2 0,3 0 100 200 300 400 500 600 700 800 900 1000 v out deviation / [v] time ( s) c_byp = 0nf c_byp = 10nf c out = 10 f c byp = 0 vs 10nf v in = 6 v
IFX54441 application information data sheet 27 rev. 1.1, 2014-10-30 7.5 protection features the IFX54441 regulators incorporate several protection features which make them ideal for usage in battery- powered circuits. in addition to normal protection features associated with mo nolithic regulators like current limiting and thermal limiting the device is protected against reve rse input voltage, reverse output voltage and reverse voltages from out put to input. current limit protection and thermal overload protection are intended to protect the device against current overload conditions at the output of the device. for normal oper ation the junction temperat ure must not exceed 125c. the input of the device will withstand reverse voltages of 20 v. current fl owing into the device will be limited to less than 1 ma (typically less than 100 a) and no negative voltage will appear at th e output. the device will protect both itself and the load. this provides pr otection against batteries being plugged backwards. the output of the IFX54441 can be pulled below ground wit hout damaging the device. if the input is left open-circuit or grounded, the output can be pulled below ground by 20 v. under such conditions the output of the device by itself behaves like an open circuit with practically no current flowing out of the pin 1) . in more application relevant cases however where the output is either connected to the sense pin (fix voltage variant) or tied either via an external voltage divider or directly to the adj pin (adjusta ble variant) a small current will be present from this origin. in the case of the fixed vo ltage version this current will typically be below 100 a while for the adjustable version it depends on the magnitude of the top re sistor of the external voltage divider 2) . if the input is powered by a voltage source the output will source the short ci rcuit current of the device and will protec t itself by therma l limiting. in this case grounding the en pin will turn off the device and st op the output from sourcing the shor t-circuit current. the adj pin of the adjustabl e device can be pulled above or below grou nd by as much as 7 v without damaging the device. if the input is grounded or left open-circuit, the adj pin will act inside this voltage range like a large resistor (typically 100 k ? ) when being pulled above ground and like a resistor (typically 5 k ? ) in series with a diode when being pulled below ground. in situations where the adj pin is at risk of being pulled outside its absolute maximum ratings 7 v the adj pin current must be limited to 1 ma (e.g. in cases where the adj pin is connected to a resistor divider that would pull the adj pin above it s 7 v clamp voltage). let?s c onsider for example the case where a resistor divider is used to provide a 1.5 v out put from the 1.22 v reference and the output is forced to 20 v. the top resistor of the resistor divider must then be chosen to limit the current into the adj pin to 1 ma or less when the adj pin is at 7 v. the 13 v difference between output and adj pin divided by the 1 ma maximum current into the adj pin requires a minimum resistor value of 13 k ? . in circuits where a backup battery is required, several different input/output conditions can occur. the output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage or is left open-circuit. current flow ba ck into the outp ut will follow the curve as shown in figure 9 below. when the in pin of the fixed voltage version is forced below the out pin, or the out pin is pulled above the in pin, the input current will drop to very small values ? typica lly down to less than 2 a, once v out exceeds v in by some 300 mv or more. this can happen if the input of th e device is connected to a discharged battery and the output is held up by either a backup battery or a second regulator circuit. th e state of the en pi n will have no effect on the reverse output current when the output is pulled above the input. 1) typically < 1 a for the mentioned conditions, v out being pulled below ground with other pins either grounded or open. 2) in case there is no external voltage divider applied i.e. th e adj pin is directly connected to the output and the output is pulled below ground by 20 v the current flowing out of the adj pin will be typically ~ 4 ma. please ensure in such cases that the absolute maximum ratings of the adj pin are respected.
data sheet 28 rev. 1.1, 2014-10-30 IFX54441 application information figure 9 reverse output current 0 2 4 6 8 10 0 10 20 30 40 50 60 70 80 90 v out [v] i out,rev [a] v in = 0 v t j = 25 c v out.nom = 1.22 v (adj) v out.nom = 3.3 v (v33)
IFX54441 package outlines data sheet 29 rev. 1.1, 2014-10-30 8 package outlines figure 10 pg-dso-8 exposed pad package outlines figure 11 pg-tson-10 package outlines green product (rohs compliant) to meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. green products are rohs-compliant (i.e pb-free finish on leads and suitable for pb-free soldering according to ipc/jedec j-std-020). pg-dso-8-27-po v01 14 85 8 14 5 8x 0.41 0.0 9 2) m 0.2 d c a-b 1.27 c stand off +0 -0.1 0.1 (1.45) 1.7 max. 0.08 seating plane c a b 4. 9 0.1 1) a-b c 0.1 2x 3 ) jedec reference ms-012 variation ba 1) does not include plastic or metal protrusion of 0.15 max. per side 2) dambar protrusion shall be maximum 0.1 mm total in excess of lead width bottom view 0.2 3 0.2 2.65 0.2 0.2 d 6 m d 8x 0.64 0.25 3. 9 0.1 1) 0.1 0.35 x 45? cd2x +0.06 0.1 9 8 ? max. index marking pin 1 m a rking pin 1 m a rking pg-t s on-10-2-po v02 0.1 0.2 0.1 0.25 0.1 0.55 0.96 0.1 2.5 8 0.1 0 +0.05 0.1 0.1 0. 3 6 0.1 0.5 3 0.1 0.1 0.25 0.5 0.1 3 . 3 0.1 3 . 3 0.1 1 0.1 0.71 0.1 1.6 3 0.1 1.4 8 0.1 z 0.05 0.07 min. z (4:1) for further info rmation on alternative pa ckages, please visit our website: http://www.infineon.com/packages . dimensions in mm
data sheet 30 rev. 1.1, 2014-10-30 IFX54441 revision history 9 revision history revision date changes 1.1 2014-10-30 updated data sheet includin g additional package type pg-tson-10: ? pg-tson-10 package variants added: product overview, pin configuration thermal resistance, wording, etc, added / updated accordingly. ? footnote 7) on page 14 reworked. ? application information updated: clari fication and correction of wording. typical values updated and footnotes added. ? editorial changes throughout the document. 1.0 2014-03-12 data sheet - initial release
edition 2014-10-30 published by infineon technologies ag 81726 munich, germany ? 2014 infineon technologies ag all rights reserved. legal disclaimer the information given in this docu ment shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infine on technologies hereby disclaims any and all warranties and liabilities of any kind, including witho ut limitation, warranties of non-infrin gement of intellectua l property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. the infineon technologies component descr ibed in this data sheet may be used in life-support devices or systems and/or automotive, aviation and aero space applications or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life- support automotive, aviation and aerospace device or system or to affect the safety or effectiveness of that device or system. life support devices or syste ms are intended to be implanted in th e human body or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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