cystech electronics corp. spec. no. : c619m65 issued date : 2015.10.28 revised date : page no. : 1/7 HBP1804M65 cystek product specification octuple high voltage pnp epitaxial planar transistor HBP1804M65 description ? high breakdown voltage. (bv ceo =-400v) ? low saturation voltage, typical v ce(sat) =-0.17v at ic/i b =-20ma/-1ma. ? complementary to hbn1803m65 ? pb-free lead plating and halogen-free package equivalent circuit outline miswb6 5-18l-a bottom view top view HBP1804M65
cystech electronics corp. spec. no. : c619m65 issued date : 2015.10.28 revised date : page no. : 2/7 HBP1804M65 cystek product specification the following ratings and characteristics apply to each transistor in this device. absolute maximum ratings (ta=25 c) parameter symbol limits unit collector-base voltage v cbo -400 v collector-emitter voltage v ceo -400 v emitter-base voltage v ebo -5 v collector current i c -300 ma total power dissipation pd 1.5 w junction temperature tj 150 c storage temperature tstg -55~+150 c characteristics (ta=25 c) symbol min. typ. max. unit test conditions bv cbo -400 - - v i c =-50 a bv ceo -400 - - v i c =-1ma bv ebo -5 - - v i e =-50 a i cbo - - -100 na v cb =-400v i ces - - -100 na v ce =-300v, r eb =0 i ebo - - -100 na v eb =-5v *v ce(sat) - -0.17 -0.3 v i c =-20ma, i b =-1ma *v ce(sat) - -0.18 -0.3 v i c =-50ma, i b =-5ma *v ce(sat) - -0.18 -0.3 v i c =-100ma, i b =-20ma *v be(sat) - -0.73 -1 v i c =-20ma, i b =-2ma *h fe 50 - 300 - v ce =-10v, i c =-10ma *h fe 40 - - - v ce =-10v, i c =-100ma f t - 100 - mhz v ce =-10v, i c =-10ma, f=5mhz cob - 4.6 - pf v cb =-10v, i e =0a, f=1mhz *pulse test: pulse width 380 s, duty cycle 2%
cystech electronics corp. spec. no. : c619m65 issued date : 2015.10.28 revised date : page no. : 3/7 HBP1804M65 cystek product specification typical characteristics emitter grounded output characteristics 0 0.02 0.04 0.06 0.08 0.1 0.12 0123456 -vce, collector-to-emitter voltage(v) -ic, collector current(a) 1ma 1.5ma 2.5ma 5ma -ib=500ua emitter grounded output characteristics 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 0123456 -vce, collector-to-emitter voltage(v) -ic, collector current(a) 4ma 6ma 10ma 20ma -ib=2ma current gain vs collector current 1 10 100 1000 0.1 1 10 100 1000 -ic, collector current(ma) hfe, current gain tj=125c 75c 25c 0c -40c -vce=5v current gain vs collector current 10 100 1000 0.1 1 10 100 1000 -ic, collector current(ma) hfe, current gain tj=125c 75c 25c 0c -40c - vce=10v saturation voltage vs collector current 10 100 1000 0.1 1 10 100 1000 -ic, collector current(ma) -vcesat, saturation voltage(mv) vcesat@ic=10ib ?\ 40 c ????? 0 c ???25 c ???75 c ? 125 c saturation voltage vs collector current 10 100 1000 0.1 1 10 100 1000 -ic, collector current(ma) -vcesat, saturation voltage(mv) -40c 0c 25c 75c 125c vcesat@ic=20ib
cystech electronics corp. spec. no. : c619m65 issued date : 2015.10.28 revised date : page no. : 4/7 HBP1804M65 cystek product specification typical characteristics(cont.) saturation voltage vs collector current 100 1000 10000 0.1 1 10 100 1000 -ic, collector current(ma) -vbesat,saturation voltage(mv) vbesat@ic=10ib -40c 0c 25c 75c 125c on voltage vs collector current 100 1000 10000 0.1 1 10 100 1000 -ic, collector current(ma) -vbeon, on voltage(mv) vbeon@vce=-10v \ 40 c ????0 c ???25 c ???75 c ? 125 c capacitance vs reverse-biased voltage 1 10 100 0.1 1 10 100 -vr, reverse-biased voltage(v) capacitance(pf) cib cob power derating curve 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0 50 100 150 200 ta, ambient temperature() pd, power dissipation(mw)
cystech electronics corp. spec. no. : c619m65 issued date : 2015.10.28 revised date : page no. : 5/7 HBP1804M65 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c619m65 issued date : 2015.10.28 revised date : page no. : 6/7 HBP1804M65 cystek product specification recommended wave solderirecommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of the package, measured on the package body surface.
cystech electronics corp. spec. no. : c619m65 issued date : 2015.10.28 revised date : page no. : 7/7 HBP1804M65 cystek product specification miswb6 5-18l-a dimension marking: 18-lead miswb6 5-18l-a plastic surface mounted package cystek package code: m65 date code millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.700 0.800 0.028 0.031 k 3.750 ref 0.148 ref a1 0.000 0.046 0.000 0.002 b 0.250 0.350 0.010 0.014 a3 0.110 ref 0.004 ref e 0.0531 0.0689 1.35 1.75 d 4.900 5.100 0.193 0.201 l 0.650 bsc 0.026 bsc e 5.900 6.100 0.232 0.240 l1 0.075 ref 0.003 ref notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing spec ification or packing method, please cont act your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitab le for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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