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rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a AD53522 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ? analog devices, inc., 2002 high-speed dual pin electronic functional block diagram driver comparator v/i v/i active load 1.0 a/k v cc v cc v cc v ee v ee v ee AD53522 vhdcpl out vldcpl pwrgnd 9 hqgnd vcom_s therm * +1 vh vterm data datab iod iodb rld rldb vl hcomp vcco qh qhb ql qlb lcomp vcom iolc ioxrtn inhl inhlb iohc vcl vch prot_hi prot_lo pwrd gnd_rotdr_gnd thermstart * only 1 (one) therm per device features 1000 mhz toggle rate driver/comparator/active load and dynamic clamp included inhibit mode function 100-lead lqfp package with built-in heat sink driver 48 output resistance 800 ps tr/tf for a 3 v step comparator 1.1 ns propagation delay at 3 v load 40 ma voltage programmable current range 50 ns settling time to 15 mv applications automatic test equipment semiconductor test systems board test systems instrumentation and characterization equipment product description the AD53522 is a complete, high-speed, single-chip solution that performs the pin electronics functions of driver, comparator, and active load (dcl) for ate applications. in addition, the driver contains a dynamic clamp function and the active load contains an integrated schottky diode bridge. the driver is a proprietary design that features three active states: data high mode, data low mode, and term mode, as well as an inhibit state. in conjunction with the integrated dy namic clamp this facilitates the implementation of a high-speed active termination. the output voltage range is ?.5 v to +6.5 v to accommodate a wide variety of test devices. the dual comparator, with an input range equal to the driver output range, features pecl compatible outputs. signal tracking capability is in the range of 3 v/ns. the active load can be set for up to 40 ma load current. i oh , i ol , and the buffered vcom are independently adjustable. on-board schottky diodes provide high-speed switching and low capacitance. also included on the chip is an on-board temperature sensor that gives an indication of the silicon surface temperature of the dcl. this information can be used to m easure jc and ja or flag an alarm if proper cooling is lost. output from the sensor is a current sink that is proportional to absolute temperature. the gain is trimmed to a nominal value of 1.0 a/k ? . as an example, the output current can be sensed by using a 10 k ? resistor connected from 10 v to the therm (i out ) pin. a voltage drop across the resistor will be developed that equals: 10 k ? 1 a/k ? = 10 v/k ? = 2.98 v at room temperature.
rev. 0 C2C AD53522?pecifications driver 1 (t j = 85 c 5 c, +v s = +10.5 v 1%, ? s = ?.5 v 1%, vcco = 3.3 v unless otherwise noted.) spec spec 3 no. parameter conditions min typ 2 max unit perf differential input characteristics (data to datab, iod to iodb, rld to rldb) 1 voltage range note: inputs are from same logic 0 +3.3 v n type family 2 differential voltage with note: ac tests performed 400 600 1000 mv p lvpecl levels 3 bias current v in = 1.5 v, 2.5 v ?50 +250 ap reference inputs 4 bias currents max value measured ?0 +50 ap during linearity tests output characteristics 10 logic high range data = h, vh = ?.4 v to +6.5 v, ?.4 +6.5 v p vl = ?.5 v (vt = 0 v, vh meets test 20, 21, and 22 specs) 11 logic low range data = l, vl = ?.5 v to +6.4 v, ?.5 +6.4 v p vh = 6.5 v (vt = 0 v, vl meets test 30, 31, and 32 specs) 12 amplitude [vh?l] vl = ?.05 v, vh = +0.05 v, +0.1 +7.0 v p vt = 0 v and vl = ?.5 v, vh = +6.5 v, vt = 0 v absolute accuracy 20 vh offset data = h, vh = 0 v, vl = ?.5 v, ?0 +50 mv p vt = +3 v 21 vh gain error data = h, vh = ?.4 v to +6.5 v, ?.3 +0.3 % of vh p vl = ?.5 v, vt = +3 v 22 linearity error data = h, vh = ?.4 v to +6.5 v, ? +5 mv p vl = ?.5 v, vt = +3 v 30 vl offset data = l, vl = 0 v, vh = 6.5 v, ?0 +50 mv p vt = 3 v 31 vl gain error data = l, vl = ?.5 v to +6.4 v, ?.3 +0.3 % of vl p vh = +6.5 v, vt = +3 v 32 linearity error data = l, vl = ?.5 v to +6.4 v, ? +5 mv p vh = +6.5 v, vt = +3 v 33 offset temperature coefficient vl = 0 v, vh = 5 v, vt = 0 v 0.5 mv/ cn output resistance 40 vh = ?.3 v vl = ?.5 v, vt = 0 v, i out = +1, +46 +50 ? n +30 ma 41 vh = +6.5 v vl = ?.5 v, vt = 0 v, i out = ?, +46 +50 ? p ?0 ma 42 vl = ?.5 v vh = +6.5 v, vt = 0 v, i out = +1, +46 +50 ? p +30 ma 43 vl = +6.4 v vh = +6.5 v, vt = 0 v, i out = ?, +46 +50 ? n ?0 ma 44 vh = +2.5 v vl = 0 v, vt = 0 v, i out = ?0 ma +47.5 ? p (trim point) 50 dynamic current limit cbyp = 39 nf, vh = +6.5 v, +100 ma n vl = ?.5 v, vt = 0 v 51 static current limit output to ?.5 v, vh = +6.5 v, ?20 ?0 ma p vl = ?.5 v, vt = 0 v, data = h 52 static current limit output to +6.5 v, vh = +6.5 v, +60 +120 ma p vl = ?.5 v, vt = 0 v, data = l
rev. 0 C3C spec spec 3 no. parameter conditions min typ 2 max unit perf vterm 60 voltage range term mode, vterm = ?.3 v ?.3 +6.3 v p to +6.3 v, vl = 0 v, vh = +3 v (vterm meets test 61, 62, and 63 specs) 61 vterm offset term mode, vterm = 0 v, ?0 +50 mv p vl = 0 v, vh = 3 v 62 vterm gain error term mode, vterm = ?.3 v ?.3 +0.3 % of v set p to +6.3 v, vl = 0 v, vh = +3 v 63 vterm linearity error term mode, vterm = ?.3 v 5 +5 mv p to +6.3 v, vl = 0 v, vh = +3 v 64 offset temperature coefficient vterm = 0 v, vl = 0 v, vh = 3 v +0.5 mv/ cn 70 output resistance dc i out = +30 ma, ? ma, vterm = +46 +50 ? ?.3 v, vh = 3 v, vl = 0 v n i out = ?0 ma, +1 ma, vterm = +6.3 v, vh = 3 v, vl = 0 v n i out = 30 ma, 1 ma, vterm = +2.5 v, vh = 3 v, vl = 0 v p 72 psrr, drive, or term mode +v s , ? s 1% 17.8 mv/v n 73 static current limit output to ?.3 v, vterm = +6.3 v ?20 ?0 ma p 74 static current limit output to +6.3 v, vterm = ?.3 v +60 +120 ma p dynamic performance, drive (vh and vl) 80 propagation delay time measured at 50%, vl = 0 v, 1.25 1.4 1.55 ns p vh = 3 v, into 500 ? 81 propagation delay t.c. measured at 50%, vl = 0 v, 2 ps/ cn vh = 3 v, into 500 ? 82 delay matching, edge-to-edge measured at 50%, vl = 0 v, 200 ps p vh = 3 v, into 500 ? rise and fall times 90 200 mv swing measured 20%?0%, vl = ?.1 v, 0.25 ns n vh = +0.1 v, into 50 ? 91 1 v swing measured 20%?0%, vl = 0 v, 0.3 ns n vh = 1 v, into 50 ? 92 3 v swing measured 10%?0%, vl = 0 v, 0.8 ns n vh = 3 v, into 50 ? 93 3 v swing measured 10%?0%, vl = 0 v, 0.8 ns n vh = 3 v, into 500 ? 93a 3 v swing measured 20%?0%, vl = 0 v, 0.450 0.560 0.670 ns p vh = 3 v, into 500 ? 94 5 v swing measured 10%?0%, vl = 0 v, 1.2 1.5 ns n vh = 5 v, into 500 ? rise and fall time temperature coefficient 100 1 v swing (per test 91) 2 ps/ cn 101 3 v swing (per test 92) 2 ps/ cn 102 5 v swing (per test 94) 4 ps/ cn 110 overshoot and preshoot vl, vh = ?.1 v, +0.1 v, 0 ?50 0 + 50 % of step n driver terminated into 50 ? + mv vl, vh = 0.0 v, 3 v, ?.0 ?50 +6.0 + 50 % of step n driver terminated into 50 ? + mv setting time 120 to 15 mv vl = 0 v, vh = 0.5 v, driver 50 ns n terminated into 50 ? 121 to 4 mv vl = 0 v, vh = 0.5 v 10 sn AD53522
rev. 0 C4C AD53522 specifications (continued) driver 1 (continued) spec spec 3 no. parameter conditions min typ 2 max unit perf 130 delay change vs. pulsewidth vl/vh = 0/3, pw = 2.5 ns/7.5 ns, 25 75 ps n 30 ns/90 ns, dc = 25% 131 delay change vs. duty cycle vl = 0 v, vh = 3 v, duty cycle 25 ps n (dc) 5 to 95%, t = 40 ns minimum width pulse 140 1 v swing meas 50% point width 0.6 ns n v out ac swing = 0.9 v out dc 141 3 v swing swing terminated, 50 ? load on 1.5 ns n transmission line 142 toggle rate vh = 1 v, vl = 0 v, terminated 1000 mhz n to 50 ? ,v out > 300 mv p-p dynamic performance, inhibit 150 delay time, active to inhibit measured at 50%, vh = 4 v, 1.7 2.0 ns p vl = 0 v, vtt = 2 151 delay time, inhibit to active measured at 50%, vh = 4 v, 1.7 2.2 ns p vl = 0 v, vtt = 2 152 delay time matching, inhibit to active measured at 50%, vh = 4 v, 150 250 ps p vl = 0 v, vtt = 2 153 delay time matching, active to inhibit measured at 50%, vh = 4 v, 150 250 ps p vl = 0 v, vtt = 2 160 i/o spike vh = 0 v, vl = 0 v 200 mv p-p n 170 rise, fall time, active to inhibit vl = 0 v, vtt = 2 (20%/80% 1.2 ns n of 1 v output) 171 rise, fall time, inhibit to active vh = 4 v, vl = 0 v, vtt = 2 0.6 ns n (20%/80% of 1 v output) dynamic performance, vterm 180 delay time, vh to vterm measured at 50%, vl = vh = 2 v, 1.5 1.9 ns p vterm = 0 v, vtt = 0 v 181 delay time, vl to vterm measured at 50%, vl = vh = 0 v, 1.6 1.9 ns p vterm = 2 v, vtt = 0 v 182 delay time, vterm to vh measured at 50%, vl = vh = 2 v, 1.6 2.0 ns p vterm = 0 v, vtt = 0 v 183 delay time, vterm to vl measured at 50%, vl = vh = 0 v, 1.6 2.0 ns p vterm = 2 v, vtt = 0 v 190 overshoot and preshoot vh/vl, vterm = (0 v, 2 v), ?.0 + 50 +6.0 + 50 % of step n (0 v, 6 v) + mv 191a vterm rise time, vl to vt, normal mode vl, vh = 0 v, vterm = 2 v, 1.0 ns n 20%?0% 191b vterm rise time, vt to vh, normal mode vl, vh = 2 v, vterm = 0 v, 0.6 ns n 20%?0% 192a vterm fall time, vt to vl, normal mode vl, vh = 0 v, vterm = 2 v, 0.6 ns n 20%?0% 192b vterm fall time, vh to vt, normal mode vl, vh = 2v, vterm = 0 v, 1.0 ns n 20%?0%
rev. 0 C5C comparator 1 spec spec 3 no. parameter conditions min typ 2 max unit perf dc input characteristics 200 vcco range 2.0 4.5 n 201 offset voltage (v os ) common-mode voltage = 0 v ?5 +25 mv p 202 offset voltage drift common-mode voltage = 0 v 50 v/ cn 203 hcomp, lcomp over linearity range ?0 +50 ap bias currents 206 voltage range (v cm ) ?.5 +6.5 v p 207 differential voltage (v diff )+7vp 208 gain error v in = ?.5 v to +6.5 v ?.25 0.0 %fsr n 209 linearity error v in = ?.5 v to +6.5 v 2 +2 mv n 210 extended range operation hcomp, lcomp = ?, output ?.0 v p toggle v out from ?.9 v to ?.1 v digital outputs 220 logic ??voltage qx q or qb, 150 ? to gnd, vcco 1.05 vcco ?0.85 v p 150 ? from q to qb 221 logic ??voltage qxb q or qb, 150 ? to gnd, vcco 2.2 vcco ?1.5 v p 150 ? from q to qb 222 logic differential, qx?xb q or qb, 150 ? to gnd, 0.65 0.9 1.15 v p 150 ? from q to qb 225 slew rate q or qb (20 ?80% of output, 380 ps n 150 ? from q to qb) channel comparator switching performance propagation delay 240 input to output v in = 3 v p-p, 2 v/ns 0.7 1.1 ns p 241 propagation delay temp. co. v in = 3 v p-p, 2 v/ns 1.0 ps/ cn prop delay change with respect to: 250 slew rate: 1, 2, 3 v/ns v in = 0 v to 3 v 120 ps n 260 amplitude: 500 mv, 1.0 v, 3.0 v v in = 1.0 v/ns 100 ps n 270 equivalent input rise time v in = 0 v to 2 v, < 80 ps, 275 ps n 20%?0% rise time driver in vterm = 0 v 280 pulsewidth linearity v in = 0 v to 3 v, 2 v/ns, pw = 50 ps n 3, 4, 5, 10 ns, driver hi-z mode 281 settling time settling to 8 mv, v in = 0 v to 25 ns n 3 v, driver hi-z mode 282 hysteresis 6 mv n 290 comparator propagation v in = 0 v to 3 v, 2 v/ns 125 ps p delay matching, hcomp to lcomp input characteristics inhl, inhlb see driver spec no. 1 300 input voltage vioh = 1 v, viol = 1 v, 0 3.3 v p vcom = 2 v, vdut = 0 v 301 inhl, inhlb bias current inhl, inhlb = 0 v, 3.3 v, ?50 +250 ap ac tests 0.2 v and 0.8 v 302 vioh current program range, vdut = 0.8 v, 6.5 v 0 4.0 v p ioh = 0 ma to ?0 ma AD53522
rev. 0 C6C AD53522 specifications (continued) active load 1 spec spec 3 no. parameter conditions min typ 2 max unit perf bias current vioh = 0 v, 4 v 303 viol current program range, iol = 0 ma to 40 ma vdut = ?.5 v, +5.2 v 0 4.0 v p 304 ioh, viol input viol = 0 v, 4 v and ?00 +300 ap 305 ioxrtn range iol = +40 ma, ioh = ?0 ma, ?.5, +6.5 v n vdut = ?.5 v, +6.5 v 310 vdut range iol = +40 ma, ioh = ?0 ma, ?.5 +6.5 v p |vdut ?vcom|> 1.3 v 311 vdut range, ioh = vdut ?vcom > 1.3 v 0.8 6.5 v p 0 ma to ?0 ma 312 vdut range, iol = vcom ?vdut > 1.3 v ?.5 +5.2 v p 0 ma to +40 ma output characteristics accuracy 320 gain error, load current, iol, ioh = 25 a ?40 ma, ?.35 +0.35 %i set p normal range vcom = 0 v, vdut = 2 v and calculated at 1 ma and iol = 25 a to 40 ma, vcom = 40 ma points 2 +6.5 v, vdut = +5.2 v and ioh = 25 a to 40 ma, vcom = ?.5 v, vdut = +0.8 v 321 load offset calculated from intercept of 1 ma ?00 +300 ap and 40 ma points 322 load nonlinearity iol, ioh from 25 a to 40 ma ?0 +80 ap 323 output current temperature measured at ioh, iol = 200 a< 3 a/ cn coefficient 324 ioh extended range driver inhibited, ioh = 1 ma, 2 % p change in ioh from vtt = 0 v to vtt = ?.0 v vcom buffer 330 vcom buffer offset error iol, ioh = 40 ma, vcom = 0 v ?0 +50 mv p 331 vcom buffer bias current vcom = 0 v ?0 +20 ap 332 vcom buffer gain error iol, ioh = 40 ma, vcom = 4 +4 % p ?.5 v to +6.5 v 333 vcom buffer linearity error iol, ioh = 40 ma, vcomi = ?0 +10 mv p ?.5 v to +6.5 v dynamic performance propagation delay 340 i max to inhibit vtt = +2 v, vcom = +4/0 v, 1.0 1.3 2.0 ns p iol = +20 ma, ioh = ?0 ma 341 inhibit to i max vtt= +2 v, vcom = +4/0 v, 1.2 1.8 2.4 ns p iol = +20 ma, ioh = ?0 ma 342 propagation delay matching matching = (test 340 value) ?.0 +1.0 ns p (test 341 value) 350 i/o spike vcom = 0 v, iol = +20 ma, 250 mv n ioh = ?0 ma 360 settling time to 15 mv iol = +20 ma, ioh = ?0ma, 50 ns n 50 ? load, to 15 mv 361 settling time to 4 mv iol = +20 ma, ioh = ?0 ma, 10 sn 50 ? load, to 4 mv
rev. 0 C7C dynamic clamp part 1 spec spec 3 no. parameter conditions min typ 2 max unit perf 400 input voltage vch 2 7.5 v p 401 input voltage vcl ?.5 +4 v p 402 input bias current vch/vcl over range spec #401, 402 ?50 +250 ap 410 vch, vcl offset error i test = 1 ma ?50 +250 mv p 411 vch, vcl gain error i test = 1 ma 0.96 1.01 v/v p 420 static current capability 50 75 ma n 430 incremental resistance 11 ma to 21 ma 45 48 52 ? p 440 vchp, vclp protection 0.52 0.64 v p diodes vf @ 500 441 protection diodes max current for information only 2 ma n total function power down 500 pwrd input voltage 0 5 v p 501 pwrd bias current pwrd trip point 1.4 v 0.15 v ?50 +250 ap 503 power-down supply reduction vioh = 0 v, viol = 0 v 35 60 % p 504 power-down output leakage current vioh = 0 v, viol = 0 v, ?0 +20 na p v out = ?.5 v to +5.5 v 505 power-down output leakage current vioh = 0 v, viol = 0 v, ?00 +500 na p v out = 5.5 v to 6.5 v 600 output leakage current, v out = ?.5 v to +6.5 v 1 +1 ap 601 output leakage current, v out = 0 v to 5 v ?00 +500 na p 602 output leakage current, v out = ? v 5 +5 ap 605 output capacitance driver and load inhibited 9.2 pf n 606 output capacitance term driver vterm = 0 v, 2.5 pf n load inhibited power supplies 610 total supply range 15 v n 620 positive supply, vcc +10.5 v n 630 negative supply, vee ?.5 v n 640 positive supply current, vcc driver = inhibit, i load program = 465 570 ma p 40 ma, load = active 650 negative supply current, vee driver = inhibit, i load program = 475 600 ma 40 ma, load = active p 651 comparator supply current overhead, vcco driver = inhibit, i load program = 45 ma p 40 ma, load = active (i vcco (comparator logic output currents)) 660 total power dissipation driver = inhibit, i load program = 7.2 7.9 w p 40 ma, load = active 661 total power dissipation driver = inhibit, i load program = 5.2 5.9 w p 0 ma 700 temperature sensor gain factor r load = 10 k ? , v source = 10.5 v 1 a/k n notes 1 all temperature coefficients are measured at t j = 75 c?5 c. in test figures, voltmeter loading is 1 m ? or greater, scope probe loading is 100 k ? in parallel with 0.6 pf. 2 typical values are not tested or guaranteed. nominal values are generated from design or simulation analyses and/or limited ben ch evaluations and are not tested or guaranteed. 3 spec perf: n = nominal, o = operating condition, t = typical, p = production, max min 4 vterm linearity over the following condition: vl ?6 v < vterm < vh + 6 v 5 all ac input values are referred to the source end of transmission line input. 6 all ac tests are performed with driver in vterm mode except where noted. 7 rise time is calculated sqrt((comp out rt) ** 2?comp in rt) ** 2) specifications are subject to change without notice. AD53522
rev. 0 C8C AD53522 absolute maximum ratings 1 power supply voltage v cc to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.3 v v ee to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 v v cc to v ee . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v vcco to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 v pwrgnd, drgnd, gnd_rot, or hqgnd . . . . 0.4 v outputs v out short circuit duration . . . . . . . . . . . . . . . . . . indefinite 2 v out , inhibit mode . . . . . . . . . . . . . . . . . . . . . . . +8.5 v, ? v v out , inhibit mode . . . . . . . vl ?5.5 v < v out < vh + 5.5 v vhdcpl . . . . . . . . . do not connect except for cap to v cc vldcpl . . . . . . . . . . do not connect except for cap to v ee qh, qhb, ql, qlb maximum i out : continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 ma surge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 ma therm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 v, 0 v driver output capacitance, maximum . . . . . . . . . . . . . . 10 pf inputs data, datab, iod, iodb, rld, rldb . . . (v cco + 1.5 v, v cco ?4.5 v) inhl, inhlb, cmpd . . . . . . . . . . . . . . . . . ?.4 v to +5.5 v pwrd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ?.4 v to +4.5 v data to datab, iod to iodb, rld to rldb . . . . . 3 v inhl to inhlb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 v vh, vl, vterm to gnd (rseries < 500 ? ) . +7.5 v, ?.1 v vh to vl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +8 v, ?.5 v (vh ?vterm) and (vterm ?vl) . . . . . . . . . . . . . . . 8 v reflection clamps high/low . . . . . . . . . . . . . . . . +8.5 v, ? v protection clamp breakdown voltage . . . . . . . . . . . . . . . 12 v protection clamps current . . . . . . . . . . . . . . . . . . . . . 5 ma v out to hcomp or lcomp . . . . . . . . . . . . . . . . . . . 7.8 v environmental operating temperature (junction) . . . . . . . . . . . . . . . . 175 c storage temperature . . . . . . . . . . . . . . . . . . ?5 c to +150 c lead temperature (soldering, 10 sec) 3 . . . . . . . . . . . . . 260 c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. absolute maximum limits apply individually, not in combination. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 output short circuit protection is guaranteed as long as proper heat sinking is employed to ensure compliance with the operating temperature limits. 3 to ensure lead coplanarity ( 0.002 inches) and solderability, handling with bare hands should be avoided and the device should be stored in environments at 24 c 5 c (75 f 10 f) with relative humidity not to exceed 65%. caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the AD53522 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device ordering guide temperature package package model range description option AD53522jsq 0 c to 70 c 100-lead lqfp-edquad sq-100 with integral heat slug table i. driver truth table output data datab iod iodb rld rldb state 01 10xxvl 10 10xxvh x x 0 1 0 1 inh and clamp x x 0 1 1 0 vterm table ii. comparator truth table output states v out qh qhb ql qlb > hcomp > lcomp 1 0 1 0 > hcomp < lcomp 1 0 0 1 < hcomp > lcomp 0 1 1 0 < hcomp < lcomp 0 1 0 1 table iii. active load truth table output states (including diode bridge) vdut inhl inhlb ioh iol i(v out ) vcom 0 1 v(iohc) +10 ma v(iolc) ?0 ma ioh x100 0 0
rev. 0 C9C pin configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 prot_hi1 ioxrtn1 vch1 vcl1 vhdcpl1 out1 vldcpl1 prot_lo1 pwrgnd pwrgnd vcom_s1 therm iolc1 iohc1 100 99 92 91 98 97 96 95 94 93 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 hqgnd inhl1 inhlb1 v ee v cc pwrgnd rld1 iod1 iodb1 data1 datab1 pwrgnd pwrgnd vcom1 vh1 vterm1 vl1 hcomp1 34 35 28 29 30 31 32 33 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 26 27 prot_lo2 pwrgnd pwrgnd vcom_s2 thermstart iolc2 iohc2 hqgnd inhl2 inhlb2 v ee v cc pwrgnd rld2 iod2 iodb2 data2 datab2 pwrgnd pwrgnd vcom2 vh2 vterm2 vl2 hcomp2 pwrgnd pwrgnd pwrgnd pwrgnd gnd_rot pwrgnd pwrgnd dr_gnd2 pwrgnd pwrgnd vldcpl2 out2 vhdcpl2 vcl2 vch2 ioxrtn2 prot_hi2 lcomp1 v cc v cc v ee qhb1 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 qlb1 ql1 rldb1 pwrd1 gnd_rot pwrd2 rldb2 ql2 qlb2 vcco2 qhb2 qh2 v ee v ee v cc v cc AD53522 top view (not to scale) note die is mounted to the back of the heat slug. the package is mounted to the board, heat slug up. v ee qh1 vcco1 lcomp2 dr_gnd heat slug pin 1 identifier AD53522 pin function descriptions pin number mnemonic description 1 prot_hi1 channel 1, output voltage sensing diode 2 ioxrtn1 current return path for the active load for channel 1. typically connected to a power ground. 3 vch1 analog input voltage that sets the reflection clamp high level of channel 1 4 vcl1 analog input voltage that sets the reflection clamp low level of channel 1 5 vhdcpl1 internal supply decoupling for the driver output stage of channel 1. this pin needs to be connected to v cc through a 39 nf (minimum) capacitor. 6 out1 input/output for the driver, window comparator, reflection clamp, and the active load of channel 1 7 vldcpl1 internal supply decoupling for the driver output stage of channel 1. this pin needs to be connected to v ee through a 39 nf (minimum) capacitor. 8 pwrgnd power ground 9 pwrgnd power ground 10 dr_gnd analog ground
rev. 0 C10C AD53522 pin number mnemonic description 11 pwrgnd power ground 12 pwrgnd power ground 13 gnd_rot analog ground 14 pwrgnd power ground 15 pwrgnd power ground 16 dr_gnd analog ground 17 pwrgnd power ground 18 pwrgnd power ground 19 vldcpl2 internal supply decoupling for the driver output stage of channel 2. this pin needs to be connected to v ee through a 39 nf (minimum) capacitor. 20 out2 i nput/output for the driver, window comparator, reflection clamp, and the active load of channel 2 21 vhdcpl2 internal supply decoupling for the driver output stage of channel 2. this pin needs to be con nected to v cc through a 39 nf (minimum) capacitor. 22 vcl2 analog input voltage that sets the reflection clamp high level of channel 2 23 vch2 analog input voltage that sets the reflection clamp high level of channel 2 24 ioxrtn2 current return path for the active load for channel 2. typically connected to a power ground. 25 prot_hi2 channel 2, output voltage sensing diode 26 prot_lo2 channel 2, output voltage sensing diode 27 pwrgnd power ground 28 pwrgnd power ground 29 vcom_s2 analog output voltage that represents a buffered vcom1 input 30 thermstart temperature sensor startup pin. normally not connected 31 iolc2 analog input voltage that programs the channel 2 active load source current 32 iohc2 analog input voltage that programs the channel 2 active load sink current 33 hqgnd clean analog ground for the active load for channel 2 34 inhl2 one of two complementary inputs that control the inhibit mode for the active load bridge of channel 2 35 inhlb2 one of two complementary inputs that control the inhibit mode for the active load bridge of channel 2 36 v ee negative supply terminal 37 v cc positive supply terminal 38 pwrgnd power ground 39 rld2 one of two complementary inputs that control, in conjunction with iod2 and iodb2, the operating mode of the channel 2 driver. refer to the driver truth table for specific conditions. 40 iod2 one of two complementary inputs that control, in conjunction with rld2 and rldb2, the operating mode of the channel 2 driver. refer to the driver truth table for specific conditions. 41 iodb2 one of two complementary inputs that control, in conjunction with rld2 and rldb2, the operating mode of the channel 2 driver. refer to the driver truth table for specific conditions. 42 data2 one of two complementary input that determine the high and low state of the channel 2 driver. driver output is high for data2 > datab2. refer to the driver truth table for specific conditions. 43 datab2 one of two complementary input that determine the high and low state of the channel 2 driver. driver output is high for data2 > datab2. refer to the driver truth table for specific conditions. 44 pwrgnd power ground 45 pwrgnd power ground 46 vcom2 analog input voltage that establishes the commutation voltage for the active load diode bridge for channel 2 47 vh2 analog input voltage that sets the logic 1 level of the driver output limit for channel 2. determines the driver output for data2 > datab AD53522
rev. 0 C11C pin number mnemonic description 48 vterm2 analog input voltage that sets the termination voltage level of the channel 2 driver when in vterm mode 49 vl2 analog input voltage that sets the logic 0 level of the driver output limit for channel 2. deter mines the driver output for datab2 > data2. 50 hcomp2 analog input voltage that sets the logic 1 compare reference for the window comparator of channel 2 51 lcomp2 analog input voltage that sets the logic 0 compare reference for the window comparator of channel 2 52 v cc positive supply terminal 53 v cc positive supply terminal 54 v ee negative supply terminal 55 v ee negative supply terminal 56 qh2 one of two complementary outputs for the logic 1 window comparator of channel 1 57 qhb2 one of two complementary outputs for the logic 1 window comparator of channel 1 58 vcco2 i nput supply voltage for qh2, qhb2, ql2, and qlb2 signals and reference voltage for data2, datab2, iod2, iodb2, rld2, and rldb2 59 qlb2 one of two complementary outputs for the logic 0 window comparator of channel 2 60 ql2 one of two complementary outputs for the logic 0 window comparator of channel 2 61 rldb2 one of two complementary inputs that control, in conjunction with iod2 and iodb2, the operating mode of the channel 2 driver. refer to the driver truth table for specific conditions. 62 pwrd2 power-down control for channel 2 63 gnd_rot analog ground 64 pwrd1 power-down control for channel 1 65 rldb1 one of two complementary inputs that control, in conjunction with iod1 and iodb1, the operating mode of the channel 1 driver 66 ql1 one of two complementary outputs for the logic 0 window comparator of channel 1 67 qlb1 one of two complementary outputs for the logic 0 window comparator of channel 1 68 vcco1 input supply voltage for qh1, qhb1, ql1, and qlb1 signals and reference voltage for data1, datab1, iod1, iodb1, rld1, and rldb1 69 qhb1 one of two complementary outputs for the logic 1 window comparator of channel 1 70 qh1 one of two complementary outputs for the logic 1 window comparator of channel 1 71 v ee negative supply terminal 72 v ee negative supply terminal 73 v cc positive supply terminal 74 v cc positive supply terminal 75 lcomp1 analog input voltage that sets the logic 0 compare reference for the window comparator of channel 1 76 hcomp1 analog input voltage that sets the logic 1 compare reference for the window comparator of channel 1 77 vl1 analog input voltage that sets the logic 0 level of the driver output limit for channel 1. determines the driver output for datab1 > data1. 78 vterm1 analog input voltage that sets the termination voltage level of the channel 1 driver when in vterm mode 79 vh1 analog input voltage that sets the logic 1 level of the driver output limit for channel 1. determines the driver output for data1 > datab1. 80 vcom1 analog input voltage that establishes the commutation voltage for the active load diode bridge for channel 1 81 pwrgnd power ground 82 pwrgnd power ground 83 datab1 one of two complementary inputs that determine the high and low state of the channel 1 driver. driver output is high for data1 > datab1. refer to the driver truth table for specific conditi ons. 84 data1 one of two complementary inputs that determine the high and low state of the channel 1 driver. driver output is high for data1 > datab1. refer to the driver truth table for specific conditions. AD53522
rev. 0 C12C c02786C0C3/02(0) printed in u.s.a. AD53522 100-lead lqfp-edquad (sq-100) top view (pins down) 1 25 26 49 76 100 75 50 0.551 (14.00) bsc 0.630 (16.00) bsc 0.472 (12.00) bsc 0.472 (12.00) bsc 0.011 (0.27) 0.009 (0.22) 0.007 (0.17) 0.020 (0.50) bsc lead pitch 0.551 (14.00) bsc 0.630 (16.00) bsc 7 3.5 0 0.008 (0.20) 0.004 (0.09) 0.057 (1.45) 0.055 (1.40) 0.053 (1.35) 0.006 (0.15) 0.002 (0.05) 0.003 (0.08) max view a rotated 90 ccw seating plane 0.063 (1.60) max view a 0.030 (0.75) 0.024 (0.60) 0.018 (0.45) controlling dimensions are in millimeters. pin number mnemonic description 85 iodb1 one of two complementary inputs that control, in conjunction with rld1 and rldb1, the operating mode of the channel 1 driver. refer to the driver truth table for specific conditions. 86 iod1 one of two complementary inputs that control, in conjunction with rld1 and rldb1, the operating mode of the channel 1 driver. refer to the driver truth table for specific conditions. 87 rld1 one of two complementary inputs that controls, in conjunction with iod1 and iodb1, the operating mode of the channel 1 driver. refer to the driver truth table for specific conditions. 88 pwrgnd power ground 89 v cc positive supply terminal 90 v ee negative supply terminal 91 inhlb1 one of two complementary inputs that control the inhibit mode for the active load bridge of channel 1 92 inhl1 one of two complementary inputs that control the inhibit mode for the active load bridge of channel 1 93 hqgnd clean analog ground for the active load for channel 1 94 iohc1 analog input voltage that programs the channel 1 active load sink current 95 iolc1 analog input voltage that programs the channel 1 active load source current 96 therm temperature sensor output pin. a resistor (10 kw) should be connected between therm and v cc . the approximate die temperature can be determined by measuring the current through the resistor. the typical scale factor is 1 a/k. 97 vcom_s1 analog output voltage that represents a buffered vcom1 input 98 pwrgnd power ground 99 pwrgnd power ground 100 prot_lo1 channel 1 output voltage sensing diode outline dimensions dimensions shown in inches and (mm).

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