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  september 2013 rev 8 1/33 33 VNH3SP30-E automotive fully integrated h-bridge motor driver features output current: 30a 5v logic level compatible inputs undervoltage and overvoltage shutdown overvoltage clamp thermal shut down cross-conduction protection linear current limiter very low standby power consumption pwm operation up to 10 khz protection against loss of ground and loss of v cc package: ecopack ? description the VNH3SP30-E is a full-bridge motor driver intended for a wide range of automotive applications. the device incorporates a dual monolithic high-side driver (hsd) and two low- side switches. the hsd s witch is designed using stmicroelectronics proprietary vipower? m0-3 technology that efficiently integrates a true power mosfet with an intellig ent signal/protection circuit on the same die. the low-side switches are vertical mosfets manufactured using stmicroelectronics proprietary ehd (?stripfet??) process.the three circuits are assembled in a multipowerso- 30 package on electrically isolated lead frames. this package, specifically designed for the harsh automotive environment, offers improved thermal performance thanks to exposed die pads. moreover, its fully symmet rical mechanical design provides superior manufacturability at board level. the input signals in a and in b can directly interface with the microcon troller to select the motor direction and the brake condition. pins diag a /en a or diag b /en b , when connected to an external pull-up resistor, enable one leg of the bridge. they also provide a feedback digital diagnostic signal. the normal condition operation is explained in the speed of the motor can be controlled in all possible conditions by the pwm up to khz. in all cases, a low level state on the pwm pin will turn off both the ls a and ls b switches. when pwm rises to a high level, ls a or ls b turn on again depending on the input pin state. type r ds(on) i out v ccmax VNH3SP30-E 45m ?? max ? per leg) 30a 40v multipowerso-30 ? table 1. device summary package order codes tube tape & reel multipowerso-30 VNH3SP30-E vnh3sp30tr-e www.st.com
contents VNH3SP30-E 2/33 contents 1 block diagram and pins descripti on . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.1 reverse battery protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.2 open load detection in off mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.3 test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.1 multipowerso-30 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.1.1 thermal calculation in clockwise and anti-clockwise operation in steady- state mode 26 4.1.2 thermal resistances definition (values according to the pcb heatsink area) . . . . . . . . . . . . . . . . . . . . . 26 4.1.3 thermal calculation in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.1.4 single pulse thermal impedance definition (values according to the pcb heatsink area) . . . . . . . . . . . . . . . . . . . . . 26 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.1 ecopack? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.2 multipowerso-30 package mechanical data . . . . . . . . . . . . . . . . . . . . . . 29 5.3 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
VNH3SP30-E list of tables 3/33 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. block description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 3. pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. pin functions description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. logic inputs (ina, inb, ena, enb) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 8. pwm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 9. switching (v cc =13v, r load =1.1 ? , unless otherwise specified) . . . . . . . . . . . . . . . . . . 10 table 10. protection and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 11. truth table in normal operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 table 12. truth table in fault conditions (detected on outa). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 13. electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 14. thermal calculation in clockwise and anti -clockwise operation in steady-state mode . . . . 26 table 15. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 16. multipowerso-30 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 17. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
list of figures VNH3SP30-E 4/33 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. definition of the delay times measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 5. definition of the low side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 6. definition of the high side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 7. on state supply current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 8. off state supply current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 9. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 10. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 11. input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 12. input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 13. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 14. high level enable pin current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 15. delay time during change of operation mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 16. enable clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 17. high level enable voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 18. low level enable voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 19. pwm high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 20. pwm low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 21. pwm high level current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 22. overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 23. undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 24. current limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 25. on state high side resistance vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 26. on state low side resistance vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 27. on state high side resistance vs vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 28. on state low side resistance vs vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 29. output voltage rise time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 30. output voltage fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 31. enable output low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 32. on state leg resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 33. typical application circuit for dc to 10 kh z pwm operation short circuit protection . . . . . 20 figure 34. half-bridge configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 35. multi-motors configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 36. waveforms in full bridge operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 37. waveforms in full bridge operation (continued) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 38. multipowerso-30? pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 39. chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 40. auto and mutual rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . 25 figure 41. multipowerso-30 hsd thermal impedance junction ambient single pulse . . . . . . . . . . . . 27 figure 42. multipowerso-30 lsd thermal impedance junction ambient single pulse . . . . . . . . . . . . . 27 figure 43. thermal fitting model of an h-bridge in multipowerso-30 . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 44. multipowerso-30 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 45. multipowerso-30 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 46. multipowerso-30 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 47. multipowerso-30 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
VNH3SP30-E block diagram and pins description 5/33 1 block diagram and pins description figure 1. block diagram table 2. block description name description logic control allows the turn-on and the turn-off of the high side and the low side switches according to the truth table overvoltage + undervoltage shuts down the device outside the range [5.5v..36v] for the battery voltage high side and low side clamp voltage protects the high side and the low side switches from the high voltage on the battery line in all configurations for the motor high side and low side driver drives the gate of the concerned switch to allow a proper r ds(on) for the leg of the bridge linear current limiter limits the motor current by reducing the high side switch gate-source voltage when short-circuit to ground occurs overtemperature protection in case of short-circuit with the increase of the junction?s temperature, shuts down the concerned high side to prevent its degradation and to protect the die fault detection signals an abnormal behavior of the switches in the half-bridge a or b by pulling low the concerned en x /diag x pin
block diagram and pins description VNH3SP30-E 6/33 figure 2. configuration diagram (top view) table 3. pin definitions and functions pin no symbol function 1, 25, 30 out a , heat slug3 source of high side switch a / drain of low side switch a 2, 4, 7, 9, 12, 14, 17, 22, 24, 29 nc not connected 3, 13, 23 v cc , heat slug1 drain of high side switches and power supply voltage 6en a /diag a status of high side and low side switches a; open drain output 5in a clockwise input 8 pwm pwm input 11 in b counter clockwise input 10 en b /diag b status of high side and low side switches b; open drain output 15, 16, 21 out b , heat slug2 source of high side switch b / drain of low side switch b 26, 27, 28 gnd a source of low side switch a (1) 1. gnd a and gnd b must be externally connected together. 18, 19, 20 gnd b source of low side switch b (1)
VNH3SP30-E block diagram and pins description 7/33 table 4. pin functions description name description v cc battery connection gnd a , gnd b power grounds; must always be externally connected together out a , out b power connections to the motor in a , in b voltage controlled input pins with hyster esis, cmos compatible. these two pins control the state of the bridge in normal operation according to the truth table (brake to v cc , brake to gnd, clockwise and counterclockwise). pwm voltage controlled input pin with hysteresis, cmos compatible. gates of low side fets are modulated by the pwm signal during their on phase allowing speed control of the motor. en a /diag a , en b /diag b open drain bidirectional logic pins. these pins must be connected to an external pull up resistor. when externally pulled low, they disable half-bridge a or b. in case of fault detection (thermal shutdown of a high side fet or excessive on state voltage drop across a low side fet), these pins are pulled low by the device (see truth table in fault condition).
electrical specifications VNH3SP30-E 8/33 2 electrical specifications figure 3. current and voltage conventions 2.1 absolute maximum ratings table 5. absolute maximum ratings symbol parameter value unit v cc supply voltage -0.3...40 v i max1 maximum output current (continuous) 30 a i r reverse output current (continuous) -30 i in input current (in a and in b pins) ? 10 ma i en enable input current (diag a /en a and diag b /en b pins) ? 10 i pw pwm input current ? 10 v esd electrostatic discharge (r = 1.5k ? , c = 100pf) ? logic pins ? output pins: out a , out b , v cc 4 5 kv kv t j junction operating temperature internally limited c t c case operating temperature -40 to 150 t stg storage temperature -55 to 150
VNH3SP30-E electrical specifications 9/33 2.2 electrical characteristics vcc = 9v up to 18v; -40c < t j < 150c, unless otherwise specified. table 6. power section symbol parameter test conditions min typ max unit v cc operating supply voltage 5.5 36 v i s supply current off state: in a =in b =pwm=0; t j = 25c; v cc =13v in a =in b =pwm=0 20 30 40 a a on state: in a or in b =5v, no pwm 15 ma r onhs static high side resistance i out = 12a; t j = 25c i out = 12a; t j = -40 to 150c 23 30 60 m ? r onls static low side resistance i out = 12a; t j = 25c i out = 12a; t j = -40 to 150c 11 15 30 v f high side free- wheeling diode forward voltage i f = 12 a0.81.1v i l(off) high side off state output current (per channel) t j =25c; v outx =en x =0v; v cc =13v t j = 125c; v outx =en x =0v; v cc =13v 3 5 a table 7. logic inputs (in a , in b , en a , en b ) symbol parameter test cond itions min typ max unit v il input low level voltage normal operation (diag x /en x pin acts as an input pin) 1.5 v v ih input high level voltage 3.25 v ihyst input hysteresis voltage 0.5 v icl input clamp voltage i in =1ma 6 6.8 8 i in = -1ma -1 -0.7 -0.3 i inl input low current v in =1.5v 1 a i inh input high current v in =3.25v 10 v diag enable output low level voltage fault operation (diag x /en x pin acts as an output pin); i en =1ma 0.4 v
electrical specifications VNH3SP30-E 10/33 table 8. pwm symbol parameter test conditions min typ max unit v pwl pwm low level voltage 1.5 v i pwl pwm low level pin current v pw =1.5v 1 a v pwh pwm high level voltage 3.25 v i pwh pwm high level pin current v pw = 3.25v 10 a v pwhhyst pwm hysteresis voltage 0.5 v v pwcl pwm clamp voltage i pw = 1ma v cc +0.3 v cc +0.7 v cc +1 i pw = -1ma -5 -3.5 -2 v pwtest test mode pwm pin voltage -3.5 -2 -0.5 v i pwtest test mode pwm pin current v in = -2 v -2000 -500 a table 9. switching (v cc =13v, r load =1.1 ? , unless otherwise specified) symbol parameter test conditions min typ max unit f pwm frequency 0 10 khz t d(on) turn-on delay time input rise time < 1s (see figure 6 ) 100 300 s t d(off) turn-off delay time input rise time < 1s (see figure 6 ) 85 255 t r rise time (see figure 5 )1.53 t f fall time (see figure 5 )25 t del delay time during change of operating mode (see figure 4 ) 600 1800 table 10. protection and diagnostic symbol parameter test conditions min typ max unit v usd undervoltage shut-down 5.5 v v ov overvoltage shut-down 36 43 i lim current limitation 30 45 a t tsd thermal shut-down temperature v in = 3.25v 150 170 200 c t tr thermal reset temperature 135 t hyst thermal hysteresis 7 15
VNH3SP30-E electrical specifications 11/33 figure 4. definition of the delay times measurement figure 5. definition of the low side switching times t t v inb v ina t pwm t i load t del t del t f pwm t t v outa, b 20% 90% 80% 10% t r
electrical specifications VNH3SP30-E 12/33 figure 6. definition of the high side switching times t t v outa v ina 90% 10% t d(on) t d(off)
VNH3SP30-E electrical specifications 13/33 note: notice that saturation detection on the low side power mosfet is possible only if the impedance of the short-circuit from the output to the battery is less than 100m ? when the device is supplied with a battery voltage of 13.5v. table 11. truth table in normal operating conditions in a in b diag a /en a diag b /en b out a out b operating mode 1 1 11 h h brake to v cc 0 l clockwise (cw) 0 1 l h counterclockwise (ccw) 0 l brake to gnd table 12. truth table in fault conditions (detected on out a ) in a in b diag a /en a diag b /en b out a out b 1 1 0 1 open h 0l 0 1h 0l x x0 open 1 1 h 0l fault information protection action
electrical specifications VNH3SP30-E 14/33 table 13. electrical transient requirements iso t/r - 7637/1 test pulse test level i test level ii test level iii test level iv test levels delays and impedance 1 -25v -50v -75v -100v 2ms, 10 ? 2 +25v +50v +75v +100v 0.2ms, 10 ? 3a -25v -50v -100v -150v 0.1s, 50 ? 3b +25v +50v +75v +100v 4 -4v -5v -6v -7v 100ms, 0.01 ? 5 +26.5v +46.5v +66.5v +86.5v 400ms, 2 ? iso t/r - 7637/1 test pulse test levels result i test levels result ii test levels result iii test levels result iv 1 c ccc 2 3a 3b 4 5 (1) 1. for load dump exceeding the above value a centralized suppressor must be adopted eee class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
VNH3SP30-E electrical specifications 15/33 2.3 electrical characteristics curves figure 7. on state supply current figure 8. off state supply current figure 9. high level input current figure 10. input clamp voltage figure 11. input high level voltage figure 12. input low level voltage
electrical specifications VNH3SP30-E 16/33 figure 13. input hysteresis voltage figure 14. high level enable pin current figure 15. delay time during change of operation mode figure 16. enable clamp voltage figure 17. high level enable voltage figure 18. low level enable voltage
VNH3SP30-E electrical specifications 17/33 figure 19. pwm high level voltage figure 20. pwm low level voltage figure 21. pwm high level current figure 22. overvoltage shutdown figure 23. undervoltage shutdown figure 24. current limitation
electrical specifications VNH3SP30-E 18/33 figure 25. on state high side resistance vs t case figure 26. on state low side resistance vs t case figure 27. on state high side resistance vs vcc figure 28. on state low side resistance vs vcc figure 29. output voltage rise time figure 30. output voltage fall time
VNH3SP30-E electrical specifications 19/33 figure 31. enable output low level voltage figure 32. on state leg resistance
application information VNH3SP30-E 20/33 3 application information in normal operating conditions the diag x /en x pin is considered as an input pin by the device. this pin must be externally pulled high. pwm pin usage: in all cases, a ?0? on the pwm pin will turn off both ls a and ls b switches. when pwm rises back to ?1?, ls a or ls b turn on again depending on the input pin state. figure 33. typical application circuit for dc to 10 khz pwm operation short circuit protection note: the value of the blocking capacitor (c) depends on the application conditions and defines voltage and current ripple onto supply line at pwm operation. stored energy of th e motor inductance may fly back into the blocking capacitor, if the bridge driver goes into tri-state. this ca uses a hazardous overvoltage if the capacitor is not big enough. as basic orient ation, 500f per 10a load current is recommended. in case of a fault condition the diag x /en x pin is considered as an output pin by the device. the fault conditions are: overtemperature on one or both high sides short to battery condition on the output (saturation detection on the low side power mosfet) c
VNH3SP30-E application information 21/33 possible origins of fault conditions may be: out a is shorted to ground ? overtemperature detection on high side a. out a is shorted to v cc ? low side power mosfet saturation detection (a) . when a fault condition is detected, the user can know which power element is in fault by monitoring the in a , in b , diag a /en a and diag b /en b pins. in any case, when a fault is detected, the faulty leg of the bridge is latched off. to turn on the respective output (out x ) again, the input signal must rise from low to high level. 3.1 reverse battery protection three possible solutions can be considered: 1. a schottky diode d connected to v cc pin 2. an n-channel mosfet connected to the gnd pin (see figure 33: typical application circuit for dc to 10 khz pwm operation short circuit protection on page 20 3. a p-channel mosfet connected to the v cc pin the device sustains no more than -30a in reverse battery conditions because of the two body diodes of the power mosfets. additionally, in reverse battery condition the i/os of VNH3SP30-E will be pulled down to the v cc line (approximately -1.5v). a series resistor must be inserted to limit the current sunk from the microcontroller i/os. if i rmax is the maximum target reverse current through c i/os, the series resistor is: 3.2 open load detection in off mode it is possible for the microcontroller to detect an open load condition by adding a simply resistor (for example, 10k ohm) between one of the outputs of the bridge (for example, out b ) and one microcontroller input. a possible sequence of inputs and enable signals is the following: in a = 1, in b = x, en a = 1, en b = 0. normal condition: out a = h and out b = h open load condition: out a = h and out b = l: in this case the out b pin is internally pulled down to gnd. this condition is detected on out b pin by the microcontroller as an open load fault. a. an internal operational amplifier com pares the drain-source mosfet voltag e with the internal reference (2.7v typ.). the relevant low side power mos is switched o ff when its drain-source voltage exceeds the reference voltage. r v ios v cc ? i rmax --------------------------------- =
application information VNH3SP30-E 22/33 3.3 test mode the pwm pin can be used to test the load connection between two half-bridges. in the test mode (v pwm = -2v) the internal power mos gate drivers are disabled. the in a or in b inputs can be used to turn on the high side a or b, respectively, in order to connect one side of the load at v cc voltage. the check of the voltage on the other side of the load can be used to verify the continuity of the load connection. in case of load disconnection, the diad x /en x pin corresponding to the faulty output is pulled down. figure 34. half-bridge configuration note: the VNH3SP30-E can be used as a high power half-bridge driver achieving an on resistance per leg of 22.5m ? . figure 35. multi-motors configuration note: the VNH3SP30-E can easily be designed in multi-motors driving applications such as seat positioning systems where only one motor must be driven at a time. diag x /en x pins allow to put unused half-bridges in high impedance. m out a out a out b out b v cc pwm diag a /en a in a diag b /en b in b gnd b gnd a gnd b gnd a pwm diag a /en a in a diag b /en b in b m 2 out a out a out b out b v cc pwm diag a /en a in a diag b /en b in b gnd b gnd a gnd b gnd a pwm diag a /en a in a diag b /en b in b m 1 m 3
VNH3SP30-E application information 23/33 figure 36. waveforms in full bridge operation
application information VNH3SP30-E 24/33 figure 37. waveforms in full bridge operation (continued)
VNH3SP30-E package and pcb thermal data 25/33 4 package and pcb thermal data 4.1 multipowerso-30 thermal data figure 38. multipowerso-30? pc board note: layout condition of r th and z th measurements (pcb fr4 area = 58mm x 58mm, pcb thickness = 2mm, cu thickness = 35 ? m, copper areas: from minimum pad layout to 16cm 2 ). figure 39. chipset configuration figure 40. auto and mutual r thj-amb vs pcb copper area in open box free air condition high side chip hs ab low side chip a low side chip b ls a ls b 0 5 10 15 20 25 30 35 40 45 0 5 10 15 20 cm 2 of cu area (refer to pcb layout) c/w rthhs rthls rthhsls rthlsls
package and pcb thermal data VNH3SP30-E 26/33 4.1.1 thermal calculation in clockwis e and anti-clockwise operation in steady-state mode 4.1.2 thermal resistances definition (values according to the pcb heatsink area) r thhs = r thhsa = r thhsb = high side chip thermal resistance junction to ambient (hs a or hs b in on state) r thls = r thlsa = r thlsb = low side chip thermal resistance junction to ambient r thhsls = r thhsalsb = r thhsblsa = mutual thermal resistance junction to ambient between high side and low side chips r thlsls = r thlsalsb = mutual thermal resistance junction to ambient between low side chips 4.1.3 thermal calculation in transient mode (b) t jhsab = z thhs x p dhsab + z thhsls x (p dlsa + p dlsb ) + t amb t jlsa = z thhsls x p dhsab + z thls x p dlsa + z thlsls x p dlsb + t amb t jlsb = z thhsls x p dhsab + z thlsls x p dlsa + z thls x p dlsb + t amb 4.1.4 single pulse ther mal impedance definition (values according to the pcb heatsink area) z thhs = high side chip thermal impedance junction to ambient z thls = z thlsa = z thlsb = low side chip thermal impedance junction to ambient z thhsls = z thhsablsa = z thhsablsb = mutual thermal impedance junction to ambient between high side and low side chips z thlsls = z thlsalsb = mutual thermal impedance junction to ambient between low side chips table 14. thermal calculation in clockwise and anti-clockwise operation in steady- state mode hs a hs b ls a ls b t jhsab t jlsa t jlsb on off off on p dhsa x r thhs + p dlsb x r thhsls + t amb p dhsa x r thhsls + p dlsb x r thlsls + t amb p dhsa x r thhsls + p dlsb x r thls + t amb off on on off p dhsb x r thhs + p dlsa x r thhsls + t amb p dhsb x r thhsls + p dlsa x r thls + t amb p dhsb x r thhsls + p dlsa x r thlsls + t amb b. calculation is valid in an y dynamic operating condition. p d values set by user.
VNH3SP30-E package and pcb thermal data 27/33 equation 1: pulse calculation formula figure 41. multipowerso-30 hsd thermal impedance junction ambient single pulse figure 42. multipowerso-30 lsd thermal impedance junction ambient single pulse z th ? r th ? z thtp 1 ? ? ?? + ? = where ? t p t ? = 0.1 1 10 100 0.001 0.01 0.1 1 10 100 1000 time (sec) c/w 16 cm2 footprint 8 cm2 4 cm2 16 cm2 footprint 8 cm2 4 cm2 zthhs zthhsls 0,1 1 10 100 0,001 0,01 0,1 1 10 100 1000 time (sec) c/w 16 cm2 footprint 8 cm2 4 cm2 16 cm2 footprint 8 cm2 4 cm2
package and pcb thermal data VNH3SP30-E 28/33 figure 43. thermal fitting model of an h-bridge in multipowerso-30 table 15. thermal parameters (1) 1. the blank space means that the val ue is the same as the previous one. area/island (cm 2 )footprint4 8 16 r1 = r7 (c/w) 0.05 r2 = r8 (c/w) 0.3 r3 (c/w) 0.5 r4 (c/w) 1.3 r5 (c/w) 14 r6 (c/w) 44.7 39.1 31.6 23.7 r9 = r10= r15= r16 (c/w) 0.6 r11 = r17 (c/w) 0.8 r12 = r18 (c/w) 1.5 r13 = r19 (c/w) 20 r14 = r20 (c/w) 46.9 36.1 30.4 20.8 r21 = r22 = r23 (c/w) 115 c1 = c7 = c9 = c15 (w.s/c) 0.001 c2 = c8 (w.s/c) 0.005 c3 = (w.s/c) 0.02 c4 = c13 = c19 (w.s/c) 0.3 c5 (w.s/c) 0.6 c6 (w.s/c) 5 7 9 11 c10 = c11= c16 = c17 (w.s/c) 0.003 c12 = c18 (w.s/c) 0.075 c14 = c20 (w.s/c) 2.5 3.5 4.5 5.5
VNH3SP30-E package and packing information 29/33 5 package and packing information 5.1 ecopack? packages in order to meet environmental requirements, st offers these devices in ecopack? packages. these packages have a lead-free second-level interconnect. the category of second-level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com. 5.2 multipowerso-30 package mechanical data figure 44. multipowerso-30 package outline
package and packing information VNH3SP30-E 30/33 figure 45. multipowerso-30 suggested pad layout table 16. multipowerso-30 mechanical data symbol millimeters min typ max a 2.35 a2 1.85 2.25 a3 0 0.1 b 0.42 0.58 c 0.23 0.32 d 17.1 17.2 17.3 e 18.85 19.15 e1 15.9 16 16.1 e1 f1 5.55 6.05 f2 4.6 5.1 f3 9.6 10.1 l 0.8 1.15 n 10deg s 0deg 7deg
VNH3SP30-E package and packing information 31/33 5.3 packing information note: the devices can be packed in tube or tape and reel shipments (see the device summary on page 1 for packaging quantities). figure 46. multipowerso-30 tube shipment (no suffix) figure 47. multipowerso-30 tape and reel shipment (suffix ?tr?) a b c dimension mm tube length ( 0.5) 532 a3.82 b23.6 c ( 0.13) 0.8 reel dimensions dimension mm a (max) 330 b (min) 1.5 c ( 0.2) 13 d (min) 20.2 g (+ 2 / -0) 32 n (min) 100 t (max) 38.4 to p cover tape start no components no components components 500 mm min 500 mm min empty components pockets user direction of feed tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb 1986 description dimension mm tape width w 32 tape hole spacing p0 ( 0.1) 4 component spacing p 24 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 2 hole position f ( 0.1) 14.2 end
revision history VNH3SP30-E 32/33 6 revision history table 17. document revision history date revision description of changes aug-2004 1 initial release of lead-free version based on the vnh3sp30 datasheet (may 2004 - rev.1) aug- 2005 2 modified figure 5 20-dec-2006 3 document converted into new st corporate template. changed document title . changed features on page 1 to add ecopack ? package. added section 1: device block description on page 5. added section 2: pinout description on page 6. added section 3: maximum ratings on page 8. added section 4: electrical characteristics on page 9. added ?low? and ?high? to parameters for i inl and i inh in table 6 on page 9. added section 5: waveforms and truth table on page 12. changed first of two fault conditions in section 5 on page 12. inserted note in figure 4 on page 12. added vertical limitation line to left side arrow of t d(off) to figure 7 on page 17. added section 6: thermal data on page 26. added section 7: package characteristics on page 30. added section 8: packaging information on page 32. updated disclaimer (last page) to include a mention about the use of st products in autom otive applications. 20-jun-2007 4 document reformatted. changed table 6: power section on page 9 : supply current and static resistance values. added table 7: logic inputs (ina, inb, ena, enb) on page 9 : v diag row . deleted enable (logic i/o pin) table. 13-sep-2007 5 updated table 2: block description on page 5 . 15-nov-2007 6 corrected figure 34 note : changed on resistance per leg from 9.5 m ?? to 22.5 m ?? . 06-feb-2008 7 corrected heat slug numbers in table 3: pin definitions and functions . 24-sep-2013 8 updated disclaimer.
VNH3SP30-E 33/33 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems wi th product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com


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