isolated, loop-powered voltage-to-current converter 1b21 rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?1991C2009 analog devices, inc. all rights reserved. features wide input range: 0 v to 1 v up to 0 v to 10 v high cmv isolation: 1500 v rms programmable output ranges: 4ma to 20ma 0 to 20 ma load resistance range: 0 to 1.35 k maximum high accuracy low offset tempco: 300 na/c low gain tempco: 50 ppm/c low nonlinearity: 0.02% high cmr: 90 db minimum small package: 0.7 2.1 0.35 meets ieee standard 472: transient protection (swc) applications multichannel process control daccurrent loop interface analog transmitters and controllers remote data acquisition systems functional block diagram 1 18 38 17 19 20 22 21 fb input out high out low ref out +15v ?15v com t2 t1 signal isolation power isolation timing 1b21 timing rectifier modulator demodulator oscillator ref 08530-001 figure 1. general description the 1b21 is an isolated voltage-to-current converter that incorporates a unique circuit design utilizing transformer-based isolation and automated surface-mount manufacturing technology. it provides an unbeatable combination of versatility and perfor- mance in a compact plastic package. designed for industrial applications, it is especially suited for harsh environments with extremely high common-mode interference. functionally, the v/i converter consists of four basic sections: input conditioning, modulator, demodulator and current source (see figure 1 ). the input is a resistor-programmable gain stage that accepts a 0 v to 1 v up to 0 v to 10 v voltage input. this maps into a 0 ma to 20 ma output or can be offset by 20% using the internal reference for 4 ma to 20 ma operation. the high level signal is modulated and passed across the barrier which provides complete input to output galvanic isolation of 1500 v rms continuous by the use of transformer-coupling techniques. nonlinearity is an excellent 0.05% maximum. designed for multichannel applications, the 1b21 requires an external loop supply and can accept up to 30 v maximum. this provides a loop supply compliance of 27v, which is sufficient to drive a 1.35 k load resistance. the 1b21 is fully specified over ?25c to +85c and operates over the industrial (?40c to +85c) temperature range. design features and user benefits high cmv isolation. the 1b21 features high input to output galvanic isolation to eliminate ground loops and offer protection against damage from transients and fault voltages. the isolation barrier will withstand continuous cmv of 1500v rms and meets the ieee standard for transient voltage protection (std. 472-swc). small size. the 1b21 package size (0.7 2.1 dip) makes it an excellent choice in multichannel systems for maximum channel density. the 0.35 height also facilitates applications with limited board clearance. ease of use. complete isolated voltage-to-current conversion with minimum external parts required to get a conditioned current signal. no external buffers or drivers are required.
1b21 rev. c | page 2 of 8 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? functional block diagram .............................................................. 1 ? general description ......................................................................... 1 ? design features and user benefits ................................................. 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? pin configuration ............................................................................. 4 ? inside the 1b21 ..................................................................................5 ? using the 1b21 ...............................................................................5 ? applications information .................................................................7 ? output protection .........................................................................7 ? low drift input network .............................................................7 ? multiloop isoaltion .......................................................................7 ? outline dimensions ..........................................................................8 ? ordering guide .............................................................................8 ? revision history 12/09rev. b to rev. c updated format .................................................................. universal changes to figure 1 .......................................................................... 1 changes to table 1 ............................................................................ 3 changes to inside the 1b21 section, figure 4, using the 1b21 section, and table 2 ................................................................ 5 changes to tc considerations of external resistors section .... 6 changes to figure 8 .......................................................................... 7 added ordering guide section ...................................................... 8 6/91rev. a to rev. b
1b21 rev. c | page 3 of 8 specifications typical at +25c and v s = 15 v, unless otherwise noted. table 1. parameter specification input specifications input range 0 v to + 10 v full-scale input +1 v min to +10 v max input bias current 30 pa (400 pa max) output specifications current output range 4 ma to 20 ma, 0 ma to 20 ma load compliance at v loop = 30 v 27 v min max output current @ input overload 25 ma output noise, 100 hz bandwidth 1 a p-p nonlinearity (% of span) 0.02% (0.05% max) isolation cmv, input to output continuous 1500 v rms cmr @ 60 hz 90 db min transient protection ieee-std 472 (swc) accuracy warm-up time to rated performance 5 min total output error @ +25c (untrimmed) offset (v in = 0 v) 1 100 a span (v in = +10 v) 0.6% fsr vs. temperature (?25c to +85c) offset 2 300 na/c span 50 ppm/c reference output voltage +6.225 v dc output error 1.0% max temperature coefficient 15 ppm/c typ dynamic response settling time to 0.1% of fs for 10 v step 9 ms small signal bandwidth 100 hz power supply input side operating voltage 15 v 5% quiescent current +15 v supply 10 ma ?15 v supply 5 ma power supply rejection 0.01% v loop side operating voltage +15 v to +30 v maximum current 25 ma environmental temperature range rated performance ?25c to +85c operating ?40c to +85c storage ?40c to +85c relative humidity, noncondensing 0 to 95% @ +60c case size 0.7 2.1 0.35 (17.8 53.3 8.9) mm 1 for 0 ma to 20 ma mode. for 4 ma to 20 ma mode, an additional 60 a is contributed by the 1.0% reference error on the 4 ma ou tput. 2 for a complete discussion of the temperature effects of the offset resistor and reference, refer to the section . using the 1b21
1b21 rev. c | page 4 of 8 17 18 19 20 2122 pin configuration 1 38 out hi 1b21 bottom view in fb ref out low ?15v com +15v 08530-006 figure 2. pin configuration
1b21 rev. c | page 5 of 8 inside the 1b21 referring to the functional block diagram (see figure 3 ), the 15 v power inputs provide power to both the input side circuitry and the power oscillator. the 25 khz power oscillator provides both the timing information for the signal modulator and drives transformer t2 for the output side power supplies. the secondary winding of t2 is full wave rectified and filtered to create the output side power. this maps the input voltage into a 4 v span. to create a 1 v offset at the output of the internal amplifier (4 ma at the output of the 1b21) a current derived from the reference can be fed into the summing node. the offset resistor (for a 1 v output offset) is given by the equation: r o = 6.225 r f . for most applications, it is recommended that r f be in the 25 k 20% range. resistor values for typical input and output ranges are shown in table 2 . 18 1 38 17 19 20 22 21 com t2 1b21 fb input out high out low ref out +15v ?15v t1 signal isolation power isolation timing timing rectifier oscillator modulator demodulator ref v loop 08530-001 figure 3. 1b21 functional block diagram the input stage is configured as an inverting amplifier with three user-supplied resistors for gain, offset, and feedback. the conditioned signal is modulated to generate a square wave with a peak-to-peak amplitude proportional to v in . the signal drives the signal transformer t1. an internal reference with a nominal output voltage of +6.225 v and tempco of 15 ppm/c is provided to develop a 4 ma offset for 4 ma to 20 ma current loop applications. after passing through signal transformer t1, the amplitude modulated signal is demodulated and filtered by a single pole filter. timing information for the output side is derived from the power transformer t2. the filtered output provides the control signal for the voltage-to-current converter stage. an external power supply is required in series with the load to complete the current loop. using the 1b21 input configurations the 1b21 has been designed with a flexible input stage for a variety of input and output ranges. the basic interconnection for setting gain and offset is shown in figure 4 . the output of the internal amplifier is constrained to 0 to ?5 v, which maps into 0 to 20 ma across the isolation barrier. thus to create a 4 ma offset at the output, the input amplifier has to be offset by 1 v. for example, for 0 to 20 ma operation, the transfer function for the input stage is 5/ v in = r f /r i and no offset resistor is needed. for 4 ma to 20 ma operation one gets 4/ v in = r f /r i 1 38 rectifier oscillator ref v in +15v com ?15v r i r load r f r o 18 17 19 20 4.7f/20v + + 22 21 fb input 1b21 08530-002 figure 4. basic interconnections tale 2. resistor alu es for typical ranges input volts output ma r i k r f k r o k 0 to 5 0-20 25 25 open 0 to 10 0-20 50 25 open 0 to 5 4-20 25 20 124.3 0 to 10 4-20 50 20 124.3 1 to 5 4-20 25 25 open adjustments figure 5 is an example of using potentiometers for trimming gain and offset for a 0 v to 5 v input and 0 v to 20 ma output. the network for offset adjustment keeps the resistors relatively small to minimize noise effects while giving a sensitivity of 1% of span. for more adjustment range, resistors smaller than 274 k can be used. resistor values from table 2 can be substituted for other input and output ranges. in general, any bipolar voltage can be input to the 1b21 as long as it is offset to meet the 0 v to ?5 v constraint of the modulator and the input signal range is 1 v minimum. 1 38 rectifier oscillator ref v in +15v com ?15v 18 17 1k ? 50k ? 19.6k ? 20k ? fb input 20k ? 274k? 19 20 21 22 1k? +15v ?15v 1b21 08530-003 figure 5. offset and span adjustment
1b21 rev. c | page 6 of 8 tc considerations of external resistors the specifications for gain and offset temperature coefficient (tc) for the ib21 excluded the effects of external components. the total gain tc for the circuit in figure 4 is gain tc = 1b21 gain tc + ( tracking tc of r f and r i ) the offset tc is also affected by the thermal stability of the internal voltage reference and its contribution is ref tc = ( v ref )( r f /r o )(4 ma/v)(tc of v ref + tracking tc of r f and r o )/1 10 6 total offset tc = 1b21 offset tc + ref tc specifically using r f , r i and r o from case 3 in table 2 , with absolute tcs of 25 ppm/c gain tc = 50 + (25 + 25) = 100 ppm/c offset tc = 300 + (6.225 v)(20k/124.3 k)(4 ma/v) (20 + 25 + 25)/1 10 6 = 580 na/c similarly, when using a resistor network with a tracking spec of 5 ppm/c, the total gain tc is 55 ppm/c and the total offset tc is 400 na/c.
1b21 rev. c | page 7 of 8 applications information output protection in many industrial applications, it may be necessary to protect the current output from accidental shorts to ac line voltages in addition to high common-mode voltages and short circuits to ground. the circuit show in figure 6 can be used for this purpose. the maximum permissible load resistance will be lowered by the fuse resistance (typically 8 ) when protection circuitry is utilized. 1 38 rectifier 1n4002 1n4002 oscillator ref ref out +15v com ?15v 18 19 17 20 22 21 fb input 1b21 50v 0.1f r load ge varistor v27za1 fuse 1/16a (s.b.) v loop 0 8530-004 figure 6. output protection circuitry low drift input network figure 7 shows a configuration suitable for applications where errors have to be minimized over a wide temperature range. a temperature tracking network such as a 50 k beckman (pn 698- 3r50kd) can be used to implement both offset and gain for either 0 ma to 20 ma or 4 ma to 20 ma current loops. for 0 v to 10 v signals either in1 or in2 can be used for input. for 0 v to 5 v signals, jumper in1 to in2. similarly, for 4 ma to 20 ma operation the 4 ma node should be jumpered to offset, while for 0 ma to 20 ma it should be tied to com. 1 38 rectifier oscillator ref +15v com ?15v 18 19 17 20 22 21 fb input 1b21 1% 24.3k ? beckman 50k ? r/n notes 1. nodes labelled for illustration only. in2 in1 offset 4ma com 08530-005 figure 7. low tempco resistor network configuration multiloop isoaltion multiple 1b21s can be connected to a single loop supply in parallel as show in figure 8 . the amperage of the loop supply should be sufficient to drive all the loops at full-scale output. v loop 1b21 r l2 38 1 1 1b21 r l1 38 0853 0-006 figure 8. multiple 1b21s with single loop supply
1b21 rev. c | page 8 of 8 101909-a controlling dimensions are in i nches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. outline dimensions 0.35 (8.89) max 0.15 (3.81) min 0.15 (3.81) 2.10 (53.34) m a x side view bottom view 0.70 (17.78) max 0.018 (0.46) sq 0.10 (2.54) sq 1817 19 2021 22 1 38 0.50 (12.70) 1.80 (45.72) 0.15 (3.81) figure 9. 1b21 dip package (1b21-n- 08 ) [8-lead count with 38-lead spacing] dimensions shown in inches and (millimeters) 022008-a controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. 2.35 (59.7) 2.60 (66.0) 0.50 (12.7) 0.10 (2.5) dia (both ends) 0.70 (17.8) 0.125 (3.1) typ 0.30 (7.62) max c l figure 10. ac1060 mating socket dimensions shown in inches and (millimeters) ordering guide model temperature range packag e description package option 1b21an ?25c to +85c 8-lead no nstandard 1b21 dip 1b21-n-08 ?1991C2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d08530-0-12/09(c)
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