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tle42754 low dropout linear fixed voltage regulator data sheet, rev. 1.1, september 2008 automotive power
pg-to252-5 pg-to263-5 pg-ssop-14 exposed pad type package marking tle42754d pg-to252-5 42754d TLE42754G pg-to263-5 42754g tle42754e pg-ssop-14 exposed pad 42754e data sheet 2 rev. 1.1, 2008-09-24 tle42754 low dropout linear fixed voltage regulator 1overview features ? output voltage 5 v 2% ? ouput current up to 450 ma ? very low current consumption ? power-on and undervoltage reset with programmable delay time ? reset low down to v q = 1 v ? very low dropout voltage ? output current limitation ? reverse polarity protection ? overtemperature protection ? suitable for use in automotive electronics ? wide temperature range from -40 c up to 150 c ? input voltage range from -42 v to 45 v ? green product (rohs compliant) ? aec qualified description the tle42754 is a monolithic integrated low-dropout voltage regulator in a 5-pin to-package, especially designed for automotive applications. an input voltage up to 42 v is regulated to an output voltage of 5.0 v. the component is able to drive loads up to 450 ma. it is short-circuit proof by the implemented current limitation and has an integrated overtemperat ure shutdown. a reset signal is generated for an output voltage v q,rt of typically 4.65 v. the power-on reset delay time can be programmed by the external delay capacitor. dimensioning information on external components an input capacitor c i is recommended for compensation of line influences. an output capacitor c q is necessary for the stability of the control loop. data sheet 3 rev. 1.1, 2008-09-24 tle42754 overview circuit description the control amplifier compares a reference voltage to a volt age that is proportional to the output voltage and drives the base of the series transistor via a buffer. saturation control as a function of the load current prevents any oversaturation of the power element. the component also has a number of internal circuits for protection against: ? overload ? overtemperature ? reverse polarity tle42754 block diagram data sheet 4 rev. 1.1, 2008-09-24 2 block diagram figure 1 block diagram reset generator bandgap reference protection circuits gnd d q ro i tle42754 data sheet 5 rev. 1.1, 2008-09-24 tle42754 pin configuration 3 pin configuration 3.1 pin assignment tle42754d (pg-to 252-5) and tle4275 4g (pg-to263-5) figure 2 pin configuration (top view) 3.2 pin definitions and functions tle 42754d (pg-to252-5) and TLE42754G (pg- to263-5) pin symbol function 1i input for compensating line influences, a capacito r to gnd close to the ic terminals is recommended 2ro reset output open collector output; external pull-up resistor to a positive potential required; leave open if the reset function is not needed 3gnd TLE42754G (pg-to263-5) only: ground internally con nected to tab 4d reset delay timing connect a ceramic capacitor to gnd for adjusting the reset delay time; leave open if the reset function is not needed 5q output block to gnd with a capacitor close to the ic terminals, respecting the values given for its capacitance c q and esr in the table ?functional range? on page 8 tab gnd ground connect to heatsink area aep02580 15 ro dq gnd gnd ro iep02528 d q p-to252-5 (d-pak) p-to263-5 (d2-pak) tle42754 pin configuration data sheet 6 rev. 1.1, 2008-09-24 3.3 pin assignment tle42754 e (pg-ssop-14 exposed pad) figure 3 pin configuration (top view) 3.4 pin definitions and functions tle42754e (pg-ssop-14 exposed pad) pin symbol function 1,3,5,7 n.c. not connected leave open or connect to gnd 2ro reset output open collector output; external pull-up resistor to a positive potential required; leave open if the reset function is not needed 4gnd ground 6d reset delay timing connect a ceramic capacitor to gnd for adjusting the reset delay time; leave open if the reset function is not needed 8,10,11,12, 14 n.c. not connected leave open or connect to gnd 9q output block to gnd with a capacitor close to the ic terminals, respecting the values given for its capacitance c q and esr in the table ?functional range? on page 8 13 i input for compensating line influenc es, a capacitor to gnd close to the ic terminals is recommended pad ? exposed pad connect to heatsink area; connect with gnd on pcb q f q f 4 q f q f q f , q f q f ' q f * 1 ' q f 5 2 3 , 1 & |