View LTC4120-42-15_8232831.PDF datasheet online --- IC-ON-LINE

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1 for more information www.linear.com/ltc4120 typical a pplica t ion fea t ures descrip t ion wireless power receiver and 400ma buck battery charger the lt c ? 4120 is a constant-current/ constant-voltage wire - less receiver and battery charger . an external program- ming resistor sets the charge current up to 400ma. the ltc4120-4 . 2 is suitable for charging li-ion/ polymer bat- teries, while the programmable float voltage of the ltc4120 accommodates several batter y chemistries. the ltc4120 uses a dynamic harmonization control ( dhc) technique that allows high efficiency contactless charging across an air gap. the ltc4120 regulates its input voltage via the dhc pin. this technique modulates the resonant frequency of a receiver tank to automatically adjust the power received as well as the power transmitted to provide an efficient solution for wirelessly charging battery-powered devices . wireless charging with the ltc4120 provides a method to power devices in harsh environments without requiring expensive failure-prone connectors. this allows products to be charged while locked within sealed enclosures , or in moving or rotating equipment, or where cleanliness or sanitation is critical. this full featured battery charger includes accurate run pin threshold , low voltage battery preconditioning and bad battery fault detection , timer termination, auto-recharge, and ntc temperature qualified charging . the fault pin provides an indication of bad battery or temperature faults . once charging is terminated, the ltc4120 signals end-of- charge via the chrg pin, and enters a low current sleep mode. an auto-restart feature starts a new charging cycle if the battery voltage drops by 2.2%. a pplica t ions n dynamic harmonization control optimizes wireless charging over a wide coupling range n wide input voltage range (12.5v to 40v) n adjustable float voltage (3.5v to 11v) n fixed 4.2v float voltage option (ltc4120-4.2) n 50ma to 400ma charge current programmed with a single resistor n 1% feedback v oltage accuracy n programmable 5% accurate charge current n no microprocessor required n no transformer core n thermally enhanced, low profile 16-lead (3mm 3mm 0.75mm) qfn package n handheld instruments n industrial/military sensors and devices n harsh environments n portable medical devices n physically small devices n electrically isolated devices l, lt , lt c , lt m , linear technology, the linear logo and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. + intv cc in freq run boost sw chgsns ntc dhc fault chrg 3.01k 22f t 4120 ta01a li-ion 4.2v 22nf 26.7nf 6.5nf 47h 5h tx circuitry 10f 2.2f 33h fb prog fbg ltc4120 gnd bat 1.01m 1.35m wireless rx voltage/charge current vs spacing spacing (cm) 0.4 v in(rx) (v) charge current (ma) 30 35 40 1.0 1.4 4120 ta01b 25 20 0.6 0.8 1.2 1.6 1.8 v in 15 10 200 267 333 400 133 67 0 i charge max not charging charging lt c4120/lt c4120-4.2 4120fe
2 for more information www.linear.com/ltc4120 p in c on f igura t ion a bsolu t e maxi m u m r a t ings in , run , chrg , fa u lt , dhc ...................... C 0. 3v to 43v boost ................................... v sw C 0. 3v to (v sw + 6v ) sw ( dc ) ........................................ C0. 3v to (v in + 0. 3v ) sw (pulsed < 100ns ) ...................... C 1. 5v to (v in + 1. 5v ) chgsns , bat , fbg , fb ............................... C 0. 3v to 12v freq , ntc, prog , intv cc .......................... C0. 3v to 6v i chgsns , i bat ..................................................... 60 0ma (note 1) o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range ltc4120eud#pbf ltc4120eud#trpbf lghb 16-lead (3mm 3mm) plastic qfn C40c to 125c ltc4120iud#pbf ltc4120iud#trpbf lghb 16-lead (3mm 3mm) plastic qfn C40c to 125c ltc4120eud-4.2#pbf ltc4120eud-4.2#trpbf lgmt 16-lead (3mm 3mm) plastic qfn C40c to 125c ltc4120iud-4.2#pbf ltc4120iud-4.2#trpbf lgmt 16-lead (3mm 3mm) plastic qfn C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges . * the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on nonstandard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ltc4120 options float voltage ltc4120 programmable ltc4120-4.2 4.2v fixed ltc4120 ltc4120-4.2 16 15 14 13 5 6 7 8 top view 17 gnd ud package 16-lead (3mm 3mm) plastic qfn 9 10 11 12 4 3 2 1 intv cc boost in sw ntc fbg fb bat run fault chrg prog gnd dhc freq chgsns t jmax = 125c, ja = 54c/w exposed pad (pin 17) is gnd, must be soldered to pcb to obtain ja 16 15 14 13 5 6 7 8 top view 17 gnd ud package 16-lead (3mm 3mm) plastic qfn 9 10 11 12 4 3 2 1 intv cc boost in sw ntc nc batsns bat run fault chrg prog gnd dhc freq chgsns t jmax = 125c, ja = 54c/w exposed pad (pin 17) is gnd, must be soldered to pcb to obtain ja i dhc ............................................................... 35 0ma rms i chrg , i fa u lt , i fbg .................................................. 5ma i fb ......................................................................... 5ma i intvcc .................................................................. C 5ma o perating junction temperature range ( note 2 ) .................................................. C 40 c to 125c storage temperature range .................. C 65 c to 150c lt c4120/lt c4120-4.2 4120fe
3 for more information www.linear.com/ltc4120 e lec t rical c harac t eris t ics the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c (note 2). v in = v run = 15v, v chgsns = v b at = 4v, r prog = 3.01k, v fb = 2.29v (ltc4120), v batsns = 4v (ltc4120-4.2). current into a pin is positive out of the pin is negative. symbol parameter conditions min typ max units operating input supply range l 12.5 40 v battery voltage range 0 11 v i in dc supply current switching, freq = gnd 3.5 ma standby mode (note 3) l 130 220 a sleep mode (note 3) ltc4120: v fb = 2.51v (note 5), ltc4120-4.2: v batsns = 4.4v l 60 100 a disabled mode (note 3) l 37 70 a shutdown mode (note 3) l 20 40 a ?v duvlo differential undervoltage lockout v in -v bat falling, v in = 5v (ltc4120), v in -v batsns falling, v in = 5v (ltc4120-4.2) l 20 80 160 mv hysteresis v in -v bat rising, v in = 5v (ltc4120), v in -v batsns rising, v in = 5v (ltc4120-4.2) 115 mv uv intvcc intv cc undervoltage lockout intv cc rising, v in = intv cc + 100mv, v bat = nc l 4.00 4.15 4.26 v hysteresis intv cc falling 220 mv intv cc regulated voltage l 4.14 4.24 4.29 v intv cc load regulation i intvcc = 0ma to C5ma (note 4) 1.7 % battery charger i bat bat standby current standby mode (ltc4120) (notes 3, 7, 8) standby mode (ltc4120-4.2) (notes 3, 7, 8) l l 2.5 50 4 .5 1000 a na bat shutdown current shutdown mode (ltc4120) (notes 3, 7, 8) shutdown mode (ltc4120-4.2) (notes 3, 7, 8) l l 1100 10 2000 1000 na na i batsns batsns standby current (ltc4120-4.2) standby mode (notes 3, 7, 8) l 5.4 10 a batsns shutdown current (ltc4120-4.2) shutdown mode (notes 3, 7, 8) l 1100 2000 na i fb feedback pin bias current (ltc4120) v fb = 2.5v (notes 5, 7) l 25 60 na i fbg(leak) feedback ground leakage current (ltc4120) shutdown mode (notes 3, 7) l 1 a r fbg feedback ground return resistance ( ltc4120) l 1000 2000 v fb(reg) feedback regulation voltage (ltc4120) (note 5) l 2.393 2.370 2 .400 2.407 2.418 v v v float regulated float voltage (ltc4120-4.2) l 4.188 4.148 4 .200 4.212 4.227 v v i chg battery charge current r prog = 3.01k r prog = 24.3k l l 383 45 402 50 421 55 ma ma v uvcl undervoltage current limit v in falling 12.0 v v rchg battery recharge threshold v fb falling relative to v fb_reg (ltc4120) (note 5) l C38 C50 C62 mv v rchg_4.2 battery recharge threshold v batsns falling relative to v float (ltc4120-4.2) l C70 C92 C114 mv h prog ratio of bat current to prog current v trkl < v fb < v fb(reg) (ltc4120) (note 5) v trkl_4.2 < v batsns < v float (ltc4120-4.2) 988 ma/ma v prog prog pin servo voltage l 1.206 1.227 1.248 v r sns chgsns-bat sense resistor i bat = C100ma 300 m lt c4120/lt c4120-4.2 4120fe
4 for more information www.linear.com/ltc4120 e lec t rical c harac t eris t ics the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c (note 2). v in = v run = 15v, v chgsns = v b at = 4v, r prog = 3.01k, v fb = 2.29v (ltc4120), v batsns = 4v (ltc4120-4.2). current into a pin is positive out of the pin is negative. symbol parameter conditions min typ max units i lowbat low battery linear charge current 0v < v fb < v trkl , v bat = 2.6v (ltc4120), v batsns < v trkl_4.2 , v bat = 2.6v (ltc4120-4.2) 6 9 16 ma v lowbat low battery threshold voltage v bat rising (ltc4120), v batsns rising (ltc4120-4.2) l 2.15 2.21 2.28 v hysteresis 147 mv i trkl switch mode trickle charge current v lowbat < v bat , v fb < v trkl (ltc4120) (note 5), v lowbat < v batsns < v trkl_4.2 (ltc4120-4.2) i chg /10 ma prog pin servo voltage in switch mode trickle charge v lowbat < v bat , v fb < v trkl (ltc4120) (note 5), v lowbat < v batsns < v trkl_4.2 (ltc4120-4.2) 122 mv v trkl trickle charge threshold v fb rising (ltc4120) (note 5) l 1.64 1.68 1.71 v hysteresis v fb falling (ltc4120) (note 5) 50 mv v trkl_4.2 trickle charge threshold v batsns rising (ltc4120-4.2) l 2.86 2.91 2.98 v hysteresis v batsns falling (ltc4120-4.2) 88 mv h c/10 end of charge indication current ratio (note 6) 0.1 ma/ma safety timer termination period 1.3 2.0 2.8 hours bad battery termination timeout 19 30 42 minutes switcher f osc switching frequency freq = intv cc freq = gnd l l 1.0 0.5 1 .5 0.75 2.0 1.0 mhz mhz t min(on) minimum controllable on-time (note 9) 120 ns duty cycle maximum (note 9) 94 % top switch r ds(on) i sw = C100ma 0.8 bottom switch r ds(on) i sw = 100ma 0.5 i peak peak current limit measured across r sns with a 15h inductor in series with r sns (note 9) 585 750 1250 ma i sw switch pin current (note 8) v in = open-circuit , v run = 0v, v sw = 8. 4v ( ltc4120) v in = open-circuit , v run = 0v, v sw = 4. 2v ( lt c4120-4 .2) l l 15 7 30 15 a a status pins f ault , chrg pin output voltage low i = 2ma 500 mv pin leakage current v = 43v, pin high impedance 0 1 a ntc cold temperature v ntc /v intvcc fault rising v ntc threshold falling v ntc threshold l 73 74 72 75 % int v cc % intv cc hot temperature v ntc /v intvcc fault falling v ntc threshold rising v ntc threshold l 35.5 36.5 37.5 37 .5 % intv cc % intv cc ntc disable voltage falling v ntc threshold rising v ntc threshold l 1 2 3 3 % int v cc % intv cc ntc input leakage current v ntc = v intvcc C50 50 na lt c4120/lt c4120-4.2 4120fe
5 for more information www.linear.com/ltc4120 the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c (note 2). v in = v run = 15v, v chgsns = v b at = 4v, r prog = 3.01k, v fb = 2.29v (ltc4120), v batsns = 4v (ltc4120-4.2). current into a pin is positive out of the pin is negative. symbol parameter conditions min typ max units run v en enable threshold v run rising l 2.35 2.45 2.55 v hysteresis v run falling 200 mv run pin input current v run = 40v 0.01 0.1 a v sd shutdown threshold (note 3) v run falling l 0.4 1.2 v hysteresis 220 mv freq freq pin input low l 0.4 v freq pin input high v intvcc -v freq l 0.6 v freq pin input current 0v < v freq < v intvcc 1 a dynamic harmonization control v in(dhc) input regulation voltage 14 v dhc pin current v dhc = 1v, v in < v in(dhc) 330 ma rms note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc4120 is tested under pulsed load conditions such that t j t a . the ltc4120e is guaranteed to meet performance specifications for junction temperatures from 0c to 85c. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the ltc4120i is guaranteed over the full C40c to 125c operating junction temperature range. note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance, and other environmental factors. note 3: standby mode occurs when the ltc4120 stops switching due to an ntc fault condition, or when the charge current has dropped low enough to enter burst mode operation. disabled mode occurs when v run is between v sd and v en . shutdown mode occurs when v run is below v sd or when the differential undervoltage lockout is engaged. sleep mode occurs after a timeout while the battery voltage remains above the v rchg or v rchg_42 threshold. note 4: the internal supply intv cc should only be used for the ntc divider, it should not be used for any other loads. note 5: the fb pin is measured with a resistance of 588k in series with the pin. note 6 : h c/10 is expressed as a fraction of measured full charge current as measured at the prog pin voltage when the chrg pin de-asserts. note 7: in an application circuit with an inductor connected from sw to chgsns, the total battery leakage current when disabled is the sum of i bat , i fbg(leak) and i sw (ltc4120), or i batsns and i bat and i sw (ltc4120- 4.2). note 8: when no supply is present at in, the sw powers in through the body diode of the topside switch. this may cause additional sw pin current depending on the load present at in. note 9: guaranteed by design and/or correlation to static test. e lec t rical c harac t eris t ics lt c4120/lt c4120-4.2 4120fe
6 for more information www.linear.com/ltc4120 typical p er f or m ance c harac t eris t ics typical v fb(reg) vs temperature in pin disabled/shutdown current vs temperature bat pin sleep/shutdown current vs temperature typical battery charge current vs temperature typical v float vs temperature ltc4120-4.2 in pin standby/sleep current vs temperature t a = 25c, unless otherwise noted. temperature (c) ?40 2.36 v fb(reg) (v) 2.37 2.39 2.40 2.41 2.43 ?25 35 65 4120 g01 2.38 2.42 20 95 125 dut = device under test 110 ?10 5 50 80 4 units tested high limit dut1 v fb(reg) (v) dut2 v fb(reg) (v) dut3 v fb(reg) (v) dut4 v fb(reg) (v) low limit temperature (c) 4.15 4.16 4.17 4.18 4.19 v float (v) 4.25 4.24 4.23 4.22 4.21 4.20 4120 g20 4 units tested high limit dut1 v float dut2 v float dut3 v float dut4 v float low limit ?40 5 20 35 958065 ?25 ?10 50 110 125 temperature (c) ?50 120 140 180 25 75 4120 g02 100 80 ?25 0 50 100 125 60 40 160 i in (a) 2 units tested v in = 15v i in standby freq = intv cc i in standby freq = intv cc i in standby freq = gnd i in standby freq = gnd i in sleep i in sleep temperature (c) ?50 i in (a) 40 50 60 25 75 4120 g03 30 20 ?25 0 50 100 125 10 0 iin sd iin sd iin disabled iin disabled 2 units tested v in = 15v temperature (c) ?50 i bat (a) 7 25 4120 g04 4 2 ?25 0 50 1 0 8 6 5 3 75 100 125 i bat sleep i bat sleep i bat shutdown i bat shutdown 2 units tested v bat = 4.2v r fb2 = 1.01m r fb1 = 1.35m temperature (c) ?50 399 400 402 25 75 4120 g05 398 397 ?25 0 50 100 125 396 395 401 i chg (ma) freq = gnd freq = gnd freq = intv cc freq = intv cc r prog = 3.01k 2 units tested typical r sns current limit vs temperature temperature (c) ?50 i peak (ma) 125 4120 g06 1080 1100 1060 1040 980 1000 960 940 920 1020 0 50 100 ?25 25 75 1120 dut1 dut2 dut3 3 units tested lt c4120/lt c4120-4.2 4120fe
7 for more information www.linear.com/ltc4120 switching frequency vs temperature buck efficiency vs battery current temperature (c) ?50 0.8 1.0 1.4 25 75 4120 g07 0.6 ?25 0 50 100 125 0.4 0.2 0 1.2 f osc (mhz) freq = gnd freq = gnd freq = intv cc freq = intv cc 2 units tested i bat (ma) 0 efficiency (%) 75 80 85 400 4120 g08 70 65 60 50 100 200 300 50 150 250 350 55 95 90 v in = 12.5v v in = 14v v in = 20v v in = 30v l sw = 68h, slf12555t-680m1r3 freq = gnd v bat = 4.2v burst mode trigger current typical burst mode waveforms, i b at = 38ma typical t min(on) vs temperature typical p er f or m ance c harac t eris t ics wireless power transfer efficiency, v in_rx vs battery current bat pin leakage current/v b at -v in vs temperature typical wireless charging cycle t a = 25c, unless otherwise noted. temperature (c) ?50 i bat (a) v bat -v in (mv) 14 25 4120 g09 8 4 ?25 0 50 2 0 16 12 10 6 350 200 100 50 0 400 300 250 150 75 100 125 i bat i bat v bat -v in v bat -v in 2 units tested v in = open-circuit v bat = 4.2v temperature (c) ?50 80 t min(0n) (ns) 85 95 100 105 130 115 0 50 75 100 4120 g10 90 120 125 110 ?22 25 125 2 units tested i bat (ma) 0 50 60 70 200 4120 g11 40 30 50 100 150 250 20 10 0 20 22 24 18 16 14 12 10 efficiency (%) v in_rx (v) 9mm efficiency 10mm efficiency 11mm efficiency 9mm v_rx 10mm v_rx 11mm v_rx v float = 8.3v l sw = slf6028-470mr59 r prog = 4.64k time (hours) 0 0 battery current (ma) v bat , v chrg (v) 50 150 200 250 450 4120 g12 100 2 1 3 300 350 400 0 0.5 1.5 2.0 2.5 4.5 1.0 3.0 3.5 4.0 v chrg v bat i bat bat = 940mahr l sw = tdk slf4075 15h r fb1 = 732k, r fb2 = 976k r prog = 3.01k application cct of figure 10 spacing = 14mm v in (v) 10 0 i bat (ma) 10 30 40 50 30 90 4120 g13 20 20 15 35 25 40 60 70 80 r prog = 6.2k r prog = 3k v sw 5v/div v prog 500mv/div i lsw 200ma/div 0ma 0v 0v 4s/div 4120 g14 lt c4120/lt c4120-4.2 4120fe
8 for more information www.linear.com/ltc4120 in pin standby current vs v in in pin disabled current vs input voltage uvcl: i charge vs input voltage in pin shutdown current vs input voltage in pin switching current vs input voltage typical p er f or m ance c harac t eris t ics t a = 25c, unless otherwise noted. v in (v) 0 i in (a) 160 180 200 30 35 15 20 25 4120 g15 140 120 5 10 40 100 80 220 v bat = 4.21v ntc = gnd i in stby freq high 130c i in stby freq low 130c i in stby freq high 25c i in stby freq low 25c i in stby freq high ?45c i in stby freq low ?45c v in (v) 0 i in (a) 40 50 60 40 4120 g16 30 20 0 10 20 30 10 80 70 i in sd temp = 125c i in sd temp = 35c i in sd temp = ?40c v run = 0.4v v in (v) 0 0 i in (a) 10 30 40 50 100 70 10 20 4120 g17 20 80 90 60 30 40 i in sd temp = 125c i in sd temp = 35c i in sd temp = ?40c v run = 1.6v v in (v) 10 4 5 7 20 30 4120 g18 3 2 15 25 35 40 1 0 6 i in (ma) uvcl i bat = 0 130c 25c ?45c i iccq(switching) freq high freq = intv cc i iccq(switching) freq low freq = gnd v in (v) 11.90 i charge (ma) 0.20 4120 g19 0.10 0 12.00 12.10 11.95 12.05 12.15 0.30 0.40 0.15 0.05 0.25 0.35 12.20 i bat temp = 125c i bat temp = 35c i bat temp = ?40c lt c4120/lt c4120-4.2 4120fe
9 for more information www.linear.com/ltc4120 p in func t ions intv cc ( pin 1): internal regulator output pin. this pin is the output of an internal linear regulator that generates the internal intv cc supply from in. it also supplies power to the switch gate drivers and the low battery linear charge current i lowbat . connect a 2.2f low esr capacitor from intv cc to gnd. do not place any external load on intv cc other than the ntc bias network. when the run pin is above v en , and intv cc rises above the uvlo threshold, and in rises above bat by ?v duvlo and its hysteresis , the charger is enabled. boost ( pin 2): boosted supply pin. connect a 22nf boost capacitor from this pin to the sw pin. in ( pin 3): positive input power supply. decouple to gnd with a 10f or larger low esr capacitor. sw ( pin 4): switch pin. the sw pin delivers power from in to bat via the step-down switching regulator . an in - ductor should be connected from sw to chgsns. see the applications information section for a discussion of inductor selection . gnd (pin 5, exposed pad pin 17): ground pin. connect to exposed pad. the exposed pad must be soldered to pcb gnd to provide a low electrical and thermal impedance connection to ground. dhc ( pin 6): dynamic harmonization control pin. connect a schottky diode from the dhc pin to the in pin, and a capacitor from the dhc pin as shown in the typical ap - plication or the block diagram. when v in is greater than v in(dhc) , this pin is high impedance. when v in is below v in(dhc) this pin is low impedance allowing the ltc4120 to modulate the resonance of the tuned receiver network. see applications information for more information on the tuned receiver network. freq ( pin 7): buck switching frequency select input pin. connect to intv cc to select a 1.5mhz switching frequency or gnd to select a 750khz switching frequency. do not float. chgsns ( pin 8): battery charge current sense pin. an internal current sense resistor between chgsns and bat pins monitors battery charge current . an inductor should be connected from sw to chgsns. bat ( pin 9): battery output pin. battery charge current is delivered from this pin through the internal charge current sense resistor . in low battery conditions a small linear charge current, i lowbat , is sourced from this pin to precondition the battery . decouple the bat pin with a low esr 22f or greater ceramic capacitor to gnd. batsns ( pin 10 , ltc4120-4.2 only): battery voltage sense pin . for proper operation, this pin must always be connected physically close to the positive battery terminal . fb ( pin 10 , ltc4120 only): battery voltage feedback pin. the charge function operates to achieve a final float voltage of 2.4v at this pin . battery float voltage is programmed using a resistive divider from bat to fb to fbg , and can be programmed up to 11v. the feedback pin input bias cur - rent, i fb , is 25na. using a resistive divider with a thevenin equivalent resistance of 588k compensates for input bias current error ( see curve of fb pin bias current versus temperature in the typical performance characteristics ). fbg ( pin 11 , ltc4120 only): feedback ground pin. this pin disconnects the external fb divider load from the battery when it is not needed . when sensing the battery voltage this pin presents a low resistance, r fbg , to gnd. when in disabled or shutdown modes this pin is high impedance. ntc ( pin 12 ): input to the negative temperature coefficient thermistor monitoring circuit . the ntc pin connects to a negative temperature coefficient thermistor which is typically co-packaged with the battery to determine if the battery is too hot or too cold to charge . if the batterys temperature is out of range, the ltc4120 enters standby mode and charging is paused until the battery tempera - ture re-enters the valid range. a low drift bias resistor is required from intv cc to ntc and a thermistor is required from ntc to gnd . tie the ntc pin to gnd to disable ntc qualified charging if ntc functionality is not required. prog ( pin 13): charge current program and charge current monitor pin. connect a 1% resistor between 3. 01k ( 400ma) and 24 . 3k ( 50ma) from prog to ground to program the charge current. while in constant-current mode, this pin regulates to 1. 227v. the voltage at this pin represents the average battery charge current using the following formula : i bat = h prog ? v prog r prog where h prog is typically 988. keep parasitic capacitance on the prog pin to a minimum. lt c4120/lt c4120-4.2 4120fe
10 for more information www.linear.com/ltc4120 p in func t ions chrg (pin 14): open-drain charge status output pin. typically pulled up through a resistor to a reference voltage, the chrg pin indicates the status of the battery charger. the pin can be pulled up to voltages as high as in when disabled, and can sink currents up to 5ma when enabled. when the battery is being charged, the chrg pin is pulled low. when the termination timer expires or the charge current drops below 10% of the programmed value, the chrg pin is forced to a high impedance state. fault ( pin 15): open-drain fault status output pin. typi - cally pulled up through a resistor to a reference voltage, this status pin indicates fault conditions during a charge cycle . the pin can be pulled up to voltages as high as in when disabled, and can sink currents up to 5ma when enabled. an ntc temperature fault causes this pin to be pulled low. a bad battery fault also causes this pin to be pulled low . if no fault conditions exist, the fault pin remains high impedance. run ( pin 16): run pin. when run is pulled below v en and its hysteresis, the device is disabled. in disabled mode, battery charge current is zero and the chrg and fault pins assume high impedance states. if the voltage at run is pulled below v sd , the device is in shutdown mode. when the voltage at the run pin rises above v en , the intv cc ldo turns on. when the intv cc ldo rises above its uvlo threshold the charger is enabled . the run pin should be tied to a resistive divider from v in to program the input voltage at which charging is enabled . do not float the run pin. intv cc i th intv cc intv cc hot cold disable in 2 intv cc intv cc intv cc r sns 0.3 r fb1 10k r nom 10k t r fb2 r prog 4 pwm ltc4120 enable enable run c in 10f ? c2s c2p l r 2.45v boost c intvcc 2.2f c bst 22nf l sw 33h 1 intv cc sw 8 chgsns 10 fb 11 fbg 13 prog 4120 f01 9 bat gnd c bat 22f li-ion ldo 5 + ? intv cc 588k v-ea c-ea uvcl d z v fb(reg) 1.2v enable + ? + ? + + ? 0.9v bat shutdown duvlo v in(dhc) in + ? in ? 80mv + ? bat 2.21v + ? 16 dhc 6 fault enable lowbat 15 chrg 14 ntc lowbat 12 freq in in 7 in 3 cntrl ntc dhc figure 1. block diagram b lock diagra m lt c4120/lt c4120-4.2 4120fe
11 for more information www.linear.com/ltc4120 b lock diagra m intv cc i th in intv cc r sns 0.3 r prog ltc4120-4.2 8 chgsns 10 batsns 13 prog 4120 f02 9 bat c bat 22f li-ion + ? intv cc 588k v-ea c-ea uvcl d z v fb(reg) 1.2v enable + ? + ? + batsns duvlo in ? 80mv + ? batsns 2.21v + ? lowbat figure 2. ltc4120-4.2 batsns connections tes t c ircui t figure 3. v in(dhc) test circuit ntc v in(dhc) intv cc in run 2.2f 4120 f03 gnd dhc ltc4120 10f 10 665 49.9 irlml5103tr 665 2k 20v 680nf lt c4120/lt c4120-4.2 4120fe
12 for more information www.linear.com/ltc4120 o pera t ion wireless power system overview the ltc4120 is one component in a complete wireless power system. a complete system is composed of trans - mit circuitry , a transmit coil, a receive coil and receive circuitr yincluding the ltc4120. please refer to the applications information section for more information on transmit circuitry and coils . in particular, the resonant transmitter and receiver and the alternative transmit - ter options sections include information necessary to complete the design of a wireless power system . further information can be found in the applications information section of this document under the heading resonant transmitter and receiver , as well as in an138: wireless power users guide, as well as the dc1969a: wireless power transmit and receiver demo kit and manual. the gerber layout files for both the transmitter and receiver boards are available at the following link: ht tp://www . linear . com / product / ltc4120 # demoboards ltc4120 overview the ltc4120 is a synchronous step-down (buck) wire - less battery charger with dynamic harmonization control (dhc). dhc is a highly efficient method of regulating the received input voltage in a resonant coupled power transfer 1 www.powerbyproxi.com application. the ltc4120 serves as a constant-current/ constant-voltage battery charger with the following built-in charger functions: programmable charge current, program - mable float voltage (ltc4120), battery precondition with half-hour timeout , precision shutdown/ run control, ntc thermal protection, a 2-hour safety termination timer, and automatic recharge. the ltc4120 also provides output pins to indicate state of charge and fault status. the circuit in figure 4 is a fully functional system using a basic current-fed resonant converter for the transmitter and a series resonant converter for the receiver with the ltc4120. advanced transmitters by power-by-proxi 1 may also be used with the ltc4120. for more information on transmitter design refer to application note 138: wireless power users guide. wireless power transfer a wireless coupled power transfer system consists of a transmitter that generates an alternating magnetic field, and a receiver that collects power from that field. the ideal transmitter efficiently generates a large alternating current in the transmitter coil, l x . the push-pull current- fed resonant converter, shown in figure 4, is an example figure 4. dc-ac converter, transmit/receive coils, tuned series resonant receiver and ac-dc rectifier c4 r1 c5 c x c2s l x l r l1 l2 v dc 5v transmitter r2 d2 m1 m2 d5, d8, d9: dfls240l d3 d1 d4 c2p d8 d5 d9 dhc c bst d6 39v dflz39 l sw boost sw chgsns bat ltc4120 gnd in c in c bat 4120 f04 li-ion + lt c4120/lt c4120-4.2 4120fe
13 for more information www.linear.com/ltc4120 figure 5. resonant receiver tank c x c2s 1:n l x l r c2p d8 d5 d9 dhc ltc4120 in c in 4120 f05 o pera t ion of a basic power transmitter that may be used with the ltc4120. this transmitter typically operates at a frequency of approximately 130khz; though the operating frequency varies depending on the load at the receiver and the cou - pling to the receiver coil. for l x = 5h, and c x = 300nf, the transmitter frequency is: f o 1 2 ? ? l x ? c x = 130khz this transmitter typically generates an ac coil current of about 2.5a rms . for more information on this transmitter, refer to an138: wireless power users guide. the receiver consists of a coil, l r , configured in a resonant circuit followed by a rectifier and the ltc4120. the receiver coil presents a load reflected back to the transmitter through the mutual inductance between l r and l x . the reflected impedance of the receiver may influence the operating frequency of the transmitter. likewise, the power output by the transmitter depends on the load at the receiver. the resonant coupled charging system, consisting of both the transmitter and ltc4120 charger, provides an efficient method for wireless battery charging as the power output by the transmitter varies automatically based on the power used to charge a battery. dynamic harmonization control dynamic harmonization control (dhc) is a technique for regulating the received input power in a wireless power transfer system. dhc modulates the impedance of the resonant receiver to regulate the voltage at the input to the ltc4120. when the input voltage to the ltc4120 is below the v in(dhc) set point , the ltc4120 allows more power to appear at the receiver by tuning the receiver resonance closer to the transmitter resonance. if the input voltage exceeds v in(dhc) , the ltc4120 tunes the receiver resonance away from the transmitter, which reduces the power available at the receiver. the amount that the input power increases or decreases is a function of the coupling, the tuning capacitor , c2p, the receiver coil, l r , and the operating frequency. figure 5 illustrates the components that implement the dhc function to automatically tune the resonance of the receiver. capacitor c2s and inductor l r serve as a series resonator. capacitor c2p and the dhc pin of the ltc4120 form a parallel resonance when the dhc pin is low imped - ance, and disconnect when the dhc pin is high impedance. c2 p adjusts the receiver resonance to control the amount of power available at the input of the ltc4120. c2 p also affects power dissipation in the ltc4120 due to the ac current being shunted by the dhc pin. for this reason it is not recommended to apply total capacitance in excess of 30nf at this pin. using dhc, the ltc4120 automatically adjusts the power received depending on load requirements; typically the load is battery charge current . this technique results in significant power savings , as the power required by the lt c4120/lt c4120-4.2 4120fe
14 for more information www.linear.com/ltc4120 o pera t ion transmitter automatically adjusts to the requirements at the receiver. furthermore, dhc reduces the rectified voltage seen at the input of the ltc4120 under light load conditions when the battery is fully charged. the design of the resonant receiver circuit (l r , c2 s and c2p), the transmitter circuit, and the mutual inductance between l x and l r determines both the maximum unloaded voltage at the input to the ltc4120 as well as the maximum power available at the input to the ltc4120. the value and tolerances of these components must be selected with care for stable operation, for this reason it is recommended to only use components with tight tolerances. to understand the operating principle behind dynamic harmonization control (dhc), consider the following sim - plification. here, a fixed-frequency transmitter is operating at a frequency f o = 130khz. dhc automatically adjusts the impedance of the receiver tuned network so as to modulate the resonant frequency of the receiver between f t and f d . f t ? 1 2 ? ? l r ? c2p + c2s ( ) f d ? 1 2 ? ? l r ? c2s when the input voltage is above v in(dhc) (typically 14v), the ltc4120 opens the dhc pin, detuning the receiver resonance away from the transmitter frequency f o , so that less power is received. when the input voltage is below v in(dhc) , the ltc4120 shunts the dhc pin to ground, tuning the receiver resonance closer to the transmitter frequency so that more power is available. for the resonant converter shown in figure 4, the operating frequency of the transmitter is not fixed , but varies depend - ing on the load impedance. however the basic operating principle of dhc remains valid. for more information on the design of the wireless power receiver resonant circuit refer to the applications section. programming the battery float voltage for the ltc4120, the battery float voltage is programmed by placing a resistive divider from the battery to fb and fbg as shown in figure 6 . the programmable battery float voltage, v float , is then governed by the following equation: v float = v fb(reg) ? r fb1 + r fb2 ( ) r fb2 where v fb(reg) is typically 2.4v. due to the input bias current (i fb ) of the voltage error amp (v-ea), care must also be taken to select the thevenin equivalent resistance of r fb1 ||r fb2 close to 588k. start by calculating r fb1 to satisfy the following relations: r fb1 = v float ? 588k v fb(reg) find the closest 0.1% or 1% resistor to the calculated value. with r fb1 calculate: r fb2 = v fb(reg) ? r fb1 v float C v fb(reg) C 1000 ? where 1000 represent the typical value of r fbg . this is the resistance of the fbg pin which serves as the ground return for the battery float voltage divider. figure 6. programming the float voltage with the ltc4120 22f r fb1 v float li-ion 4120 f06 r fb2 enable bat fb fbg i fb ltc4120 lt c4120/lt c4120-4.2 4120fe
15 for more information www.linear.com/ltc4120 o pera t ion once r fb1 and r fb2 are selected, recalculate the value of v float obtained with the resistors available. if the error is too large substitute another standard resistor value for r fb1 and recalculate r fb2 . repeat until the float voltage error is acceptable. table 1 and table 2 list recommended standard 0 .1% and 1% resistor values for common battery float voltages. table 1: recommended 0.1% resistors for common v float v float r fb1 r fb2 typical error 3.6v 887k 1780k C0.13% 4.1v 1.01m 1.42m 0.15% 4.2v 1.01m 1.35m C0.13% 7.2v 1.8m 898k 0.08% 8.2v 2.00m 825k 0.14% 8.4v 2.05m 816k 0.27% table 2: recommended 1% resistors for common v float v float r fb1 r fb2 typical error 3.6v 887k 1780k C0.13% 4.1v 1.02m 1.43m 0.26% 4.2v 1.02m 1.37m C0.34% 7.2v 1.78m 887k 0.16% 8.2v 2.00m 825k 0.14% 8.4v 2.1m 845k C0.50% programming the charge current the current-error amp ( c-ea) measures the current through an internal 0.3 current sense resistor between the chgsns and bat pins . the c-ea outputs a fraction of the charge current, 1/h prog , to the prog pin. the voltage-error amp (v-ea) and pwm control circuitry can limit the prog pin voltage to control charge current. an internal clamp (d z ) limits the prog pin voltage to v prog , which in turn limits the charge current to: i chg = h prog ? v prog r prog = 1212v r prog i chg _ trkl = h prog ? v prog _ trkl r prog = 120v r prog where h prog is typically 988 , v prog is either 1.227v or 122mv during trickle charge, and r prog is the resistance of the grounded resistor applied to the prog pin. the prog resistor sets the maximum charge current , or the current delivered while the charger is operating in constant- current (cc) mode. analog charge current monitor the prog pin provides a voltage signal proportional to the actual charge current. care must be exercised in mea - suring this voltage as any capacitance at the prog pin forms a pole that may cause loop instability . if observing the prog pin voltage, add a series resistor of at least 2k and limit stray capacitance at this node to less than 50pf. in the event that the input voltage cannot support the demanded charge current, the prog pin voltage may not represent the actual charge current. in cases such as this, the pwm switch frequency drops as the charger enters drop-out operation where the top switch remains on for more than one clock cycle as the inductor current attempts to ramp up to the desired current. if the top switch remains on in drop-out for 8 clock cycles a dropout detector forces the bottom switch on for the remainder of the 8th cycle. in such a case, the prog pin voltage remains at 1.227v, but the charge current may not reach the desired level. undervoltage current limit the undervoltage current limit (uvcl) feature reduces charge current as the input voltage drops below v uvcl (typically 12v). this low gain amplifier typically keeps v in within 100mv of v uvcl , but if insufficient power is avail- able the input voltage may drop below this value ; and the charge current will be reduced to zero . lt c4120/lt c4120-4.2 4120fe
16 for more information www.linear.com/ltc4120 o pera t ion ntc thermal battery protection the ltc4120 monitors battery temperature using a therm - istor during the charging cycle. if the battery temperature moves outside a safe charging range , the ic suspends charging and signals a fault condition until the tempera - ture returns to the safe charging range. the safe charging range is determined by two comparators that monitor the voltage at the ntc pin. ntc qualified charging is disabled if the ntc pin is pulled below about 85mv (v dis ). thermistor manufacturers usually include either a tem - perature lookup table identified with a characteristic curve number , or a formula relating temperature to the resistor value. each thermistor is also typically designated by a thermistor gain value b 25/85 . the ntc pin should be connected to a voltage divider from intv cc to gnd as shown in figure 7. in the simple application (r adj = 0) a 1% resistor, r bias , with a value equal to the resistance of the thermistor at 25c is connected from intv cc to ntc, and a thermistor is con- nected from ntc to gnd. with this setup, the ltc4120 pauses charging when the resistance of the thermistor increases to 285 % of the r bias resistor as the tempera- ture drops. for a vishay curve 2 thermistor with b 25/85 = 3490 and 25c resistance of 10k, this corresponds to a temperature of about 0c. the ltc4120 also pauses charging if the thermistor resistance decreases to 57.5% of the r bias resistor. for the same vishay curve 2 therm - istor, this corresponds to approximately 40c. with a vishay cur ve ? 2 thermistor, the hot and cold comparators both have about 2c of hysteresis to prevent oscillations about the trip points. the hot and cold trip points may be adjusted using a differ - ent type of thermistor, or a different r bias resistor, or by adding a desensitizing resistor , r adj , or by a combination of these measures as shown in figure 7 . for example, by increasing r bias to 12.4k, with the same thermistor as before, the cold trip point moves down to C5c, and the hot trip point moves down to 34c. if a vishay curve 1 thermistor with b 25/85 = 3950 and resistance of 100k at 25c is used, a 1% r bias resistor of 118k and a 1% r adj resistor of 12.1k results in a cold trip point of 0c, and a hot trip point of 39c. end-of-charge indication and safety timeout the ltc4120 uses a safety timer to terminate charging. whenever the ltc4120 is in constant current mode the timer is paused, and if fb transitions through the v rchg threshold the timer is reset. when the battery voltage reaches the float voltage, a safety timer begins count - ing down a 2-hour timeout. if charge current falls below one-tenth of the programmed maximum charge current (h c/10 ), the chrg status pin rises, but top-off charge current continues to flow until the timer finishes . after the timeout, the ltc4120 enters a low power sleep mode. automatic recharge in sleep mode, the ic continues to monitor battery volt - age. if the battery falls 2 .2% ( v rchg or v rchg_42 ) from the full-charge float voltage, the ltc4120 engages an automatic recharge cycle. automatic recharge has a built-in filter of about 0.5ms to prevent triggering a new charge cycle if a load transient causes the battery voltage to drop temporarily. figure 7. ntc connections + r bias r ntc li-ion t 4120 f07 r adj opt bat ntc 74% intv cc too cold too hot ignore ntc intv cc ltc4120 36.5% intv cc 2% intv cc + ? + ? + ? lt c4120/lt c4120-4.2 4120fe
17 for more information www.linear.com/ltc4120 o pera t ion state of charge and fault status pins the ltc4120 contains two open-drain outputs which provide charge status and signal fault indications. the binary-coded chrg pin pulls low to indicate charging at a rate higher than c/10. the fault pin pulls low to indicate a bad battery timeout , or to indicate an ntc thermal fault condition. during ntc faults the chrg pin remains low, but when a bad battery timeout occurs the chrg pin de- asserts. when the open-drain outputs are pulled up with a resistor, table 3 summarizes the charger state that is indicated by the pin voltages. table 3. ltc4120 open-drain indicator outputs with resistor pull-ups fault chrg charger state high high off or topping off charging at a rate less than c/10 high low charging at rate higher than c/10 low high bad battery fault low low ntc thermal fault charging paused low battery voltage operation the ltc4120 automatically preconditions heavily dis - charged batteries. if the battery voltage is below v lowbat minus its hysteresis (typically 2.05ve.g., battery pack protection has been engaged) a dc current, i lowbat , is applied to the bat pin from the intv cc supply. when the battery voltage rises above v lowbat , the switching regula - tor is enabled and charges the battery at a trickle charge level of 10 % of the full-scale charge current (in addition to the dc i lowbat current). trickle charging of the battery continues until the sensed battery voltage (sensed via the feedback pin for the ltc4120) rises above the trickle charge threshold, v trkl . when the battery rises above the trickle charge threshold, the full-scale charge current is applied and the dc trickle charge current is turned off. if the battery remains below the trickle charge threshold for more than 30 minutes, charging terminates and the fault status pin is asserted to indicate a bad battery . after a bad battery fault , the ltc4120 automatically restarts a new charge cycle once the failed battery is removed and replaced with another battery . the ltc4120-4.2 monitors the batsns pin voltage to sense lowbat and trkl conditions. precision run/shutdown control the ltc4120 remains in a low power disabled mode until the run pin is driven above v en (typically 2.45v). while the ltc4120 is in disabled mode, current drain from the battery is reduced to extend battery lifetime , the status pins are both de-asserted, and the fbg pin is high impedance. charging can be stopped at any time by pulling the run pin below 2.25v. the ltc4120 also offers an extremely low operating current shutdown mode when the run pin is pulled below v sd (typically 0.7v). in this condition less than 20a is drawn from the supply at in. differential undervoltage lockout the ltc4120 monitors the difference between the battery voltage, v bat , and the input supply, v in . if the difference (v in -v bat ) falls to v duvlo , all functions are disabled and the part is forced into shutdown mode until (v in -v bat ) rises above the v duvlo hysteresis. the ltc4120-4.2 monitors the batsns and in pin voltages to sense duvlo condition . user selectable buck operating frequency the ltc4120 uses a constant-frequency synchronous step-down buck architecture to produce high operating efficiency. the nominal operating frequency of the buck, f osc , is programmed by connecting the freq pin to either intv cc or to gnd to obtain a switching frequency of 1.5mhz or 750khz, respectively. the high operating frequency allows the use of smaller external components. selection of the operating frequency is a trade-off between efficiency, component size, and margin from the minimum on-time of the switcher. operation at lower frequency improves efficiency by reducing internal gate charge and switching losses, but requires larger inductance values to maintain low output ripple . operation at higher frequency allows the use of smaller components, but may require sufficient margin from the minimum on-time at the lowest duty cycle if fixed-frequency switching is required. lt c4120/lt c4120-4.2 4120fe
18 for more information www.linear.com/ltc4120 o pera t ion pwm dropout detector if the input voltage approaches the battery voltage , the ltc4120 may require duty cycles approaching 100%. this mode of operation is known as dropout . in dropout, the operating frequency may fall well below the programmed f osc value. if the top switch remains on for eight clock cycles, the dropout detector activates and forces the bottom switch on for the remainder of that clock cycle or until the inductor current decays to zero. this avoids a potential source of audible noise when using ceramic input or output capacitors and prevents the boost sup - ply capacitor for the top gate drive from discharging. in dropout operation, the actual charge current may not be able to reach the full-scale programmed value. in such a scenario the analog charge current monitor function does not represent actual charge current being delivered. burst mode operation at low charge currents, for example during constant-voltage mode, the ltc4120 automatically enters burst mode opera - tion. in burst mode operation the switcher is periodically for ced into standby mode in order to improve efficiency . the ltc4120 automatically enters burst mode operation after it exits constant-current (cc) mode and as the charge current drops below about 80ma. burst mode operation is triggered at lower currents for larger prog resistors, and depends on the input supply voltage. refer to graph burst mode trigger current and graph typical burst mode waveform, in the typical performance characteristics , for more information on burst mode operation . burst mode operation has some hysteresis and remains engaged for battery currents up to about 150ma. while in burst mode operation, the prog pin voltage to average charge current relationship is not well defined. this is due to the prog pin voltage falling to 0v in between bursts, as shown in g14. if the prog pin voltage falls below 120mv for longer than 350s this causes the chrg pin to de-assert, indicating c/ 10. burst current ripple depends on the selected switch inductor, and v in /v bat . boost supply refresh the boost supply for the top gate drive in the ltc4120 switching regulator is generated by bootstrapping the boost flying capacitor to intv cc whenever the bottom switch is turned on. this technique provides a voltage of intv cc from the boost pin to the sw pin. in the event that the bottom switch remains off for a prolonged period of time, e.g., during burst mode operation, the boost supply may require a refresh. similar to the pwm dropout timer, the ltc4120 counts the number of clock cycles since the last boost refresh. when this count reaches 32, the next pwm cycle begins by turning on the bottom side switch first. this pulse refreshes the boost flying capacitor to intv cc and ensures that the topside gate driver has sufficient voltage to turn on the topside switch at the beginning of the next cycle. operation without an input supply or wireless power when a battery is the only available power source , care should be taken to eliminate loading of the in pin. load current on in drains the battery through the body diode of the top side power switch as v in falls below v sw . to prevent this possibility , place a diode between the input supply and the in capacitor, c in . the rectification diode (d9 in figure 5 and figure 11) in the wireless power ap - plications also eliminates this discharge path. alternately, a p-channel mosfet may be placed in series with the ba t pin provided care is taken to directly sense the positive batter y terminal voltage with fb via the battery resistive divider. this is illustrated in figure 15. lt c4120/lt c4120-4.2 4120fe
19 for more information www.linear.com/ltc4120 a pplica t ions i n f or m a t ion wireless power transfer in a wireless power transfer system, power is transmitted using alternating magnetic fields. power is transferred based on the principle that an ac current in a transmit - ter coil produces an ac current in a receiver coil that is placed in the magnetic field generated by the transmitter coil . the magnetic field coupling is described by the mu - tual inductance, m. this term does not have a physical representation but is referred to using the unit-less terms k and n. where k is the coupling coefficient: k = m l x ? l r and n is the turns ratio the number of turns in the receiver coil divided by the number of turns in the transmitter coil: n = n r n x = l r l x the turns ratio is proportional to the square root of the ratio of receiver coil inductance to transmitter coil inductance. in the wireless power transfer system an ac current, i ac , applied to the transmit coil l x , produces an ac current in the receive coil, l r of: i r(ac) = 2 ? ? m ? i ac = 2 ? ? k ? l x ? l r ? i ac the coupling coefficient is a variable that depends on the orientation and proximity of the transmitter coil relative to the receiver coil. if the two coils are in a transformer, then k = 1. if the two coils are completely isolated from each other then k = 0. in a typical ltc4120 -based wireless power design, k varies from around 0.18 at 10mm spac - ing, to about 0.37 with the coils at 3mm spacing. this is illustrated in figure 9. with low resistance in the l x and l r coils , the efficiency is inherently high , even at low coupling ratios . the transmitter in figures 4 and 10 generates a sine wave at the resonant frequency, f o , across the transmitter coil and capacitor (l x ||c x ). with a peak-to-peak amplitude that is proportional to the applied input voltage: v ac ? 2 ? ? v dc this generates a sinusoidal current in the transmit coil with peak-to-peak amplitude: i ac = v ac 2 ? ? f o ? l x ? v dc f o ? l x the ac voltage induced at the receive coil is a function of both the applied voltage, the coupling, as well as the impedance at the receiver. with no load at the receiver, the open-circuit voltage, v in(oc) , is approximately: v in(oc) ? k ? n ? 2 ? ? v dc the receiver ( shown in figures 5 and 10) uses a resonant tuned circuit followed by a rectifier to convert the induced ac voltage into a dc voltage to power the ltc4120 and charge a battery . power delivered to the ltc4120 depends on the impedance of the ltc4120 and the impedance of the tuned circuit at the resonant frequency of the trans - mitter. the ltc4120 employs a proprietary circuit, called dynamic harmonization control (dhc) that modulates the impedance of the receiver depending on the voltage at the input to the ltc4120. this technique ensures that over a wide range of coupling coefficients the induced rectified voltage does not exceed voltage compliance ratings when the load goes away (e.g, when the battery is fully charged). dhc efficiently adjusts the receiver impedance depending on the load without compromising available power. in the event that the coupling may become too large (e.g. receiver coil is placed too close to the transmitter coil) then it is recommended to place a zener diode across the figure 9. coupling coefficient k vs distance + + + + + + + x x x x x x x x x x x x x x 0.50 no misalignment 5mm misalignment 10mm misalignment 0.45 0.40 0.35 0.30 coupling coefficient (k) 0.25 0.20 0.15 0.10 0 1 2 3 4 5 coil distance (mm) 6 7 8 9 10 4120 f09 figure 8. wireless power transfer i r 1:n i ac l r 4120 f08 l x v r lt c4120/lt c4120-4.2 4120fe
20 for more information www.linear.com/ltc4120 a pplica t ions i n f or m a t ion input to the ltc4120 to prevent exceeding the absolute maximum rating of the ltc4120. diode d6 (in figure 4 and figure 10) illustrates this connection. the rms voltage at the rectifier output depends on the load of the ltc4120, i.e., the charge current, as well as the applied ac current, i ac . the applied ac current depends both on the components of the tuned network as well as the applied dc voltage . the load at the receiver depends on the state of charge of the battery . if the coupling and/ or the applied ac current is not well controlled, the addi - tion of a 39v zener diode ( d6 in figures 4 and 10) at the input to the ltc4120 will prevent overvoltage conditions from damaging the ltc4120. resonant transmitter and receiver an example dc/ac transmitter is shown in figure 10. a 5v 5% supply to the transmitter efficiently produces a cir culating ac current in l x , which is coupled to l r . for higher voltage inputs, a pre-regulator dc/dc converter can be used to generate 5v (see figure 11). power is transmitted from transmitter to receiver at the resonant c4 0.01f r1 100 c5 0.01f c x 0.3f l x 5h l r d2 d1 l b1 68h l b2 68h v cc 4.75v to 5.25v transmitter receiver r2 100 d2 m1 m2 d3 d1 d4 d3 c3 l1 c2s2 c2s1 c2p1 c1 10f c5 10f d4 39v opt c4 2.2f c2 47f c2p2 dhc intv cc boost sw chgsns bat fb fbg 4120 f10 in gnd u1 ltc4120 + v in u1 lt3480 gnd bd boost sw pg vc run/ss sync rt fb c9 0.47f c7 0.068f c8 330pf r5 20k c10 22f m4 2n7002l m3 si2333ds v cc 5v connect to tx v cc r8 150k l3 4.7f d5 dfls240l c6 4.7f hv in 8v to 38v gnd r4 40.2k r3 150k r7 536k r10 100k r6 100k 4120 f11 figure 10. dc/ac converter, transmit/receive coils, tuned series resonant receiver and ac/dc rectifier figure 11. high voltage pre-regulator for transmitter lt c4120/lt c4120-4.2 4120fe
21 for more information www.linear.com/ltc4120 a pplica t ions i n f or m a t ion table 4. recommended transmitter and high voltage pre-regulator components transmitter components item description manufacturer/part number d2, d3 diode, schottky, 40v, 2a on semi nsr10f40nxt5g d1, d4 diode, zener, 16v, 350mw, sot23 diodes bzx84c16 m1, m2 mosfet, smt, n-channel, 60v, 11m, s08 vishay si4470ey-t1ge3 l b1 , l b2 ind, smt, 68h, 0.41a, 0.4, 20% tdk vlcf5028t-680mr40-2 c4, c5 cap, chip, x7r, 0.01f, 10%, 50v, 0402 murata grm155r71h103ka88d r1, r2 res, chip, 100, 5%, 1/16w, 0402 vishay crcw0402100rjned c x1, 2 cap, chip, pps, 0.15f, 2%, 50v panasonic echu1h154gx9 cap, chip, pps, 0.1f, 2%, 50v panasonic echu1h104gx9 cap, chip, pps, 0.033f, 2%, 50v panasonic echu1h333gx9 c x (opt) cap, pps, 0.15f, 2.5%, 63vac, mks02 wima mks0d031500d00jssd cap, pps, 0.10f, 2.5%, 63vac, mks02 wima mks0d03100 cap, pps, 0.033f, 2.5%, 63vac, mks02 wima mks0d03033 l x 5.0h transmit coil tdk wt-505060-8k2 - lt or 6.3h transmit coil tdk wt-505090-10k2-a11-g or 6.3h transmit coil wrth 760308111 or 5.0h transmit coil inter-technical l41200t02 high voltage pre-regulator components u1 lt3480edd, pmic 38v, 2a, 2.4mhz step-down switching regulator with 70a quiescent current linear tech lt3480edd m3 mosfet, smt, p-channel, C12v, 32m, sot23 vishay si2333ds m4 mosfet, smt, n-channel, 60v, 7.5, 115ma, sot23 on semi 2 n7002l d5 diode, schot tky, 40v, 2a, powerdi123 diodes dfls240l l3 ind, smt, 4.7h, 1.6a, 0.125, 20% coilcraft lps4018-472m c6 cap, chip, x5r, 4.7f, 10%, 50v, 1206 murata grm155r71h4755ka12l c7 cap, chip, x5r, 4.7f, 10%, 50v, 0603 murata grm188r71h683k c8 cap, chip, cog, 330pf, 5%, 50v, 0402 tdk c1005cog1h331j c9 cap, chip, x7r, 0.47f, 10%, 25v, 0603 murata grm188r71e474k c10 cap, chip, x5r, 22f, 20%, 6.3v, 0805 taiyo-yuden jmk212bj226mg r3, r8 res, chip, 150k, 5%, 1/16w, 0402 vishay crcw0402150jned r4 res, chip, 40.2k, 1%, 1/16w, 0402 vishay crcw040240k2fked r5 res, chip, 20k, 1%, 1/16w, 0402 vishay crcw040220k0fked r6, r10 res, chip, 100k, 1%, 1/16w, 0402 vishay crcw0402100kfked r7 res, chip, 536k, 1%, 1/16w, 0402 vishay crcw0402536kfked 1 c x = 300nf with 5h l x coil, or c x = 233nf with 6.3h l x coil. 2 pay careful attention to assembly guidelines when using echu capacitors, as the capacitance value may shift if the capacitor is over heated while soldering. plastic film capacitors such as panasonic echu series or metallized polypropylene capacitors such as wima mkp as suitable for the transmitter frequency, f o ; which depends on both component values as well as the load at the receiver. the tolerance of the components selected in both the transmitter and receiver circuits is critical to achieving maximum power transfer . the voltages across the receiver components may reach 40v, so adequate voltage ratings must also be observed. resonant converter component selection it is recommended to use the components listed in table ?4 and table 5 for the resonant transmitter and receiver respectively. figure 12 illustrates the pcb layout of the embedded receiver coil. figures 13 and 14 show the finished transmitter and receiver . the 25mm ferrite bead lt c4120/lt c4120-4.2 4120fe
22 for more information www.linear.com/ltc4120 a pplica t ions i n f or m a t ion table 5. recommended receiver components item description manufacturer/part number d1, d2, d3 diode, schottky, 40v, 2a, powerdi123 diodes dfls240l d4 (opt) diode, zener, 39v, 5%, 1w, powerdi123 diodes dflz39 l r ind, embedded, 47h, 43 turns with 25mm ferrite bead embedded 4-layer pcb (see figure 12) adams magnetics b67410-a0223-x195 or 47h receiver coil tdk wr282840-37k2-lr3 or 47h receiver coil wrth 760308101303 or 48h receiver coil inter-technical l41200r02 l1 ind, smt, 15h, 260m, 20%, 0.86a, 4mm 4mm coilcraft lps4018-153ml c2p1 cap, chip, cog, 0.0047f, 5%, 50v, 0805 murata grm21b5c1h472ja01l c2p2 cap, chip, cog, 0.00018f, 5%, 50v, 0603 kemet c0603c182j5gac7533 c2s1 cap, chip, cog, 0.022f, 5%, 50v, 0805 murata grm21b5c1h223ja01l c2s2 cap, chip, cog, 0.0047f, 5%, 50v, 0805 murata grm21b5c1h472ja01l c1 cap, chip, x5r, 10f, 20%, 16v, 0805 tdk c2012x5r1c106k c2 cap, chip, x5r, 47f, 10%, 16v, 1210 murata grm32er61c476ke15l c3 cap, chip, x7r, 0.01f, 20%, 6.3v. 0402 tdk c1608x7r1h103k c4 cap, chip, x5r, 10f, 20%, 16v, 0805 tdk c2012x5r1c106k u1 400ma wireless synchronous buck battery charger linear tech ltc4120 top metal 3rd metal 2nd metal bottom metal 4120 f12 l1 ? top side l2 l3 l4 ? bottom side finished thickness to be 0.031" 0.005" total of 4 layers with 2oz cu on the outer layers and 2oz cu on the inner layers layer structure figure 12. 4-layer pcb layout of rx coil lt c4120/lt c4120-4.2 4120fe
23 for more information www.linear.com/ltc4120 a pplica t ions i n f or m a t ion in figure 14 covers the embedded receiver coil described in figure 12. gerber layout files for both the transmitter and receiver boards are available at the following link: http://www.linear.com/product/ltc4120#demoboards alternative component values can be chosen by following the design procedure outlined below. resonant transmitter tuning: l x , c x the basic transmitter (shown in figure 4) has a resonant frequency, f o , that is determined by components l x , and c x . the selection of l x and c x are coupled so as to obtain the correct operating frequency. the selection of l x and l r is also coupled to ideally obtain a turns ratio of 1:3. having selected a transmitter inductor, l x , the transmitter capacitor should be selected to obtain a resonant frequency of 130khz. due to limited selection of standard values, several standard value capacitors may need to be used in parallel to obtain the correct value for f o : f o ? 1 2 ? ? l x ? c x = 130khz the transmitter inductor and capacitor, l x and c x , support a large circulating current . series resistance in the inductor is a source of loss and should be kept to a minimum for optimal efficiency. likewise the transmitter capacitor(s), c x , must support large ripple currents and must be selected with adequate voltage rating and low dissipation factors. resonant receiver tuning: l r , c2s, c2p the tuned circuit resonance of the receiver , f t , is determined by the selection of l r and c2s + c2p. select the capaci- tors to obtain a resonant frequency 1% to 3% below f o : f t ? 1 2 ? ? l r ? c2p + c2s ( ) as in the case of the transmitter, multiple parallel capacitors may need to be used to obtain the optimum value. finally, select the detuned resonance, f d to be about 5% to 15% higher than the tuned resonance, keeping the value of c2p below 30nf to limit power dissipation in the dhc pin: f d ? 1 2 ? ? l r ? c2s alternative transmitter options the resonant dc/ac transmitter discussed in the previous section is a basic and inexpensive to build transmitter. however, this basic transmitter requires a relatively pre - cise dc input voltage to meet a given set of receive power requirements . it is unable to prevent power transmission to foreign metal objectsand can therefore cause these objects to heat up. furthermore, the operating frequency of the basic transmitter can vary with component selection . figure 13. tx layout: demo circuit 1968a figure 14. rx layout with ferrite shield: demo circuit 1967a-b lt c4120/lt c4120-4.2 4120fe
24 for more information www.linear.com/ltc4120 a pplica t ions i n f or m a t ion ltc4120 customers can also choose more advanced transmitter options. with additional features such as: foreign metal detection; operation over a wide input voltage range; and fixed operating frequency. for more information on advanced transmitter options refer to the wireless power users guide. maximum battery power considerations using one of the approved transmitter options with this wireless power design provides a maximum of 2w at the input to the ltc4120. it is optimized for supplying 400ma of charge current to a 4.2v li-ion battery. if a higher bat - tery voltage is selected , then a lower charge current must be used as the maximum power available is limited . the maximum battery charge current , i chg(max) , that may be programmed for a given float voltage, v float , can be calculated based on the charger efficiency, eff , as: i chg(max) eff ? 2w v float the charger efficiency, eff , depends on the operating conditions and may be estimated using the buck efficiency curve in the typical performance characteristics . do not select a charge current greater than this limit when selecting r prog . input voltage and minimum on-time the ltc4120 can operate from input voltages up to 40v. the ltc4120 maintains constant frequency operation under most operating conditions. under certain situations with high input voltage and high switching frequency selected and a low battery voltage , the ltc4120 may not be able to maintain constant frequency operation. these factors, combined with the minimum on-time of the ltc4120, impose a minimum limit on the duty cycle to maintain fixed-frequency operation. the on-time of the top switch is related to the duty cycle (v bat /v in ) and the switching frequency, f osc in hz: t on = v bat f osc ? v in when operating from a high input voltage with a low bat - tery voltage , the pwm control algorithm may attempt to enfor ce a duty cycle which requires an on-time lower than the ltc4120 minimum, t min( on) . this minimum duty cycle is approximately 18 % for 1.5mhz operation or 9% for 750khz operation. typical minimum on-time is illustrated in graph g11 in the typical performance characteristics section. if the on-time is driven below t min(on) , the charge current and battery voltage remain in regulation , but the switching duty cycle may not remain fixed, and/or the switching frequency may decrease to an integer fraction of its programmed value. the maximum input voltage allowed to maintain constant frequency operation is: v in(max) = v lowbat f osc ? t min(on) where v lowbat , is the lowest battery voltage where the switcher is enabled. exceeding the minimum on-time constraint does not affect charge current or battery float voltage , so it may not be of critical importance in most cases and high switching frequencies may be used in the design without any fear of severe consequences. as the sections on inductor selection and capacitor selection show, high switching frequencies allow the use of smaller board components , thus reducing the footprint of the applications circuit. fixed-frequency operation may also be influenced by dropout and burst mode operation as discussed previously. switching inductor selection: l sw the primary criterion for switching inductor value selection in an ltc4120 charger is the ripple current created in that inductor. once the inductance value is determined, the saturation current rating for that inductor must be equal to or exceed the maximum peak current in the inductor, i l(peak) . the peak value of the inductor current is the sum of the programmed charge current, i chg , plus one-half of the ripple current, ?i l . the peak inductor current must also remain below the current limit of the ltc4120, i peak : i l(peak) = i chg + ? i l 2 < i peak lt c4120/lt c4120-4.2 4120fe
25 for more information www.linear.com/ltc4120 a pplica t ions i n f or m a t ion the current limit of the ltc4120, i peak , is at least 585ma ( and at most 1250ma). the typical value of i peak is illustrated in graph r sns current limit vs temperature , in the typical performance characteristics. for a given input and battery voltage , the inductor value and switching frequency determines the peak-to-peak ripple current amplitude according to the following formula: ? i l = v in C v bat ( ) ? v bat f osc ? v in ? l sw ripple current is typically set to be within a range of 20% to 40% of the programmed charge current, i chg . to obtain a ripple current in this range, select an inductor value us - ing the nearest standard inductance value available that obeys the following formula : l sw v in(max) C v float ( ) ? v float f osc ? v in(max) ? 30% ? i chg ( ) then select an inductor with a saturation current rating at a value greater than i l(peak) . input capacitor: c in the ltc4120 charger is biased directly from the input supply at the v in pin. this supply provides large switched currents, so a high quality, low esr decoupling capacitor is recommended to minimize voltage glitches at v in . bulk capacitance is a function of the desired input ripple voltage (?v in ), and follows the relation: c in(bulk) = i chg v bat v in ? v in f ( ) input ripple voltages (?v in ) above 10mv are not recom - mended. 10 f is typically adequate for most charger applications, with a voltage rating of 40v. reverse blocking when a fully charged battery is suddenly applied to the bat pin, a large in-rush current charges the c in capacitor through the body diode of the ltc4120 topside power switch. while the amplitude of this current can exceed several amps, the ltc4120 will survive provided the battery voltage is below the maximum value of 11v. to completely eliminate this current, a blocking p-channel mosfet can be placed in series with the bat pin . when the battery is the only source of power, this pfet also serves to decrease battery drain current due to any load placed at v in . as shown in figure 15, the pfet body diode serves as the blocking component since chrg is high impedance when the battery voltage is greater than the input voltage. when chrg pulls low, i.e. during most of a normal charge cycle, the pfet is on to reduce power dissipation. this pfet requires a forward current rating equal to the programmed charge current and a reverse breakdown voltage equal to the programmed float voltage. figure 15 illustrates how to add a blocking pfet connected with the ltc4120. a pplica t ions i n f or m a t ion figure 15. reverse blocking with a p-channel mosfet in series with the b at pin + bat bst sw chgsns 22f 10f 22nf 2.2f r prog r fb1 49.9k 4.99k 470k r fb2 li-ion fb fbg gnd chrg run intv cc v in v in ltc4120 si2343ds prog 4.7f l sw 4120 f15 lt c4120/lt c4120-4.2 4120fe
26 for more information www.linear.com/ltc4120 a pplica t ions i n f or m a t ion bat capacitor and output ripple: c b at the ltc4120 charger output requires bypass capacitance connected from bat to gnd (c bat ). a 22f ceramic capacitor is required for all applications . in s ystem s where the battery can be disconnected from the charger output, additional bypass capacitance may be desired. in this type of application, excessive ripple and/or low amplitude oscillations can occur without additional output bulk capacitance . for optimum stability , the additional bulk capacitance should also have a small amount of esr. for these applications, place a 100f low esr non-ceramic capacitor ( chip tantalum or organic semiconductor capaci - tors such as sanyo os-cons or poscaps) from bat to gnd, in parallel with the 22f ceramic bypass capacitor, or use large ceramic capacitors with an additional series esr resistor of less than 1. this additional bypass capacitance may also be required in systems where the battery is connected to the charger with long wires . the voltage rating of all capacitors applied to c bat must meet or exceed the battery float voltage. boost supply capacitor: c bst the boost pin provides a bootstrapped supply rail that provides power to the top gate drivers. the operating volt - age of the boost pin is internally generated from intv cc whenever the sw pin pulls low. this provides a floating voltage of intv cc above sw that is held by a capacitor tied from boost to sw. a low esr ceramic capacitor of 10nf to 22nf is sufficient for c bst , with a voltage rating of 6v. intv cc supply and capacitor: c intvcc power for the top and bottom gate drivers and most other internal circuitry is derived from the intv cc pin. a low esr ceramic capacitor of 2.2f is required on the intv cc pin. the intv cc supply has a relatively low current limit (about 20ma) that is dialed back when intv cc is low to reduce power dissipation. do not use the intv cc voltage to supply power for any external circuitry apart from the ntcbias network . when the run pin is above v en the a pplica t ions i n f or m a t ion intv cc supply is enabled , and when intv cc rises above uv intvcc the charger is enabled. calculating power dissipation the user should ensure that the maximum rated junction temperature is not exceeded under all operating conditions. the thermal resistance of the ltc4120 package ( ja ) is 54c/w; provided that the exposed pad is soldered to suf - ficient pcb copper area. the actual thermal resistance in the application may depend on for ced air cooling or other heat sinking means , and especially the amount of copper on the pcb to which the ltc4120 is attached. the actual power dissipation while charging is approximated by the following formula: p d ? v in C v bat ( ) ? i trkl + v in ? i in(switching) + r sns ? i chg 2 + r ds(on)(top) ? v bat v in ? i chg 2 + r ds(on)(bot) ? 1C v bat v in ? ? ? ? ? ? ? i chg 2 during trickle charge (v bat < v trkl ) the power dissipation may be significant as i trkl is typically 10ma, however during normal charging the i trkl term is zero. the junction temperature can be estimated using the fol - lowing formula: t j = t a + p d ? ja where t a is the ambient operating temperature. significant power is also consumed in the transmitter electronics. the large ac voltage generated across the l x and c x tank results in power being dissipated in the dc resistance of the l x coil and the esr of the c x capacitor. the large induced magnetic field in the l x coil may also induce heating in nearby metallic objects. lt c4120/lt c4120-4.2 4120fe
27 for more information www.linear.com/ltc4120 a pplica t ions i n f or m a t ion pcb layout to prevent magnetic and electrical field radiation and high frequency resonant problems, proper layout of the components connected to the ltc4120 is essential. for maximum efficiency , the switch node rise and fall times should be minimized. the following pcb design priority list will help insure proper topology . layout the pcb using the guidelines listed below in this specific order. 1. keep foreign metallic objects away from the transmit - ter coil . metallic objects in proximity to the transmit coil will suffer from induction heating and will be a source of power loss . with the exception of a ferrite shield that can be used to improve the coupling from transmitter coil to receiver coil when placed behind the transmitter coil. advanced transmitters from powerbyproxi include features to detect the presence of foreign metallic objects that mitigates this issue. 2. v in input capacitor should be placed as close as pos - sible to the in and gnd pins, with the shortest copper traces possible and a via connection to the gnd plane 3 . place the switching inductor as close as possible to the sw pin. minimize the surface area of the sw pin node. make the trace width the minimum needed to support the programmed charge current, and ensure that the spacing to other copper traces be maximized to reduce capacitance from the sw node to any other node. 4. place the bat capacitor adjacent to the ba t pin and ensure that the ground return feeds to the same cop - per that connects to the input capacitor ground before connecting back to system ground . 5. route analog ground ( run ground and int v cc capaci- tor ground) as a separate trace back to the ltc4120 gnd pin before connecting to any other ground . 6. place the intv cc capacitor as close as possible to the intv cc pin with a via connection to the gnd plane. 7. route the dhc trace with sufficient copper and vias to support 350ma of rms current, and ensure that the spacing from the dhc node to other copper traces be maximized to reduce capacitance and radiated emi from the dhc node to other sensitive nodes. 8. it is important to minimize parasitic capacitance on the prog pin. the trace connecting to this pin should be as short as possible with extra wide spacing from adjacent copper traces. 9. minimize capacitive coupling to gnd from the fb pin. 10. maximize the copper area connected to the exposed pad. place via connections directly under the exposed pad to connect a large copper ground plane to the ltc4120 to improve heat transfer. design examples the design example illustrated in figure 16, reviews the design of the resonant coupled power transfer charger application. first the design of the wireless power receiver circuit is described . then consider the design for the charger function given the maximum input voltage , a battery float voltage of 8.2v, and a charge current of 200ma for the ltc4120. this example also demonstrates how to select the switching inductance value to avoid discontinuous conduction; where switching noise increases. the wireless power receiver is formed by the tuned net - work lr and c2p, c2 s. this tuned network automatically modulates the resonance of the tank with the dhc pin of the ltc4120 to optimize power transfer. the resonant frequency of the tank should match the oscillation fre - quency of the transmitter. given the transmitter shown in figure 4 this frequency is 130khz. the tuned receiver resonant frequency is: f t = 1 2 ? ? lr ? (c2p + c2s) = 127khz in this design example, the de-tuned resonant frequency is: f d = 1 2 ? ? lr ? c2s = 142khz lt c4120/lt c4120-4.2 4120fe
28 for more information www.linear.com/ltc4120 a pplica t ions i n f or m a t ion f d should be set between 5% and 15% higher than f t . a higher level gives more control range but results in more power dissipation. a 47h coil is selected for l r to obtain a turns ratio of 3:1 from the transmitter coil, l x = 5h. now c2 s can be calculated to be 26.7nf. two standard parallel 50v rated capacitors , 22nf and 4.7nf, provide a value within 1% of the calculated c2s. now c2p can be calculated to be 6.5nf which can be obtained with 4.7nf and 1. 8nf capacitors in parallel. all of the capacitors should be selected with 5% or better tolerance. the rectifier , d8, d9 and d5 are selected as 50v rated schottky diodes. now consider the design circuit for the ltc4120 charger function. first, the external feedback divider, r fb1 /r fb2 , is found using standard 1% values: r fb1 = 8.2v ? 588k 2.4v ? 2.00m r fb2 = 2.00m ? 588k 2.00m C 588k ? 825k with these resistors, and including the resistance of the fbg pin, the battery float voltage is 8.212v. with an 8.2v float voltage the maximum charge current available is limited by the maximum power available from the rcpt at eff = 85% charger efficiency: i chg(max) 85% ? 2w 8.2v = 207ma a charge current of 200ma is achieved by selecting a standard 1% r prog resistor of: r prog = h prog ? v prog i chg = 6.04k while charging a battery , the resonant receiver is loaded by the charge current, this load reduces the input voltage from the open-circuit value to a typical voltage in a range from 12v ( at uvcl) up to about 26v. the amplitude of this voltage depends primarily on the amount of coupling between the transmitter and the receiver , typically this voltage is about 17v. the maximum loaded input voltage is used to select the operating frequency and influences the value of the switch - ing inductor . the saturation current rating of the switching inductor is selected based on the worst case conditions at the maximum open-cir cuit voltage. a typical 2- cell li-ion battery pack engages pack protection for v bat less than 5v, this is the lowest voltage considered for determining the on-time and selecting the 1.5mhz operating frequency. t on = 5v 1.5mhz ? 17v = 476ns > t min(on) now the switching inductor value is calculated . the induc - tor value is calculated based on achieving a 30% ripple current . the ripple current is calculated at the typical input operating voltage of 17v: l3 > 17v C 8.2v ( ) ? 8.2v 1.5mhz ? 17v ? 30% ? 200ma ( ) = 48h 56 h is the next standard inductor value that is greater than this minimum. this inductor value results in a worst-case ripple current at the input open-circuit voltage , v in(oc) . v in(oc) is estimated based on the transmitter design in figure 4, at the largest coupling coefficient k = 0.37 as: v in(oc) = k ? n ? ? v in(tx) v in(oc) = 0.37 ? 3 ? 3.14 ? 5v = 34.9v ? i l = 34.9v C 8.2v ( ) ? 8.2v 1.5mhz ? 56h ? 34.9v = 75ma this results in a worst-case peak inductor current of: i l(peak) = i chg + ? i l 2 = 237ma select an inductor with a saturation current rating greater than the worst-case peak inductor current of 237ma. lt c4120/lt c4120-4.2 4120fe
29 for more information www.linear.com/ltc4120 a pplica t ions i n f or m a t ion select a 50v rated capacitor for c in = 10f to achieve an input voltage ripple of 10mv at the typical operating input voltage of 17v: ? v in = 200ma ? 8.2v 17v 10f = 10mv and select 6v rated capacitors for c intvcc = 2.2f, c boost = 22nf, and c bat = 22f. optionally add diode d6, a 1w, 39v zener diode if the coupling from transmitter to receiver coils is not well enough controlled to ensure that v in remains below 39v when the battery is fully charged. finally the run pin divider is selected to turn on the char - ger once the input voltage reaches 11.2v. with r3 = 374k and r4 = 102k the run pin reaches 2.4v at v in = 11.2v. with this run pin divider, the ltc4120 is disabled once v in falls below 10.5v. for this design example, power dissipation during trickle charge, where the switching charge current is 20ma at v bat = 3v and i in switching = 5ma, is calculated as follows: p d = 20v C 3v ( ) ? 10ma + 20v ? 5ma + 0.3 ? ? 0.02a 2 + 0.8 ? ? 3v 20v ? 0.02a 2 + 0.5 ? ? 1C 3v 20v ? ? ? ? ? ? ? 0.02a 2 = 0.27w this dissipated power results in a junction temperature rise of: p d ? ja = 0.27w ? 54c/w = 15c during regular charging with v bat > v trkl , the power dissipation reduces to: p d = 20v ? 5ma + 0.3 ? ? 0.2a 2 + 0.8 ? ? 8.2v 20v ? 0.2a 2 + 0.5 ? ? 1C 8.2v 20v ? ? ? ? ? ? ? 0.2a 2 = 0.14mw this dissipated power results in a junction temperature rise of 6c over ambient. lt c4120/lt c4120-4.2 4120fe
30 for more information www.linear.com/ltc4120 p ackage descrip t ion please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. 3.00 0.10 (4 sides) recommended solder pad pitch and dimensions 1.45 0.05 (4 sides) note: 1. drawing conforms to jedec package outline mo-220 variation (weed-2) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 bottom view?exposed pad 1.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 1 pin 1 notch r = 0.20 typ or 0.25 45 chamfer 15 16 2 0.50 bsc 0.200 ref 2.10 0.05 3.50 0.05 0.70 0.05 0.00 ? 0.05 (ud16) qfn 0904 0.25 0.05 0.50 bsc package outline ud package 16-lead plastic qfn (3mm 3mm) (reference ltc dwg # 05-08-1691 rev ?) lt c4120/lt c4120-4.2 4120fe
31 for more information www.linear.com/ltc4120 information furnished by linear technology corporation is believed to be accurate and reliable . however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights . r evision h is t ory rev date description page a 12/13 updated table 4 component values and brands. 20 b 03/14 removed word battery from float voltage range bullet. modified various specification limits and removed some temp dots. modified frequency range, resistor values and note 3. amended i in curves. modified text to reflect typical f osc values. updated text for v prog servo. amended equation for f d . modified i chg equation. changed description of end-of-charge indication. modified typical f osc values. modified resonant converter selection. added high voltage pre-regulator schematic. added table 4: recommended transmitter and high voltage pre-regulator components. added table 5: recommended receiver components. added figure 11, pcb layout of rx coil. added figure 12, tx layout: photo of demo circuit 1968a. added figure 13, rx layout: photo of demo circuit 1967a-b modified text of f osc and f t . modified f t equation. modified equation for t on , l3, ?i l , and i l(peak) and changed power dissipation calculations. 1 3 4 7 8 9 14 15 16 17 20 20 20 20 20 20 20 23 28 29 c 05/14 increased minimum v in to 12.5v added fixed 4.2v float version, throughout document, also added electrical parameters for C4.2 increased i fb specification to typ 25na reduced min rechg threshold to C38mv modified v prog servo voltage spec by +3mv and C3mv loosened v trkl threshold voltage spec by C20mv and +10mv increased typ v trkl hysteresis spec to 50mv changed conditions on i sw specification to in = open-circuit from in = float revised r sns current limit typical performance characteristics curve added typical v float performance characteristics curve corrected error in i in(switching) current curve (x-axis) added block diagram of C4.2 batsns connections changed v in labels to in in figure 4, 5, and 10 remove sw inductor selection tables 6, 7, 8, and 9 changed location of bat decoupling cap in figure 15 with reverse blocking diode corrected error in l3 equation and substituted correct 56h inductor 1, 3 1 to 32 3 3 3 4 4 4 5 6 8 11 12, 13, 20 n/a 25 28 d 01/15 change cbat from 10f to 22f add wrth p/n for rx coil add inter-tech p /n for tx and rx coils remove dos on 68 bias inductor in basic tx schematic for clarity 1, 9, 10, 11, 14, 25, 26, 29 and 32 22 21, 22 12, 20 e 05/15 clarified battery charge current vs temperature curve clarified end-of-charge and battery recharge sections modified operation without an input supply section enhanced reverse blocking section modified intv cc supply and capacitor section 6 16 18 25,26 26 lt c4120/lt c4120-4.2 4120fe
32 for more information www.linear.com/ltc4120 ? linear technology corporation 2013 lt 0515 rev e ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/ltc4120 r ela t e d p ar t s typical a pplica t ion part number description comments an138 wireless power users guide lt3650-8.2/ lt3650-8.4 monolithic 2a switch mode non-synchronous 2-cell li-ion batter y charger standalone 9v v in 32v (40v absolute maximum), 1mhz, 2a programmable charge current, timer or c/10 termination, small and few external components, 3mm 3mm dfn-12 package -8.2 for 2 4.1v float voltage batteries, -8.4 for 2 4.2v float voltage batteries lt3650-4.1/ lt3650-4.2 monolithic 2a switch mode non-synchronous 1-cell li-ion batter y charger standalone 4.75v v in 32v (40v absolute maximum), 1mhz, 2a programmable charge current, timer or c/10 termination, small and few external components, 3mm 3mm dfn-12 package -4.1 for 4.1v float voltage batteries, -4.2 for 4.2v float voltage batteries lt3652hv power tracking 2a battery charger input supply voltage regulation loop for peak power tracking in (mppt) solar applications standalone, 4.95v v in 34v (40v absolute maximum), 1mhz, 2a charge current, 3.3v v out 18v. timer or c/10 termination, 3mm 3mm dfn-12 package and msop-12 packages ltc4070 li-ion/polymer shunt battery charger system low operating current (450na), 1% float voltage accuracy over full temperature and shunt current range, 50ma maximum internal shunt current (500ma with external pfet), pin selectable float voltages: 4.0v, 4.1v, 4.2v. ultralow power pulsed ntc float conditioning for li-ion/polymer protection, 8-lead (2mm 3mm) dfn and msop ltc4071 li-ion/polymer shunt battery charger system with low battery disconnect integrated pack protection, <10na low battery disconnect protects battery from over-discharge. low operating current (550na), 1% float voltage accuracy over full temperature and shunt current range, 50ma maximum internal shunt current, pin selectable float voltages: 4.0v, 4.1v, 4.2v. ultralow power pulsed ntc float conditioning for li-ion/polymer protection, 8-lead (2mm 3mm) dfn and msop ltc4065/ ltc4065a standalone li-ion battery charger in 2mm 2mm dfn 4.2v 0.6% float voltage, up to 750ma charge current ; a version has /acpr function. 2mm 2mm dfn package figure 16. resonant coupled power transfer charger application intv cc in run freq chrg fault 2k boost sw chgsns dhc r prog 6.04k 4120 f16 li-ion t c bst 22nf c2s 26.7nf c2p 6.5nf l r 47h l x 5h c in 10f d8 d5 d6 opt d9 c intvcc 2.2f c bat 22f v float 8.2v l sw 56h ntc prog ltc4120 gnd bat fb fbg r fb1 2.00m r fb2 825k 10k + 2k 374k 102k d5, d8, d9: dfls240l d6: mmsz5259bt1g or dflz39 (opt) l sw : slf6028-470mr59 t: nths0402n02n1002f tx circuitry lt c4120/lt c4120-4.2 4120fe

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