analog devices fax-on-demand hotline - page 111 analog w devices i high power output" hybrid digital- to-synchro/resolver converters drc1m~drc1746 i features 14- or 16-bit resolution 2 or 4 arc-minutes accuracy 2va max mean output drive capability full accuracy for de to 2.6khz reference full accuracy with dc or pulsating power supplies (pps) guaranteed operation with 3v dc pedestal on pps can drive pure inductive, resistive or highly capacitive loads ls or cmos latched inputs with separate highllow byte enable low radius vector variation (0.03%) optional transzorb tm protection against inductive spikes on output protected against +200% overvoitage on analog input remote output sensing facility no trims or external adjustments full output short circuit protection single 4o-pin package hi rei, mil-std b83b versions available appuca tions driving synchro and resolver control transformers avionic equipment (e.g., air data computers) interfacing with servo systems fire control system outputs naval retransmission unit outputs outputs to radars and navigational aids aircraft and naval simulators general description the drcl745 and drc1746 are hybrid packaged digital-to- resolver converters. they accept a 14-bit or 16-bit digital input word representing angle and output sine and cosine voltages multiplied by an analog input. the converters maintain full accuracy when the analog input frequency is in the range dc to 2.6khz. the units have internal power amplifiers capable of driving a 2v a load which can be pure inductive, resistive or highly capaci- tive. the output is fully short-circuit protected against overcurrenr. the output of the converter can be used to drive directly into resolver control tnmsformers or in conjunction with an external transformer module to drive synchro control transformers. the power available is more than adequate to drive au standard synchro control transformers. the separately powered output stage is compatible with conven- tional :t 15v dc power supplies or pulsating'power supplies with pedestal components as low as 3v dc. trauszorb ia a rej:istercd trademark of general semicoadui:tor ldduatries, inc. rev. a information furnished by analog devices is believed to be accurate and reliable. however. no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. functional block diagram ,-,sv + 15vip, -1sv a_, cos {2a sin ",t cos "' sin sense sin 1m sin ",t sin "' sig gnp cds sense v"' a,o fa sin ,.ii ,sv il options onlyi lbe hbe "'giti" gno -15vip! input (to' note, "a",", "gno", and "sig gnd" are internally connected in star point. the use of pulsating power supplies greatly reduces the internal power dissipation in the hybrid package which in turn maximizes the converter's mean time between failures (mtbf). a particular feature of the converters is that they have a remote sensing facility which means that output accuracy can be main- tained even when long lines have to be driven. the converter's data inputs are latched and the latches can be cmos or low power schottky (ls). the former gives advantages in terms of power dissipation and the latter in terms of glitch performance when used in fast dynamic update modes. the latches are transparent and have a separate high and low byte enable. as an option, the output stage can be fitted with internal trans- zorb tm protection. this gives full protection against transient voltages generated by an inductive load in response to an abrupt change in load current. this condition can occur at switch off or as a consequence of external power supply fault conditions. the units are packaged in 4o-pin dual in line hybrid packages and require no external trims or adjustments. models available the drc1745 (14-bit resolution) and drc1746 (l6-bit resolution) are available with accuracies of :!: 2 or :t 4 arc-minutes. both units have optional transzorb protection and a choice of either ls or cmos inputs (see ordering information). two sets of reference and output transformers are available. the stml660/stm1663 operates over 47hz to 440hz while the stm1680/stm1683 operates over 360hz to 2.6khz. the transformers can be scott t connected to provide a synchro output format. one technology way, p,o, box 9106, norwood, ma 02062-9106. u.s.a. tel: 617/329.4700 fax: 617/326.8703 twx; 710/394-6577 telex: 924491 cable: analog norwoodmass ~~ obsolete
analog devices fax-on-dehand hotline - page 11 orc 1745/drc1746 - specifications ~~~~:s;n;::)oc and :t15v power supplies, unless notes 'v." is in-if <-pod to . '~v power ...pplia. 1&"", co , ,boulel .., c ! iowa. 'w""', -- error "i.. """""'- ,. ..",. + ~ voil ...pply -. ... tblin u.jv bek.. gnd poi..boi. 'c.x=r poiorily ~ t be """"""'*... rj,c . t~v md ,he "i~v(i') pins. 't- 01 ."'v . 15(1') ...pplia m." be ined. 'adoquoic heal ..ok , be --'0 "'*p ,be '"'" -"""" less than 125'c. .spocici<8 . l>acj7.~. spocir"""l1 ,.bioeicnl nia '" o.olarc-minrc(max) output drive capability 1.5va(max_n) output impedance :t 300ma_kii<' io.6vpcsk . 11.8 v output nia 2.9f1(typ) phaseshift(v.bftovo) o.os'@ioohz . 26v output n/a 13.6(i(typ) !iov output n/a ls6fl (typ) output protection dc isolation ov.rvoltasc tnon.zorb(optional) voitjls" iooov iooov :: 1 zv "...dff, '" 15v clamp . overclurcnl limit ..t@)55omapeak. (ca.. beader size must be main..;ncd (ii; 12s'c nux). ' stmi680 1.12 x 1.12" 0.4" response to a step input zoils (mu) to within """u,,"e)' of c<>nvcn?. (28.5 x 28.5 x 1o.2mm) stmi683 2.25><112><0.4" any size digital...p input. ' (57.1 "'28.5>< io.2mm) vector accuracy temperature range radius error ().()3% . operating --s5"cto+125"c -s5"cto + 12s'c angwarerror :;;2or :t4arc-minu,cs . storasc -60"cto ...150"c - 6o"c t ... 15o"c power supply (no load)"'" weight (mu) lsutcllopti"", + is volt< isma(typ) 22ma (mu) . stmi680 1.5 oz (41 grams) - 15 vol" isma(ryp)22ma(mu) . stmi683 1. s o;z (70 grams) + i5(p) volts 20ma(ryp) 34ma(mox) . -15(p)voiu 20ma(typ) 34ma(max) . + 5 volts 44ma (iyp) 12ma (max) . iota man, nol appi;abje. cmos l.atcb opti"", + 15 vol", 14ma (typ) 3oma(ma:x) . -is vol.. i sma (typ) 22ma (max) . + is(p)voil$ loma(typ)34ma(max) . - u(p) volts 20ma(ryp)34ma(max) . additional current (ldad dependent) + i5(p) vol" 4ooma peak(max) . -15(p)voits 400mapcak(max) . pulsating power suppl y pedestal ]vde(min) . power dissipation see power i)jssipo.tion scctin of ihis daluheet. . case temperature range' - 55"clo + 125"coperaling . - 6s"c to + i so"c storase . size 4o-pin dll 1.14.,,2.14 xo.is" . (19.0)( 54.4 x 4.6"",,) . weight 0.9 o;z (25 gram.) . obsolete
analog devices fax-on-demand hotline - page 12 drc1745/drc1746 theory of operation the operation of the drci745 and drci746 is illustrated in the block diagram shown in figure i. the reference voltage, vr,ef, (a sin wt) is multiplied by both sin a and cos e where 6 is the digital angle. the resultant outputs then pass through the current booster output stage to provide the resolver format output voltages viz: 2a sinwt sin e (sine output) and 2asinwtcos6 (cosoutput) (note: convener has a gain of 2 from input to output.) + 1511 -'1;11 +'sii(p! a... sig gno sin sense sin (2a sin ",' sin iii cos sense cos (2.0 sin .,t cos '" 'a ;;~'wt! au> +511 'l options only! lbe hue digital "nd.- 15111pi input ,i, note, ".0'0'" "gno.', and " ""'d" are interhally connected in star point. figure 7. theory of operation connecting the converter the connections to the drcl745 and drc1746 are very straightforward. the digital inputs should be connected to the converter using pins 1 (msb) through 14 (lsb) in the case of the drcl745 and through 16 (lsb) in the case of the drci746. the format of the digital angular input is shown under the "bit weight table" section on this page. the digital input control lines should be connected as described under the "digital data input" section. alo and am are for the analog input reference voltage (vref). it should be noted that this is a single ended input where alo is grounded internally. if it is desired, the vilef input can be externally isolated using the stmi680 or stmi660 transformer. see the section on "output and reference transformers". the converters have separate power supply inputs for the output amplifier stage ( + 15v(p) and - 15v(p? and for the remainder of the converter (+ 15v and -15v), when dc power supplies arc used for the output stage, the supplies may' be linked. however, when pulsating power supplies are used for the output stage, a separate dc supply must be provided for the + 15v and -15v requirement, the conveners have internal capacitive decoupling of 47nf on both power stage and convener supply but it is recommended that 6.8~f capacitors arc taken from the + 15v and -15v pin to "gnd", the "case" pin is joined to the case which is isolated and should be: wlulect~ to a convenient zero potential point in the system. rev,a the sine and cosine outputs are taken from the "sin" and "cos" pins with "81g gnd" as the common connection. the remote sense facility using "cos sense" and "sin sense" connections should be used as described under the "remote output sensing" heading, if not used, the sense outputs should be connected to the corresponding sin and cos outputs. digital data input the digital input to the converters is internally buffered by transparent latches. the latches will be cmos (type 54c373) or low power schottky (lsxtype 54ls373) depending on the option. the "hbe" input controls the input of the most significant 8 bits and the "lbe" input controls the input of the least significant bits (6 in the case of the drci745 and 8 in the case of the drc1746). a logic "hi" on the control lines causes the input to appear transparent and the converter output will follow the changes on the digital input. when "hbe" and "lbe" arc taken to a logic "lo" state, the converter output will be latched at the level of the data present on the input at the low going edge and remains constant until "hbe" and "lbe" arc taken to a "hi" state again. if the latches are not required, "hbe" and "lbe" can be left open circuit. the timing diagram in figure 2 illustrates the use of "hbe" and "lbe". internal resistive pull-ups (to + 5v using 27k resistors) are employed on all digital inputs. this ensures full ttl compatibility for either latch option even when sourcing 50j.1a of leakage current into each external digital driver. d',~~ xxxj sta8le data r><><><:><: i i i n i i ~ t, , i i h8,"l8e i i i i , i it,. 5n,maxlsoptions i 140nsmax cmos options , t, "20n.maxlsoptions , on, max cmos options note, internauatches are , s313(ls! s4cj1jicmost figure 2. data transfer diagram bit weight table bit number wdght in depees 1 (msb) 180.0000 2 90.0000 3 45.0000 4 22.5000 5 11.2500 6 5,6250 7 2,8125 8 1.4063 9 qro31 10 0.3516 ii ql~8 12 0.0879 13 0.0439 14 (lsbdrci745) 0.0220 15 0.0110 16 (lsbdrci746) 0.0055 -3- -~ obsolete
analog devices fax-on-demand hotline - page 13 drc1745/drc1746 power dissipation, pulsating power supplies and 8ea t sinking the drc1745 and the drci746 can be used with conventional de power supplies or a pulsating power supply on the output stage (see figure 3). the laner gives significant reductions in power dissipation within the hybrid package without any attendant loss of accuracy. when using a pulsating power supply, full advantage can be taken of the special design which allows the power supply to have a very low de pedestal voltage. this results in minimized power dissipation. the pedestal voltage can in fact be as low as 3 volts. the combined pedestal plus peak supply voltage must not exceed the absolute maximum rating. full accuracy is retained during operation on pulsating power supplies because the output stage employing these supplies is only used to provide current gain. overalj operational loop gain is independently powered. there are no special switch-on/switch. off power supply sequencing requirements, and fulj internal protection is provided. the section below demonstrates the power dissipation differences for different load conditions when using dc supplies and pulsating power supplies. dc power supplies: with inductive loads, the dc resistance is low compared with ac impedance; therefore care should be taken to ensure that no dc offset occurs at the sin and coo outputs. note that under external current limit conditions asymmetry of the power supplies could occur, forcing a large dc offset to be present at the sin and cos outputs causing heavy power dissipation in the device. case temperature must be maintained below 125g. as the reference input, ari> is directly coupled, output offset will occur if any dc component is present at this input. when using de power supplies, the expression for additional load dependent power dissipation is: 2v.u)i', i ir i volicosa p = -;:-- (!sme + ,,",ooe) - 2 where v 0 is the peak output voltage. ii is the peak valne of the output load current. e is the digjtal angle. ex is the load phase angle. v de is the dc power supply voltage (usually :t 15 volts). pulsating power supplies: when using a pulsating power supply, the expression for additional load dependent power dissipation within the hybrid is: 2vti i i i i va,,!1 p = =-:l.!. (sine + cos6) + - (sina-acosa) 'it 11' where v lie is the peak ac component of the pulsating power supply assumed equal to the peak output voltage, vo. i, is the peak value of the output load current. e is the digital angle. ex is the load phase angle. v p is the dc pedestal vol rage of the pulsating power supply. vo note that ii = jzf where vo = peak output voltage = 2xvref izj = output load waveform must be in phase with converter reference ev""" = a sin ",tl consistent with maintaining a power supply excess over the output waveform grater -man v... v.. iv be usually eouals v 0) figure 3. pulsating power supply format (1) examples of power dissipation: many factors influence the power dissipation within the hybrid. the foljowing two examples, using typical load values and worst case digital angle conditions (45 degrees), illustrate the saving in power dissipation which can be achieved by using ii pulsating power supply employing a low pedestal voltage. note that in the following examples we have chosen: v de = :t is volts vp = 3volts vo = 9.6volts(6.8voltsrms) v o = 9.6 volts (should be chosen to equal yo) ii = 292ma(equivajenttoa1.4vameanload) 1) dc power supply, e = 45 resistive load. p = 2x15xo.292(sin45 +cos45) - 9.6xo.292xl 'it 2 = 3.943 - 1.402 = 2.54 watts (2) 2) as example (i) but with a 3 volt pedestal pulsating power supply. from equation (2): p = 2 x 3 x 0.292(sin45 +cos45) + 9.6 x 0.292 x 0 'it 1t = 0.79 watts thus the pulsating power supply has cut down the internal dissipation by 1.75 watts, a ratio of 3.2:1. a similar calculation using an inductive load shows a reduction from 3.94 watts, using a de power supply, to 1.68 watts, when a 3 volt pedestal pulsating power supply is used. thus the pulsating power supply has cut down the internal dissipation by 2.26 watts, a ratio of 2.3:1. the graph shown in figure 4 shows the temperature at the hottest part of the base of the hybrid (in the middle of the base between" + 15v(p)" and the opposite un/c" pin) for resistive loads up to 2v a using de supplies and pulsating supplies with pedestals of 3 volts and 5 volts. figure 5 shows a similar graph for inductive loads up to iva. -4- rev. a obsolete
analog devices fax-on-demand hotline - page 1~ drc1745/drc1746 >55 "'1--.". 135 i' ,." , ~ 115 i 105 ~ .. ...~_.. ~ iii ;j <> ~ 75 x .. .. d.d d.o 1.0 1.8 2.0 d." 1.d 1.2 u 0.2 d.4 load power - va note, 1. _81e",~ temperature 21'1:. no heat slftk, 2. temperature monitored with worst case digital 'nnt '46'. 3. temperature measured on hotjest part of; case figure 4. case temperature for resistive loads as can be seen from figures 4 and 5, it will be necessary to provide heat sinking when driving significant loads in order to keep the temperature of the case below its 12s.c maximum. the converters have been designed with a flat metal base to facilitate mounting on heat sinking materials. special thermal management, utilizing direct eutectic bonding, has been employed in the output stage to minimize thermal resistance to: angle 0,90 45". 135 6junctionlcase = less than irc/watt ejunctionlcase = less than 6c/watt consequently the internal junction temperatures do not exceed case header temperature by more than 20c when using pulsating power (even under worst case pure inductive load conditions. the maximum permitted junction temperature is 15s.c). calculating the load the following describes how to calculate the load. in the case of synchro control transformers, first determine the value of zio' this impedance is normally quoted by the synchro manufacturer. the load presented by the control transformer will be: 3 v2 4 x iz ' wbcr~ v2 is the rms signal input voltagc. when the stm1683 output transformer pair is used, it is necessary [0 add o.25v a to the calculated figure to allow for transformer magnetizing current. for the stmi663 output transformer a figure ofo.30va should be added. for example, assume that a 90v rms signal, 400hz synchro control transformer is to be driven by the drcl745 in conjunction with the stm1683/412 output transformer pair. (the stm1683/ 412 boosts the 6.8v rms signal from the drcl74s to the 9ov rms required by the control transformer.) zso for the control transformer is quoted as: 700 + j4900 rev. a ~........_... ~ 116 ~ cr: i ::: .. " i % '" .. 0.0 1.0 1.6 d.' d,o ... 1,2 1.4 1.8 2.0 load power - va note, ,. amiiient t'mperatube 21'(;.",0 heat sink. 2. temperature monitored with wobs, case digital input ,...,. j. temperature measured on hotiest part df case. figure 5. case temperature for inductive loads therefore iz""i = v'700t + 49002 = 4950 ohms therefore, the load presented by the control transformer is: 9023 4950x4 = 1.23va adding to this value o.25va for the stml683 gives a figure of 1.48v a total. in the case of a resolver control transformer the same exercise must be performed but it is not necessary to multiply by 3/4. some resolver manufacturers quote rms input current and in this case the load will be the product of the input current and the rms voltage used to drive it. the 0.25v a must be added if the stm1683 transformer pair is used. driving capacitive loads syncbros and resolvers often employ capacitive tuning to minimize power dissipation. tbis tuning can be on tbe load itself or (pref- erably for best accuracy) on the primary of the transformer driving the load. full tuning modifies the load to appear resistive at the reference frequency, but it appears progressively more capacitive at all frequencies above. since the converter is an active negative feedback device, it is essential to include a low value resistor in series with each tuning capacitor to prevent highly dissipative output stage oscillation. this resistor must not be less than 3.30. a value of 5.6n is recommended when referred to the output of the drcl74s1 drc1746. the drc1745 and drc1746 can readily drive capacitive inputs up to ioonf at the converter output terminals without special precautions. however, please consult the factory when extreme lengths of screened cable or any other cases of high capacitance are to be driven. for example in the case of step-up transformers where the effective capacitance to be driven is: ceft = nlct. where cl is the capacitive load. -5- 16s 145 1js i' 1:>5 obsolete
analog devices fax-on-demand hotline - page 15 drc1745/drc1746 sin sense sin loa!> e stm1683 t"""sfoame" drc174511748 sig gnd cos c:os sense note, the "emote sense e,oolity 1$ shown .. the above diagram. c, is the tuning capacitoio. figure 6. incorporating a resistor in the tuning circuit care must be taken in tolerancing the tuning capacitors when using secondary tuning since the significant output impedance of typical output transformers can give rise to capacitive balance related angular errors. the use of these precaurions enables the converters to drive fully tuned 2v a loads. for more informarion please send for relevant application note. short circuit protection the short circuit current limit is set at <600ma maximum. under short circuit or excessive current conditions, the overcurrent protection circuit will trip and reduce the output current to zero. in order to minimize power dissipated under current limit conditions the device goes into a switching mode, testing the load condition at a high frequency. when the overload conditions are removed, the output is auto- matically restored to its normal condition. vector errors and effects the error law used in the converter has no inherent vector errors. the figure of 0.03% given in the specification is accounted for by tolerances in some of the thin-film resistor networks used in the converter. these very low vector errors make the conveners ideally suited for applications such as displays, or metal cutting control where perfect circles have to be generated. bandwidth the open loop gain bandwidth product of the drc1745 and drc 1746 has been tailored to ensure that the full angular accuracy is maintained over the broadband range of dc to 2.6khz. this results in a closed loop bandwidth of 300khz. remote sense facility and additional output errors . a remote sense facility is included in the drc1745 and drc1746 in order to reduce errors caused by the output interconnection wiring when driving large loads. the magnitude of this error is illustrated by two examples below. . assume that the sine and cosine load impedances are perfectly matched and the sine output wiring resistance matches the cosine output wiring resistance to within 5%. then for a resistive load of lava (33 ohms) and the worst case angle of 45 degrees, there will be 1.3 arc-minutes of extra error introduced for every 250 milliohms of resistance for the loop wiring between the converter and the load. (awg2z "" 17m!l/ft, 1 oz pcb copper = 4oomfl/ft.) in the case of an inductive load under similar conditions, 500 milliohms would produce the same error. using the remote sense facility as shown in figure 7 will half this error or allow twice the distance to be driven for the same additional error. if the remote sense is not used, then "cos sense" should be joined to "cos" and "sin sense" should be joined to "sin" at the pcb edge connector. note also that when output transformers are used with the converters they should be regarded as the load and the remote sense wires taken to the transformer primary inputs. sense wiring may employ minimum wire gauge; it does not carry load current. cas load dflc1745/1746 sin cos sense cds gnd sin goo figure 7. using the remote sense facility the ground returns from the load should be individually wired and star-poim connected at the converter's signal ground. any common resistance in the signal returns will produce errors due to the summation of the sin and cos outputs. with a resistive load of 33 ohms at lava, and at the worst angles of 0 and 90, there will be 1.3 arc-minutes of extra error introduced for every 12.5 milliohms of common signal return resistance. transzorbtm output protection as an option, the output stages of the converter can be internally fined with transzorb protection. this form of protection can be advantageous and significantly increase the mean time between failures when driving inductive loads. the transzorbs, which are effectively back to back zener diodes, give full protection against transient voltages generated by an inductive load in response to an abrupt change in load current. such a change can occur at switch off or as a consequence of external power supply fault conditions. the transzorbs are rated to give pro. tection against worst case transients corresponding to an instan. taneous interruption of the converter when driving into a full 2v a pure inducrive load with the converter operating at the maximum case temperature of 125c. figure 8 shows a simplified diagram of the converter output stage indicating the action of the transzorb when the 15 volt supply is interrupted. it is important to appreciate that destructively high voltages can be generated (given by e = ldi/dt) even for modest inductive loading, under many fault conditions, since dijdt is effectively uncontrolled. internal transzorb protection is a bener and more direct solution to the problem than employing a pair of reverse biased diodes to the output stage power supplies. this is because the transient is contained within the specific load disturbed and does not escape into the power supply wiring and hence cause possible damage to other equipments and devices. a domino effect of catastrophic failure is therefore prevented. tr~rb is a registt:m trademark of general semiconductor ladustries, la". -6- rev. a obsolete
analog devices fax-on-demand hotline - page 16 drc1745/drc1746 y t1;;~ipj . ,'15vipi sig ond o!p - -, , i i i i i i i ' -.i oip isin oft cost 0 - - - - -... i" i i i i i i i i i t.- j l\.~l.' ~at slo ghd with pronctio.. "0 piionction figure 8. drc7745/drc1746 output stage showing transzorb protection figure 9 shows the nature of transient wavefonns where by the very large transient voltage generated by the inductive load is limited to a safe clamp level when it is applied to the output stage. outplff curretolt ---,--,-.--.-- powe" supf'l y interrupted output voltage v~, 7 transzoab exti..ouished ~ " ,- ,j voltage which would have existed i wrrliotjt transzorii protection ,- i i i "v transzori clamp- le"el ldl. e,. ar figure 9. transient waveforms and transzorb clamping in addition, there arc conventional diode clamps on the ::!: 15v(p) power supplies. output and reference transformers a set of low profije (0.4" high) reference and output transfonners (which are capable of handling the full drive capability of the drc1745 and drc1746 over a frequency range of 360hz to 2.6khz) are available in order to accept the standard voltage formats of synchros and resolvers. the reference transfonner, stm1680, can accept voltages of 11.8 volts, 26 volts or 115 volts depending on the option and its output is 3.4 volts nns which is suitable for connecting to am and aw on the converter. the output transfonner pair, stm1683, accepts the 6.8 volts rids output of the converter and provides a synchro or resolver format depending on the option. note: for resolver option for the stm1683 transformer, part number is rtm1683. the pin out and dimensions of the stm1680 and stm1683 are shown on the next page, and the connection to the converter in figure 10. note: for operation over the frequency range 47hz to 440hz a similar set of transformers are available (1.0" profile height). part numbers are stml660 (reference transformer) and stml663 (output transformer). rev. a cos r., sin sin sense s1 s3 cas sense drci1451174s 52 a~ "<0 r,o note, fo" sync~o output uct" must be connected to "tc", for resolver output utc" is s. ,no link} figure 10. connecting the drc7745 to the stm1680 and stm1683 transformers resistive input scaling the analog reference input can be externally resistively scaled to cater for a wide range of voltage both when used with or without the reference transformer, stm1680/stml660. when the converters are used with the stm1680/stml660 transfonner, a resistance of value 3kfl per extra volt required should be inserted in the am line. care should be taken to ensure that the voltage on the analog input (am, alo) is 3.4 volts rms in order to provide a full scale analog output. the maximum output voltage of the converter is proportional to the input voltage (gain of 2) and therefore the resistor tolerance should be chosen so that the correct voltage appears across the am, alo pins. note that the input to the reference transformer should not exceed the rated max. note that the best dc output offset performance is achieved when the stm1680/stml660 transformer is used. however the use of resistive scaling can never cause an additional offset of greater than 6.5mv (max), 2.6mv (typ). other products we manufacture a wide range of hybrid and modular circuits for processing synchro and resolver information. please ask for our comprehensive literature. -7- ~-~ -- obsolete
stml683 - page 17 drc1745/drc1746 outline dimensions packaging specifications dimensions shown in inches and (mm). stm1680 ~~.'~--j i--aa"",.",---i i i t -.':. stm1680 "~. analog a devices op'tlon """'d u,. inthi$1'o8i1ion t2uai / ~, a.. ~'::!!..o_" /a~~ i= -l.... - av r ., ,,", 0 ".'", ..""'-'21 y < 1 i t r 1-0_""""--\ i 1 0 ..".. ""---1 i-,~i",:,~ i 1."0 i t un [".111 i 1-1 "",ng - '.'"".'" 0'" 'h"ll th"[oos> ~u'a"u"---i.ol1om v..w analog devices fax-on-demand hotline i===: '.1" '28.58'--: 1 ~','~-i r:==~.~'n"'--i i ii 6 t t~. 510000'", ~ "" 1 i'iiianalog "' 1 "1 :dmce$ . -0 0 '.\231'."1 i t 1::== 1.m ,"'..., 3.000 "".80) i -~ 0 s'" ond [01 01 0 option mark'd stm1683 ~/ ..::\'.mh"n opticn :~:~ii cjfrr d.'" -1 j ""01 '.01. ,ou1! c:::j,\ i s'r'al no. maa... 'nthlsrcsmon i.:. 1."">9."'- ,:;~:!-i i ii."a i t '.4>1 111.111 l ~ j aottom viw '.n' ",.,.. nons 1. "tc" aeads "..- -cr- aeaos ," on msol yea"""",,, , ,..". z. dfmfinslon -a- is ... "0.21i'0il st'm"" and stm...,. tntt"'-""""""'a.. .0.."" -d._or .a.25mm. -o"..m. drc1745/1746 i~t 14.11 -+ ,1--0.'00(2.51 typ 10.175'" 0.010 . 1.90g!48.31 . 14.4'" 0.25) pin o~e green glass .ead ~ooooqoooq - .. .. .. '" .. ~ .. .. ;: ~ ; 0000000000 =;;:;;:q!!~~~~ :;; ~ t l.t40 i - (/j 8 ~~t. "';z'" .., 1!/:is., i5~~.!.::. " ~~~~=r{c~~~~~~~~~~~~ 00000000000000000000 ~ -i botto~ view . 2.140 154.4! pins t5 . ,. a"e not connecfeo inici on ""'01745. pon ., is "nic" on "c" option and" +sv" on "l" option. tolerances ..d...'n...) un less o1>iei\wise sf attd ordering information drc j i745/l r t r 4 ~ /l add b after pan number 1745 = 14-b~t resolu~on ~~t'.liability processing 1746 = i>.bl1 resoluuon 2=:r2 arc-mins accuracy i i 4 = :!:: 4 arc-mins accuracy l = low power schottky input latches c = cmos input latches. t = internal tltidszorb protection 0 = without trantizorb protection stmi680.a 1680 = 360hz-zo6khz---i h a = z6v (26v reference, synchro) a = 115v (1j5v reference, syncltro) a = i1v8 (1i.8v reference, resolver) a = 26v (26v reference:, resolver) stmi683.4yz stm for synchro jtilg z = 1 (11.8v nnssynchrooutput) output option. z = 2 (90v nns synchro output) z = 3 (11.8v nns resolver output) rtm for resolver z = 4 (26v nus resolver output) output options z = 8 (i 1.8v rms resolver output) 1683 - 36ohz-2.6kh:t y = 1360hz to 2.6khz (stm1683 only) y = 247hz to 440hz (stmi663 only) 4 = - 55"c to + 125"c operatids temperature range, ~ n ~ ('oj i ii! 0) ('oj d ? tri ::) ~ c ~ z g: -8- rev. a ~-- ---- . -l. i 00 >0 .- 30 01 i i -0 l 0 , 0 . . 7 . 0 . 0- -@- i akino in . """mon i ..,. d." 'us} "'.r ,. full threa.s, a 0 0 0 i . . 4 obsolete
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