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1/45 ? semiconductor msm6652/53/54/55/56-xxx, msm6652a/53a/ 54a/55a/56a/ 58a-xxx, msm66p54-xx, MSM66P56-XX, msm6650 internal mask rom voice synthesis ic, internal one-time-programmable (otp) rom voice synthesis ic, external rom drive voice synthesis ic this document contains minimum specifications. for full specifications, please contact your nearest oki office or representative. fedl6650-03 general description the msm6650 family is the successor to oki's msm6375 family. to ensure high-quality voice synthesis, the msm6650 family members offer adaptive differential pulse-code modulation (adpcm) playback, pulse-code modulation (pcm) playback, 12-bit d/a conversion, and on-chip C40 db/ octave low-pass filter (lpf). the conventional "beep" tones and 2-channel playback are now easier to use. oki has added additional functions such as melody play, fade-out, and random playback. oki has improved external control by adding an edit rom. the edit rom can be used to form sentences by linking phrases. the msm6650 family members can support a variety of applications as it can function in either standalone mode or microcontroller interface mode. in microcontroller interface mode, serial input control is available. serial input control minimizes the number of microcontroller port pins required for voice synthesis control. the msm6650 family includes an internal mask rom version, internal one-time-programmable (otp) rom version, and external rom version. the features of the msm6650 family devices are as follows. ? msm6652/53/54/55/56-xxx these devices are single-chip voice synthesizers with an on-chip mask rom using the cmos technology. standalone mode or microcontroller interface mode can be selected by mask option. ? msm6652a/53a/54a/55a/56a/58a-xxx the trial production period for these devices is shorter than those described above. these devices are suitable for developing prototype models and concept demonstration of new products. ? msm66p54-xx, MSM66P56-XX the device is a single-chip cmos voice synthesizer with one-time-programmable (otp) rom. standalone and microcontroller interface modes are selected by using a code (01-04). the user can easily write voice data using the development tool ar761 or ar762, or p54 adapter. unlike the mask rom version, the otp version is suited to applications which requires a small lot production of different type devices or short delivery time. ? msm6650 the msm6650 device can directly connect external rom or eprom of up to 64 mbits, which stores voice data. this device is ideally suited to an evaluation ic for the msm6650 family because its circuit configuration is identical to those of the mask rom-based and otp version devices. this version: jul. 2000 previous version: sep. 1999
2/45 ? semiconductor msm6650 family fedl6650-03 ? option table option input interface mode standby conversion option a option b option c option d microcontroller standalone microcontroller standalone serial parallel yes no item ceramic sample mold sample mass produc- tion package (circle the desired one) quantity note 18-pin dip (ceramic) 18-pin dip (plastic) 18-pin dip (plastic) 24-pin sop (ceramic) 24-pin sop (plastic) 24-pin sop (plastic) chip chip chip pcs pcs pcs per lot monthly up to 10 samples. operating temp. : 10 to 30c up to 50 samples option list oki electric industry co., ltd. date: you are requested to develop msm665x-xxx on the following conditions. 1. options there are four options for the msm6650 family. choose and circle the desired option. 2. package and quantity signed by title : company name : *1. the options for the mask rom-based devices are mask options. the user should send oki an option list before starting development. a sample of option list is shown below. *2. a code of otp version device corresponds to one of the options. the user should specify either msm66p54-03 or msm66p54-04 or msm66p56-03 or msm66p56-04. (in this case, no option list is required.) pin name microcontroller interface mode serial input parallel input with standby no standby stby "l" "h" msm6650 serial "h" "l" "l" "l" cpu "h" "h" "l" "l" msm66p54/p56 C01 C02 C03 C04 msm6652/53/54/55/56 standalone mode mask option *2 msm6652a/53a/54a/55a/56a/58a *1
3/45 ? semiconductor msm6650 family fedl6650-03 standalone mode features note: actual voice rom area is smaller by 22 kbits. ? 4-bit adpcm or 8-bit pcm sound generation ? melody function ? edit rom function ? two-channel mixing function ? built-in random playback function ? fade-out function via four-step sound volume attenuation ? built-in beep tone of 0.5 khz, 1.0 khz, 1.3 khz, or 2.0 khz selectable with a specific code ? sampling frequency of 4.0 khz, 5.3 khz, 6.4 khz, 8.0 khz, 10.6 khz, 12.8 khz, 16.0 khz, or 32.0 khz (32 khz sampling is not possible when using rc oscillation) ? up to 120 phrases ? built-in 12-bit d/a converter ? built-in C40 db/octave low-pass filter ? standby function ? selectable rc or ceramic oscillation ? package options: 18-pin plastic dip (dip18-p-300-2.54) (product name: msm6652-xxxrs/msm6653-xxxrs/ msm6654-xxxrs/msm6655-xxxrs/ msm6656-xxxrs/msm6652a-xxxrs/ msm6653a-xxxrs/msm6654a-xxxrs/ msm6655a-xxxrs/msm6656a-xxxrs/ msm6658a-xxxrs) 24-pin plastic sop (sop24-p-430-1.27-k) (product name: msm6652-xxxgs-k/msm6653-xxxgs-k/ msm6654-xxxgs-k/msm6655-xxxgs-k/ msm6656-xxxgs-k/msm6652a-xxxgs-k/ msm6653a-xxxgs-k/msm6654a-xxxgs-k/ msm6655a-xxxgs-k/msm6656a-xxxgs-k/ msm6658a-xxxgs-k/msm66p54-03gs-k/ msm66p54-04gs-k/msm66p56-03gs-k/ msm66p56-04gs-k) 20-pin plastic dip (dip20-p-300-2.54-w1) (product name: msm66p54-03rs/msm66p54-04rs/ msm66p56-03rs/msm66p56-04rs) 64-pin plastic qfp (qfp64-p-1420-1.00-bk) (product name: msm6650gs-bk) 64-pin plastic sdip (sdip64-p-750-1.778) (product name: msm6650ss) device name rom size maximum playback time (sec) f sam =4.0 khz f sam =6.4 khz f sam =8.0 khz f sam =16 khz msm6650 64 mbits (max) 4194.3 2620.5 2096.4 1048.2 msm6656, 6656a 2 mbits 129.1 80.7 64.5 32.2 msm6655, 6655a 1.5 mbits 96.5 60.3 48.2 24.1 msm6654, 6654a 1 mbit 63.8 39.9 31.9 15.9 msm6653, 6653a 544 kbits 31.2 19.5 15.6 7.8 msm6652, 6652a 288 kbits 16.9 10.5 8.4 4.2 msm66p54 1 mbit 63.8 39.9 31.9 15.9 129.1 80.7 64.5 32.2 msm6658a 4 mbits 259.7 162.9 129.8 64.9 msm66p56 2 mbit 129.1 80.7 64.5 32.2
4/45 ? semiconductor msm6650 family fedl6650-03 block diagrams msm6652/53/54/55/56-xxx msm6652a/53a/54a/55a/56a/58a-xxx rom (containing 22-kbit phrase control table & phrase address table) 16- bit (msm6652/52a) 17- bit (msm6653/53a) 17- bit (msm6654/54a) 18- bit (msm6655/55a) 18- bit (msm6656/56a) 19- bit (msm6658a) multiplexer address & switching controller 7 adpcm synthesizer pcm synthesizer 12 8 12-bit dac lpf aout data controller melody generator beep tone generator 16- bit (msm6652/52a) 17- bit (msm6653/53a) 17- bit (msm6654/54a) 18- bit (msm6655/55a) 18- bit (msm6656/56a) 19- bit (msm6658a) address counter timing controller gnd v dd reset random circuit i/o interface osc ceramic/ crystal/rc xt/ cr a2 a1 a0 sw3 sw2 sw1 sw0 test rnd busy osc1 osc2 osc3 (msm6652/52a) (msm6653/53a) (msm6654/54a) (msm6655/55a) (msm6656/56a) (msm6658a) 288-kbit 544-kbit 1-mbit 1.5-mbit 2-mbit 4-mbit
5/45 ? semiconductor msm6650 family fedl6650-03 msm66p54/p56-xx a2 a1 a0 sw3 sw2 sw1 sw0 test rnd busy osc1 osc2 osc3 xt/ cr reset v dd gnd aout pgm v pp address & switching controller random circuit i/o interface osc (ceramic/ crystal/rc) 17-bit (msm66p54-xx) 18-bit (MSM66P56-XX) multiplexer 17-bit (msm66p54-xx) 18-bit (MSM66P56-XX) address counter timing controller program circuit 1-mbit otp rom (msm66p54-xx) 2-mbit otp rom (MSM66P56-XX) (containing 22-kbit phrase control table & phrase address table) data controller adpcm synthesizer pcm synthesizer melody generator beep tone generator 12- bit dac lpf 12 8 7
6/45 ? semiconductor msm6650 family fedl6650-03 msm6650 8-bit latch 23-bit multiplexer address & switching controller 7 adpcm synthesizer pcm synthesizer 12 8 12-bit dac lpf aout data controller melody generator beep tone generator 23-bit address counter timing controller dgnd dv dd reset random circuit i/o interface osc (ceramic/ crystal/rc) xt/ cr a2 a1 a0 sw3 sw2 sw1 sw0 test1 , 3 rnd ce rcs busy nar ibusy standby xt/osc1 xt /osc2 osc3 av dd agnd test2 cpu stby ra22 ra0 d7 d0
7/45 ? semiconductor msm6650 family fedl6650-03 18-pin plastic dip 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 test a2 a1 a0 reset xt/ cr aout sw3 sw2 sw1 sw0 rnd osc3 osc2 osc1 msm6652-6658a ( mask rom) 24-pin plastic sop 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 v dd osc1 osc2 nc osc3 nc nc rnd sw0 sw1 sw2 sw3 gnd aout xt/ cr nc busy nc nc reset test a2 a1 a0 busy gnd v dd msm6652-6658a ( mask rom) 20-pin plastic dip 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 test a2 a1 a0 v pp reset busy xt/ cr aout gnd pgm sw3 sw2 sw1 sw0 rnd osc3 osc2 osc1 v dd msm66p54 / p56 (otp) 24-pin plastic sop 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 v dd osc1 osc2 nc osc3 nc pgm rnd sw0 sw1 sw2 sw3 gnd aout xt/ cr nc busy nc v pp reset test a2 a1 a0 msm66p54 / p56 (otp) msm6652-xxxrs, msm6653-xxxrs, msm6654-xxxrs, msm66p54-03/-04rs msm6655-xxxrs, msm6656-xxxrs, msm6652a-xxxrs, msm66p56-03/-04rs msm6653a-xxxrs, msm6654a-xxxrs, msm6655a-xxxrs, msm6656a-xxxrs, msm6658a-xxxrs pin configuration (top view) the msm66p54-xx and MSM66P56-XX has two more pins than the msm6652-6658a while their pin configurations are identical. the additional two pins (v pp , pgm ) of the msm66p54-xx/p56-xx may be open at playback after completion of writing. msm6652-xxxgs-k, msm6653-xxxgs-k, msm66p54-03/-04gs-k msm6654-xxxgs-k, msm6655-xxxgs-k, msm66p56-03/-04gs-k msm6656-xxxgs-k, msm6652a-xxxgs-k, msm6653a-xxxgs-k, msm6654a-xxxgs-k, msm6655a-xxxgs-k, msm6656a-xxxgs-k, msm6658a-xxxgs-k
8/45 ? semiconductor msm6650 family fedl6650-03 msm6650 product name: msm6650gs-bk 1 nc busy nar nc aout agnd dgnd av dd dv dd xt/osc1 xt /osc2 osc3 test1 rnd xt/ cr cpu test2 ibusy nc ra10 ra9 ra8 ra7 ra6 ra5 ra4 ra3 ra2 ra1 ra0 d7 d6 d5 d4 d3 d2 d1 nc stby ra22 ra21 ra20 ra19 ra18 ra17 ra16 ra15 ra14 ra13 ra12 ra11 standby sw0 sw1 sw2 sw3 a0 a1 a2 test3 reset ce rcs d0 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 nc : no connection 64-pin plastic qfp
9/45 ? semiconductor msm6650 family fedl6650-03 nc : no connection 64-pin plastic sdip 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 ce xt /osc2 osc3 test1 rnd xt/ cr cpu test2 ibusy nc standby sw0 sw1 sw2 sw3 a0 a1 a2 test3 reset ra13 xt/osc1 dv dd av dd dgnd agnd aout nar busy nc stby ra22 ra21 ra20 ra19 ra18 ra17 ra16 ra15 ra14 45 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 21 22 23 24 25 26 27 28 29 30 31 32 44 43 42 41 40 39 38 37 36 35 34 33 rcs ra12 d0 ra11 nc ra10 d1 nc d2 ra9 d3 ra8 d4 ra7 d5 ra6 d6 ra5 d7 ra4 ra0 ra3 ra1 ra2 product name: msm6650ss
10/45 ? semiconductor msm6650 family fedl6650-03 pin descriptions 1. msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx 18-pin plastic dip symbol type description reset osc2 osc3 reset. setting this pin to "l" puts the lsi in standby status. at this time, oscillation stops, aout is pulled to gnd, and the deveice is initialized. this pin has an internal pull-up resistor. i o o rnd sw0-sw3 a0-a2 i i i busy o xt/ cr i busy. this pin outputs a "l" level during playback. at power-on, this pin is at "h" level. xt/ cr selectable pin. set to "h" level when using ceramic oscillation. set to "l" level when using rc oscillation. aout o sound output. this is the synthesized output pin of the internal low-pass filter. oscillator 1. this pin is a ceramic oscillator connection pin when using ceramic oscillation. this pin is an rc connection pin when using rc oscillation. when using an external clock, use this pin as the clock input. osc1 i oscillator 2. this pin is a ceramic oscillator connection pin when using a ceramic oscillator. this is an rc connection pin when using rc oscillation. leave open if using an external clock. osc2 outputs a "l" level in standby status. oscillator 3. leave open if using a ceramic oscillator. this pin is the rc connection pin when using rc oscillation. when rc oscillation is selected, osc3 outputs a "h" level in standby status. random playback. random playback starts when the rnd pin is set to a "l" level. at the fall of rnd , addresses from the random address playback circuit inside the ic are fetched. set to a "h" level if random playback is not used. this pin has an internal pull-up resistor. phrase inputs. these pins are phrase input pins corresponding to playback. if the input changes, sw0 to sw3 pins capture address data after 16 ms and speech playback commences. these pins have internal pull-down resistors. phrase inputs. phrase input pins correspoding to playback. the a0 input becomes invalid when the random playback function is used. test i test mode. set to "h" level. this pin has an internal pull-up resistor. pin 5 12 13 14 15-18 1-3 6 7 8 11 4 gnd ground. v dd power supply. insert a 0.1 m f or more bypass capacitor between this pin and gnd. 9 10
11/45 ? semiconductor msm6650 family fedl6650-03 symbol type description reset reset. setting this pin to "l" puts the lsi in standby status. at this time, oscillation stops, aout is pulled to gnd, and the deveice is initialized. this pin has an internal pull-up resistor. i busy o xt/ cr i busy. this pin outputs a "l" level during playback. at power-on, this pin is at "h" level. xt/ cr selectable pin. set to "h" level when using ceramic oscillation. set to "l" level when using rc oscillation. aout o sound output. this is the synthesized output pin of the internal low-pass filter. pin 6 7 8 9 osc2 osc3 o o rnd sw0-sw3 a0-a2 i i i oscillator 1. this pin is a ceramic oscillator connection pin when using ceramic oscillation. this pin is an rc connection pin when using rc oscillation. when using an external clock, use this pin as the clock input. osc1 i oscillator 2. this pin is a ceramic oscillator connection pin when using a ceramic oscillator. this is an rc connection pin when using rc oscillation. leave open if using an external clock. osc2 outputs a "l" level in standby status. oscillator 3. leave open if using a ceramic oscillator. this pin is the rc connection pin when using rc oscillation. when rc oscillation is selected, osc3 outputs a "h" level in standby status. random playback. random playback starts when the rnd pin is set to a "l" level. at the fall of rnd , addresses from the random address playback circuit inside the ic are fetched. set to a "h" level if random playback is not used. this pin has an internal pull-up resistor. phrase inputs. these pins are phrase input pins corresponding to playback. if the input changes, sw0 to sw3 pins capture address data after 16 ms and speech playback commences. these pins have internal pull-down resistors. phrase inputs. phrase input pins correspoding to playback. the a0 input becomes invalid when the random playback function is used. gnd ground. v dd power supply. insert a 0.1 m f or more bypass capacitor between this pin and gnd. test i test mode. set to "h" level. this pin has an internal pull-up resistor. 13 14 15 16-19 2-4 12 10 11 5 v pp pgm i power supply used when writing data to internal otp rom. leave open or set to "h" level during playback. interface with voice analysis edit tool ar203 or ar204. set to "l" level or leave open during playback. 1 20 2.msm66p54-xx, MSM66P56-XX 20-pin plastic dip
12/45 ? semiconductor msm6650 family fedl6650-03 3.msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54-xx, MSM66P56-XX 24-pin plastic sop symbol type description reset osc2 osc3 reset. setting this pin to "l" puts the lsi in standby status. at this time, oscillation stops, aout is pulled to gnd, and the deveice is initialized. this pin has an internal pull-up resistor. i o o rnd sw0-sw3 a0-a2 i i i busy o xt/ cr i busy. this pin outputs a "l" level during playback. at power-on, this pin is at "h" level. xt/ cr selectable pin. set to "h" level when using ceramic oscillation. set to "l" level when using rc oscillation. aout o sound output. this is the synthesized output pin of the internal low-pass filter. oscillator 1. this pin is a ceramic oscillator connection pin when using ceramic oscillation. this pin is an rc connection pin when using rc oscillation. when using an external clock, use this pin as the clock input. osc1 i oscillator 2. this pin is a ceramic oscillator connection pin when using a ceramic oscillator. this is an rc connection pin when using rc oscillation. leave open if using an external clock. osc2 outputs a "l" level in standby status. oscillator 3. leave open if using a ceramic oscillator. this pin is the rc connection pin when using rc oscillation. when rc oscillation is selected, osc3 outputs a "h" level in standby status. random playback. random playback starts when the rnd pin is set to a "l" level. at the fall of rnd , addresses from the random address playback circuit inside the ic are fetched. set to a "h" level if random playback is not used. this pin has an internal pull-up resistor. phrase inputs. these pins are phrase input pins corresponding to playback. if the input changes, sw0 to sw3 pins capture address data after 16 ms and speech playback commences. these pins have internal pull-down resistors. phrase inputs. phrase input pins correspoding to playback. the a0 input becomes invalid when the random playback function is used. gnd ground. v dd power supply. insert a 0.1 m f or more bypass capacitor between this pin and gnd. test i test mode. set to "h" level. this pin has an internal pull-up resistor. pin 17 3 5 8 9-12 13-15 20 22 23 2 24 1 16 v pp * pgm *i power supply used when writing data to internal otp rom. leave open or set to "h" level during playback. interface with voice analysis edit tool ar203 or ar204. set to "l" level or leave open during playback. 18 7 * pins for msm66p54/56-xx only
13/45 ? semiconductor msm6650 family fedl6650-03 4.msm6650 64-pin plastic qfp (64-pin plastic sdip) symbol type description reset xt /osc2 osc3 reset. setting this pin to "l" puts the lsi in standby status. at this time, oscillation stops, aout is pulled to gnd, and the deveice is initialized. this pin has an internal pull-up resistor. i o o rnd sw0-sw3 a0-a2 i i i busy o xt/ cr i busy. this pin outputs a "l" level during playback. at power-on, this pin is at "h" level. xt/ cr selectable pin. set to "h" level when using ceramic oscillation. set to "l" level when using rc oscillation. aout o sound output. this is the synthesized output pin of the internal low-pass filter. oscillator 1. this pin is a ceramic oscillator connection pin when using ceramic oscillation. this pin is an rc connection pin when using rc oscillation. when using an external clock, use this pin as the clock input. xt/osc1 i oscillator 2. this pin is a ceramic oscillator connection pin when using a ceramic oscillator. this is an rc connection pin when using rc oscillation. leave open if using an external clock. osc2 outputs a "l" level in standby status. oscillator 3. leave open if using a ceramic oscillator. this pin is the rc connection pin when using rc oscillation. when rc oscillation is selected, osc3 outputs a "h" level in standby status. random playback. random playback starts when the rnd pin is set to a "l" level. at the fall of rnd , addresses from the random address playback circuit inside the ic are fetched. set to a "h" level if random playback is not used. this pin has an internal pull-up resistor. phrase inputs. these pins are phrase input pins corresponding to playback. if the input changes, sw0 to sw3 pins capture address data after 16 ms and speech playback commences. these pins have internal pull-down resistors. phrase inputs. phrase input pins correspoding to playback. the a0 input becomes invalid when the random playback function is used. pin 29(19) 11(1) 12(2) 14(4) 21-24 (11-14) 25-27 (15-17) 3(57) 15(5) 5 (59) 10(64)
14/45 ? semiconductor msm6650 family fedl6650-03 ce o chip enable. ce is a timing output pin to control read of external memory. this pin outputs when rcs is at the "l" level. this pin goes high impedance when rcs is at the "h" level. cpu i cpu mode. set to "l" level to select standalone mode. set to "h" level to select microcontroller interface mode. d0-d7 i external memory data bus. data is input when rcs is low. when rcs is high, these pins become low due to internal pull-down resistors. ibusy o i busy. outputs a "l" level during voice playback (except during standby conversion time), or when the aout pin is at half v dd level. ra0-ra22 o external memory address. these are address pins for an external memory output when rcs is low. these pins become high impedance status if rcs is in "h" level. rcs i read chip select. the data bits d0-d7 are internally pulled down when rcs is high. addresses and ce are output when rcs is at "l" level. the ra22-ra0 address pins and ce pin become high impedance. stby i standby contorl. if set to "l" level, the msm6650 enters standby mode 0.2 seconds after voice ends. if set to "h" level, the msm6650 aout output maintains half v dd after voice ends. standby o standby indicator. this output pin remains at "l" level during oscillation. test1 , 3 i test. set these pins to "h" level. the test1 and test3 pins have internal pull-up resistor. test2 i test. set this pin to "l" level. 30 (20) 16 (6) 32, 34-40 (22, 24-30) 18 (8) 41-63 (31-40, 42-54) 31 (21) 64 (55) 20 (10) 13, 28 (3, 18) 17 (7) symbol type description agnd analog ground pin. dgnd digital ground pin. av dd analog power pin. insert a 0.1 m f or more bypass capacitor in between this pin and agnd. dv dd digiral power pin. insert a 0.1 m f or more bypass capacitor in between this pin and dgnd. pin 6 (60) 7 (61) 8 (62) 9 (63)
15/45 ? semiconductor msm6650 family fedl6650-03 absolute maximum ratings parameter symbol condition rating unit ta = 25c (gnd=0 v) v dd C0.3 to +7.0 v power supply voltage v in C0.3 to v dd +0.3 v input voltage t stg C55 to +150 c storage temperature recommended operating conditions * if rc oscillation is selected, 32khz sampling frequency cannot be selected. parameter symbol condition range unit (gnd=0 v) typ. min. max. 4.096 3.5 4.5 mhz v dd msm6652-56, msm6650, msm6652a-56a 2.4 to 5.5 v msm6658a, msm66p54/p56 3.5 to 5.5 v t op operating temperature C40 to +85 c f osc1 master clock frequency 1 when crystal selected f osc2 master clock frequency 2 when rc selected (*) khz 256 200 300 power supply voltage v dd
16/45 ? semiconductor msm6650 family fedl6650-03 electrical characteristics dc characteristics parameter symbol condition min. unit "h" input voltage "l" input voltage "h" output voltage "l" output voltage "h" input current 1 "h" input current 2 "l" input current 1 "l" input current 2 operating power consumption standby power consumption i oh =C1 ma i ol =2 ma v ih =v dd internal pull-down resistance v il =gnd internal pull-up resistance f osc =4.096 mhz, no load ta=C40 c to +50 c ta=C40 c to +85 c 0.84 v dd 4.6 30 C10 C200 v v v v m a m a m a m a ma m a m a typ. max. 90 C90 6 0.17 v dd 0.4 10 200 C30 10 10 30 (v dd =4.5 to 5.5 v, gnd=0 v, ta=C40 to +85 c) (note) v ih v il v oh v ol i ih1 i ih2 i il1 i il2 i dd i ds dc characteristics parameter symbol condition min. unit v ih v il v oh v ol i ih1 i ih2 i il1 i il2 i dd "h" input voltage "l" input voltage "h" output voltage "l" output voltage "h" input current 1 "h" input current 2 "l" input current 1 "l" input current 2 operating power consumiption standby power consumption lpf driving resistance lpf output impedance i oh =C1 ma i ol =2 ma v ih =v dd internal pull-down resistance v il =gnd internal pull-up resistance f osc =4.096 mhz, no load ta=C40 c to +50 c ta=C40 c to +85 c when lpf output is selected i f =100 m a 0.84 v dd 2.6 10 C10 C100 50 v v v v m a m a m a m a ma m a m a k w k w (v dd =2.4 to 3.6 v, gnd=0 v, ta=C40 to +85 c) typ. max. 30 C30 4 1 0.17 v dd 0.4 10 100 C10 7 5 20 3 i ds r aout r lpf
17/45 ? semiconductor msm6650 family fedl6650-03 application circuits (msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xx) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 sw0 sw1 sw2 sw3 aout v dd xt/ cr test rnd a0 a1 a2 gnd osc3 osc2 osc1 msm6652/53/54/55/56 msm6652a/53a/54a/55a/56a/58a msm66p54/p56 application circuit in standalone mode supporting 15 switch-selected phrases
18/45 ? semiconductor msm6650 family fedl6650-03 sw0 aout v dd test rnd gnd osc3 osc2 osc1 sw1 sw2 sw3 xt/ cr a0 a1 a2 msm6652/53/54/55/56 msm6652a/53a/54a/55a/56a/58a msm66p54/p56 s4 s3 s2 s1 v dd application circuit in standalone mode supporting four switch-selected words switches and playback addresses s1 s2 s3 s4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0 01 02 04 08 a2 a1 a0 sw3 sw2 sw1 sw0 adr (msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xx)
19/45 ? semiconductor msm6650 family fedl6650-03 1 2 3 4 5 6 7 8 9 101112131415 sw0 sw1 sw2 sw3 ra15 dv dd xt/ cr test1,3 rnd a0 a1 a2 dgnd osc3 osc2 osc1 aout ra0 v cc gnd v pp ce a15 a0 d7 o7 d0 o0 ce oe msm6650 msm27c512 av dd agnd application circuit in standalone mode supporting 15 switch-selected phrases (msm6650)
20/45 ? semiconductor msm6650 family fedl6650-03 sw0 sw1 sw2 sw3 ra18 dv dd xt/ cr test2 rnd a0 a1 a2 dgnd osc3 osc2 osc1 aout ra0 v dd gnd v pp ce a16 a0 d7 o7 d0 o0 oe msm6650 msm27c101 av dd agnd v dd gnd v pp ce a16 a0 o7 o0 oe msm27c101 v dd gnd v pp ce a16 a0 o7 o0 oe msm27c101 v dd gnd v pp ce a16 a0 o7 o0 oe msm27c101 ra17 ra16 ce 2g 1b 1g 1y3 1y2 1y1 1y0 1a 74hc139 cpu test3 test1 stby application circuit in standalone mode supporting four 1-mbit eproms (msm6650)
21/45 ? semiconductor msm6650 family fedl6650-03 microcontroller interface mode features note: actual voice rom area is smaller by 22 kbits. ? 4-bit adpcm or 8-bit pcm sound generation ? melody function ? edit rom function ? two-channel mixing function ? fade-out function via four-step sound volume attenuation ? serial input or parallel input selectable ? built-in beep tone of 0.5 khz, 1.0 khz, 1.3 khz, or 2.0 khz selectable with a specific code ? sampling frequency of 4.0 khz, 5.3 khz, 6.4 khz, 8.0 khz, 10.6 khz, 12.8 khz, 16.0 khz, or 32.0 khz (32 khz sampling is not possible when using rc oscillation) ? up to 127 phrases ? built-in 12-bit d/a converter ? built-in C40 db/octave low-pass filter ? standby function ? package options: 18-pin plastic dip (dip18-p-300-2.54) (product name: msm6652-xxxrs/msm6653-xxxrs/ msm6654-xxxrs/msm6655-xxxrs/ msm6656-xxxrs/msm6652a-xxxrs/ msm6653a-xxxrs/msm6654a-xxxrs/ msm6655a-xxxrs/msm6656a-xxxrs/ msm6658a-xxxrs) 24-pin plastic sop (sop24-p-430-1.27-k) (product name: msm6652-xxxgs-k/msm6653-xxxgs-k/ msm6654-xxxgs-k/msm6655-xxxgs-k/ msm6656-xxxgs-k/msm6652a-xxxgs-k/ msm6653a-xxxgs-k/msm6654a-xxxgs-k/ msm6655a-xxxgs-k/msm6656a-xxxgs-k/ msm6658a-xxxgs-k/msm66p54-01gs-k/ msm66p54-02gs-k/msm66p56-01gs-k/ msm66p56-02gs-k) 20-pin plastic dip (dip20-p-300-2.54-w1) (product name: msm66p54-01rs/msm66p54-02rs/ msm66p56-01rs/msm66p56-02rs) 64-pin plastic qfp (qfp64-p-1420-1.00-bk)(product name: msm6650gs-bk) 64-pin plastic sdip (sdip64-p-750-1.778) (product name: msm6650ss) device name data rom size maximum playback time (sec) f sam =4.0 khz f sam =6.4 khz f sam =8.0 khz f sam =16 khz msm6650 64 mbits (max) 4194.3 2620.5 2096.4 1048.2 msm6656, 6656a 2 mbits 80.7 64.5 32.2 msm6655, 6655a 1.5 mbits 96.5 60.3 48.2 24.1 msm6654, 6654a 1 mbit 63.8 39.9 31.9 15.9 msm6653, 6653a 544 kbits 31.2 19.5 15.6 7.8 msm6652, 6652a 288 kbits 16.9 10.5 8.4 4.2 msm66p54 1 mbit 63.8 39.9 31.9 15.9 129.1 80.7 64.5 32.2 msm6658a 4 mbits 259.7 162.9 129.8 64.9 f sam =32 khz 524.1 16.1 12.0 7.9 3.9 2.1 7.9 32.4 msm66p56 2 mbit 129.1 80.7 64.5 32.2 16.1
22/45 ? semiconductor msm6650 family fedl6650-03 block diagrams msm6652/53/54/55/56-xxx msm6652a/53a/54a/55a/56a/58a-xxx rom (containing 22-kbit phrase control table & phrase address table) 16- bit (msm6652/52a) 17- bit (msm6653/53a) 17- bit (msm6654/54a) 18- bit (msm6655/55a) 18- bit (msm6656/56a) 19- bit (msm6658a) multiplexer address & command controller 7 adpcm synthesizer pcm synthesizer 12 8 12-bit dac lpf aout data controller melody generator beep tone generator 16- bit (msm6652/52a) 17- bit (msm6653/53a) 17- bit (msm6654/54a) 18- bit (msm6655/55a) 18- bit (msm6656/56a) 19- bit (msm6658a) address counter timing controller gnd v dd reset i/o interface osc i6/sd i5/si i4 i3/port1 i2/port0 i1 i0 ch nar xt xt (msm6652/52a) (msm6653/53a) (msm6654/54a) (msm6655/55a) (msm6656/56a) (msm6658a) 288-kbit 544-kbit 1-mbit 1.5-mbit 2-mbit 4-mbit st cmd busy
23/45 ? semiconductor msm6650 family fedl6650-03 msm66p54/p56-xx i6/sd i5/si i4 i3/port1 i2/port0 i1 i0 nar xt xt reset v dd gnd aout pgm v pp address & command controller i/o interface osc 17- bit (msm66p54-xx) 18- bit (MSM66P56-XX) multiplexer 17- bit (msm66p54-xx) 18- bit (MSM66P56-XX) address counter timing controller program circuit 1-mbit otp rom (msm66p54-xx) 2-mbit otp rom (MSM66P56-XX) (containing 22-kbit phrase control table & phrase address table) data controller adpcm synthesizer pcm synthesizer melody generator beep tone generator 12- bit dac lpf 12 8 7 busy cmd st ch
24/45 ? semiconductor msm6650 family fedl6650-03 msm6650 8-bit latch 23-bit multiplexer address & switching controller 7 adpcm synthesizer pcm synthesizer 12 8 12-bit dac lpf aout data controller melody generator beep tone generator 23-bit address counter timing controller dgnd dv dd reset i/o interface osc test1 i6/sd i5/si i4 i3/port1 i2/port0 i1 i0 ce rcs busy nar ibusy standby xt xt mck av dd agnd serial cpu test2 ra22 ra0 d7 d0 ch st cmd
25/45 ? semiconductor msm6650 family fedl6650-03 pin configuration (top view) the msm66p54/p56-xx has two more pins than the msm6652-6658a while their pin configurations are identical. the additional two pins (v pp , pgm ) of the msm66p54/p56-xx may be open at playback after completion of writing. msm6652-xxxgs-k, msm6653-xxxgs-k, msm66p54-01/-02gs-k msm6654-xxxgs-k, msm6655-xxxgs-k, msm66p56-01/-02gs-k msm6656-xxxgs-k, msm6652a-xxxgs-k, msm6653a-xxxgs-k, msm6654a-xxxgs-k, msm6655a-xxxgs-k, msm6656a-xxxgs-k, msm6658a-xxxgs-k msm6652-xxxrs, msm6653-xxxrs, msm6654-xxxrs, msm66p54-01/-02rs msm6655-xxxrs, msm6656-xxxrs, msm6652a-xxxrs, msm66p56-01/-02rs msm6653a-xxxrs, msm6654a-xxxrs, msm6655a-xxxrs, msm6656a-xxxrs, msm6658a-xxxrs 18-pin plastic dip 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 ch i6/sd i5/si i4 reset nar aout i3/port1 i2/port0 i1 i0 st cmd xt xt msm6652-6658a ( mask rom) 24-pin plastic sop 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 v dd xt xt nc cmd nc nc st i0 i1 i2/port0 i3/port1 gnd aout nar nc busy nc nc reset ch i6/sd i5/si i4 busy gnd v dd msm6652-6658a ( mask rom) 20-pin plastic dip 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 ch i6/sd i5/si i4 v pp reset busy nar aout gnd pgm i3/port1 i2/port0 i1 i0 st cmd xt xt v dd msm66p54 / p56 (otp) 24-pin plastic sop 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 v dd xt xt nc cmd nc pgm st i0 i1 i2/port0 i3/port1 gnd aout nar nc busy nc v pp reset ch i6/sd i5/si i4 msm66p54 / p56 (otp)
26/45 ? semiconductor msm6650 family fedl6650-03 msm6650 product name: msm6650gs-bk 1 nc busy nar nc aout agnd dgnd av dd dv dd xt xt mck cmd st test1 cpu serial ibusy nc ra10 ra9 ra8 ra7 ra6 ra5 ra4 ra3 ra2 ra1 ra0 d7 d6 d5 d4 d3 d2 d1 nc test2 ra22 ra21 ra20 ra19 ra18 ra17 ra16 ra15 ra14 ra13 ra12 ra11 standby i0 i1 i2/port0 i3/port1 i4 i5/si i6/sd ch reset ce rcs d0 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 nc : no connection 64-pin plastic qfp
27/45 ? semiconductor msm6650 family fedl6650-03 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 ce xt mck cmd st test1 cpu serial ibusy nc standby i0 i1 i2/port0 i3/port1 i4 i5/si i6/sd ch reset ra13 xt dv dd av dd dgnd agnd aout nar busy nc test2 ra22 ra21 ra20 ra19 ra18 ra17 ra16 ra15 ra14 45 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 21 22 23 24 25 26 27 28 29 30 31 32 44 43 42 41 40 39 38 37 36 35 34 33 rcs ra12 d0 ra11 nc ra10 d1 nc d2 ra9 d3 ra8 d4 ra7 d5 ra6 d6 ra5 d7 ra4 ra0 ra3 ra1 ra2 nc : no connection 64-pin plastic sdip product name: msm6650ss
28/45 ? semiconductor msm6650 family fedl6650-03 pin descriptions 1.msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx 18-pin plastic dip symbol type description reset cmd st reset. the devices enter stanby status when a low level is input to this pin. when reset, oscillation stops. the aout output goes to ground and the ic status is reinitialized. this pin has an internal pull-up resistor. i i i ch i6/sd i5/si i i i busy o nar o busy. outputs a "l" level during playback and a "h" level when power is turned on. the cmd and st inputs become effective when high. nar indicates whether the address bus (i0 through i6) is ready to accept another address. when high, it is ready to accept. nar goes high when power is turned on. aout o analog speech output. d/a converter output or lpf output is selected by entering the command. ceramic oscillator output. if an external clock is used, leave this pin open. xt o command input and option control. this pin is used as command and option input when cmd is at the high level with st low. if this pin is not used or serial input is optioned, set this pin to "h" level. this pin has an internal pull-up resistor. start. speech playback starts at the fall of the st pulse. the i0 - i6 addresses are latched at the rise of the st pulse. input a st pulse when nar goes to the high level for channels 1 and 2. this pin has an internal pull-up resistor. channel control. channel 1 is selected when the input is pulled high. channel 2 is selected when the input is low. this pin has an internal pull-up resistor. this pin is command and user-defined phrase input when parallel input is optioned. this pin is serial data (command and address) input when serial input is optioned. this pin is command and user-defined phrase input when parallel input is optioned. this pin is used as serial clock input when serial input is optioned. xt i ceramic oscillator input. this pin has an internal 0.5 to 5 m w feedback resistor between xt and xt . if an external clock is used, this is the clock input pin. i4 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. i3/port1 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. i2/port0 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. i0, i1 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. pin 5 13 14 4 3 2 6 7 8 12 11 1 18 17 15, 16 ground pin. gnd 9 power supply. insert a 0.1f ro more bypass capacitor between this pin and gnd. v dd 10
29/45 ? semiconductor msm6650 family fedl6650-03 2.msm66p54/p56-xx 20-pin plastic dip symbol type description reset cmd st reset. the devices enter stanby status when a low level is input to this pin. when reset, oscillation stops. the aout output goes to ground and the ic status is reinitialized. this pin has an internal pull-up resistor. i i i ch i6/sd i5/si i i i busy o nar o busy. outputs a "l" level during playback and a "h" level when power is turned on. the cmd and st inputs become effective when high. nar indicates whether the address bus (i0 through i6) is ready to accept another address. when high, it is ready to accept. nar goes high when power is turned on. aout o analog speech output. d/a converter output or lpf output is selected by entering the command. ceramic oscillator output. if an external clock is used, leave this pin open. xt o command input and option control. this pin is used as command and option input when cmd is at the high level with st low. if this pin is not used or serial input is optioned, set this pin to "h" level. this pin has an internal pull-up resistor. start. speech playback starts at the fall of the st pulse. the i0 - i6 addresses are latched at the rise of the st pulse. input a st pulse when nar goes to the high level for channels 1 and 2. this pin has an internal pull-up resistor. channel control. channel 1 is selected when the input is pulled high. channel 2 is selected when the input is low. this pin has an internal pull-up resistor. this pin is command and user-defined phrase input when parallel input is optioned. this pin is serial data (command and address) input when serial input is optioned. this pin is command and user-defined phrase input when parallel input is optioned. this pin is used as serial clock input when serial input is optioned. xt i ceramic oscillator input. this pin has an internal 0.5 to 5 m w feedback resistor between xt and xt . if an external clock is used, this is the clock input pin. i4 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. i3/port1 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. i2/port0 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. i0, i1 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. pin 6 14 15 5 4 3 7 8 9 13 12 2 19 18 16, 17 ground pin. gnd 10 power supply. insert a 0.1f ro more bypass capacitor between this pin and gnd. v dd 11 supply voltage for writing data to internal otp rom. v pp 1 pgm i interface with voice analysis edit tools ar203 and ar204. set to "l" level or leave open during playback. this pin has an internal pull-down resistor. 20
30/45 ? semiconductor msm6650 family fedl6650-03 3. msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xx 24-pin plastic sop symbol type description reset cmd st reset. the devices enter stanby status when a low level is input to this pin. when reset, oscillation stops. the aout output goes to ground and the ic status is reinitialized. this pin has an internal pull-up resistor. i i i ch i6/sd i5/si i i i busy o nar o busy. outputs a "l" level during playback and a "h" level when power is turned on. the cmd and st inputs become effective when high. nar indicates whether the address bus (i0 through i6) is ready to accept another address. when high, it is ready to accept. nar goes high when power is turned on. aout o analog speech output. d/a converter output or lpf output is selected by entering the command. ceramic oscillator output. if an external clock is used, leave this pin open. xt o command input and option control. this pin is used as command and option input when cmd is at the high level with st low. if this pin is not used or serial input is optioned, set this pin to "h" level. this pin has an internal pull-up resistor. start. speech playback starts at the fall of the st pulse. the i0 - i6 addresses are latched at the rise of the st pulse. input a st pulse when nar goes to the high level for channels 1 and 2. this pin has an internal pull-up resistor. channel control. channel 1 is selected when the input is pulled high. channel 2 is selected when the input is low. this pin has an internal pull-up resistor. this pin is command and user-defined phrase input when parallel input is optioned. this pin is serial data (command and address) input when serial input is optioned. this pin is command and user-defined phrase input when parallel input is optioned. this pin is used as serial clock input when serial input is optioned. xt i ceramic oscillator input. this pin has an internal 0.5 to 5 m w feedback resistor between xt and xt . if an external clock is used, this is the clock input pin. i4 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. i3/port1 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. i2/port0 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. pin 17 5 8 16 15 14 20 22 23 3 2 13 12 11
31/45 ? semiconductor msm6650 family fedl6650-03 symbol type description i0, i1 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. pin 9, 10 ground pin. gnd 24 power supply. insert a 0.1f ro more bypass capacitor between this pin and gnd. v dd 1 supply voltage for writing data to internal otp rom. v pp 18 pgm i interface with voice analysis edit tools ar761 and ar762. set to "l" level or leave open during playback. this pin has an internal pull-down resistor. 7 * * * pins for msm66p54/56-xx only
32/45 ? semiconductor msm6650 family fedl6650-03 4.msm6650 64-pin plastic qfp (64-pin plastic sdip) symbol type description reset cmd st reset. the devices enter stanby status when a low level is input to this pin. when reset, oscillation stops. the aout output goes to ground and the ic status is reinitalized. this pin has an internal pull-up resistor. i i i ch i6/sd i5/si i i i busy o nar o busy. outputs a "l" level during playback and a "h" level when power is turned on. the cmd and st inputs become effective when high. nar indicates whether the address bus (i0 through i6) is ready to accept another address. when high, it is ready to accept. nar goes high when power is turned on. aout o analog speech output. d/a converter output or lpf output is selected by entering the command. ceramic oscillator output. if an external clock is used, leave this pin open. xt o command input and option control. this pin is used as command and option input when cmd is at the high level with st low. if this pin is not used or serial input is optioned, set this pin to "h" level. this pin has an internal pull-up resistor. start. speech playback starts at the fall of the st pulse. the i0 - i6 addresses are latched at the rise of the st pulse. input a st pulse when nar goes to the high level for channels 1 and 2. this pin has an internal pull-up resistor. channel control. channel 1 is selected when the input is pulled high. channel 2 is selected when the input is low. this pin has an internal pull-up resistor. this pin is command and user-defined phrase input when parallel input is optioned. this pin is serial data (command and address) input when serial input is optioned. this pin is command and user-defined phrase input when parallel input is optioned. this pin is used as serial clock input when serial input is optioned. xt i ceramic oscillator input. this pin has an internal 0.5 to 5 m w feedback resistor between xt and xt . if an external clock is used, this is the clock input pin. i4 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. i3/port1 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. i2/port0 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. i0, i1 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. pin 29 (19) 13 (3) 14 (4) 28 (18) 27 (17) 26 (16) 3 (57) 4 (58) 5 (59) 11 (1) 10 (64) 25 (15) 24 (14) 23 (13) 21, 22 (11, 12)
33/45 ? semiconductor msm6650 family fedl6650-03 symbol type description agnd analog ground pin. mck o main clock output pin. use mck as a connection pin for the msc1192, etc. when the ic is in standby status, mck is held high. cpu i cpu mode. set to "h" level to select microcontroller interface mode. serial i serial/parallel interface select. this input selects either the parallel or the serial input interface. the serial input interface is selected with a high level; the parallel input interface is selected with a low level. ce o chip enable. ce is a timing output pin to control read of external memory. this pin outputs when rcs is at the "l" level. this pin goes high impedance when rcs is at the "h" level. rcs i read chip select. the data bits d0-d7 are internally pulled down when rcs is high. dgnd digital ground pin. av dd analog power pin. insert a 0.1 m f or more bypass capacitor between this pin and agnd. dv dd digital power pin. insert a 0.1 m f or more bypass capacitor between this pin and dgnd. d0 - d7 i external memory data bus. data is input when rcs is low. when rcs is high, these pins become low due to internal pull-down resistors. ra0 - ra22 o external memory address. these are address pins for an external memory output when rcs is low. these pins become high impedance status if rcs is in "h" level. test1 , 2 i test. set these pins to "h" level. ibusy o outputs a "l" level during playback or when aout is at 1/2 v dd (except standby conversion) standby o outputs a "l" level during which the device is oscillating. pin 6 (60) 12 (2) 16 (6) 17 (7) 30 (20) 31 (21) 7 (61) 8 (62) 9 (63) 32, 34-40 (22, 24-30) 41-63 (31-40, 42-54) 15, 64 (5, 55) 18 (8) 20 (10)
34/45 ? semiconductor msm6650 family fedl6650-03 absolute maximum ratings parameter symbol condition rating unit ta = 25c (gnd=0 v) v dd C0.3 to +7.0 v power supply voltage v in C0.3 to v dd+ 0.3 v input voltage t stg C55 to +150 c storage temperature recommended operating conditions parameter symbol condition range unit (gnd=0 v) typ. min. max. 4.096 3.5 4.5 mhz v dd msm6652-56, msm6650, msm6652a-56a 2.4 to 5.5 v msm6658a, msm66p54/p56 3.5 to 5.5 v t op operating temperature C40 to +85 c f osc master clock frequency power supply voltage
35/45 ? semiconductor msm6650 family fedl6650-03 electrical characteristics dc characteristics *1. applied to reset , cmd , st , ch . *2. applied to msm6652/53/54/55/56, msm6652a/53a/54a/55a/56a/58a, msm6650. *3. applied to msm66p54/p56. dc characteristics note: applied to reset , cmd , st , ch. parameter symbol condition min. unit v ih v il v oh v ol i ih1 i ih2 i il1 i il2 i dd high level input voltage low level input voltage high level output voltage low level output voltage high level input current 1 high level input current 2 low level input current 1 low level input current 2 operating current standby current d/a output relative accuracy i oh =C1 ma i ol =2 ma v ih =v dd internal pull-down resistor v il =gnd internal pull-up resistor f osc =4.096 mhz, no load ta=C40 c to +50 c ta=C40 c to +85 c when d/a output selected 0.84 v dd 4.6 30 C10 C200 v v v v m a m a m a m a ma m a m a mv typ. max. 90 C90 6 0.17 v dd 0.4 10 200 C30 10 10 30 40 (v dd =4.5 to 5.5 v, gnd=0 v, ta=C40 to +85 c) *1 r dao r aout r lpf d/a output impedance lpf driving resisance lpf output impedance when d/a output selected *2 when d/a output selected *3 when lpf output selected i f =100 m a 15 15 50 k w k w k w k w 25 30 1 35 45 3 i ds | v dae | parameter symbol condition min. unit v ih v il v oh v ol i ih1 i ih2 i il1 i il2 i dd high level input voltage low level input voltage high level output voltage low level output voltage high level input current 1 high level input current 2 low level input current 1 low level input current 2 operating current standby current d/a output relative accuracy d/a output impedance lpf driving resistance lpf output impedance i oh =C1 ma i ol =2 ma v ih =v dd internal pull-down resistor v il =gnd internal pull-up resistor f osc =4.096 mhz, no load ta=C40 c to +50 c ta=C40 c to +85 c when d/a output selected when d/a output selected when lpf output selected i f =100 m a 0.84 v dd 2.6 10 C10 C100 15 50 v v v v m a m a m a m a ma m a m a mv k w k w k w (v dd =2.4 to 3.6 v, gnd=0 v, ta=C40 to +85 c) typ. max. 30 C30 4 25 1 0.17 v dd 0.4 10 100 C10 7 5 20 20 35 3 (note) i ds | v dae | r dao r aout r lpf
36/45 ? semiconductor msm6650 family fedl6650-03 application circuits (msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xx) p1.0 p1.1 p1.2 p2.0 p3.0 reset msm83c154 ch cmd msm6652/53/54/55/56 msm6652a/53a/54a/55a/56a/58a msm66p54/p56 i6/sd i5/si st reset nar xt xt gnd v dd amp port0 port1 aout i4 i1 i0 application circuit in serial input interface mode
37/45 ? semiconductor msm6650 family fedl6650-03 p2.0 p3.1 p2.2 p2.1 p3.0 reset msm83c154 msm6652/53/54/55/56 msm6652a/53a/54a/55a/56a/58a msm66p54/p56 ch cmd st reset nar xt xt gnd v dd amp p1.6 i6 p1.0 i0 i5 i4 i3 i2 i1 p1.5 p1.4 p1.3 p1.2 p1.1 aout application circuit in parallel input interface mode (msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xx)
38/45 ? semiconductor msm6650 family fedl6650-03 application circuit in microcontroller interface mode using four 1-mbit eproms (serial input interface) (msm6650) i5/si ra16 dv dd ch dgnd xt i6/sd nar i0 msm6650 aout cmd i1 i4 rcs ra0 d7 d0 ce ra18 ra17 1b 1a v dd gnd v pp ce oe a16 a0 o7 o0 v dd gnd v pp ce oe a16 a0 o7 o0 v dd gnd v pp ce oe a16 a0 o7 o0 v dd gnd v pp ce oe a16 a0 o7 o0 1y3 1y2 1y1 1y0 2g 1g 74hc139 msm27c101 msm27c101 msm27c101 msm27c101 av dd agnd p2.0 p1.0 p1.1 p1.2 p3.0 reset msm83c154 reset st test1 test2 cpu serial xt
39/45 ? semiconductor msm6650 family fedl6650-03 i2 ra16 dv dd ch rcs dgnd xt xt i1 i0 serial msm6650 aout st cmd ra0 d7 d0 ce ra18 ra17 1b 1a v dd gnd v pp ce oe a16 a0 o7 o0 v dd gnd v pp ce oe a16 a0 o7 o0 v dd gnd v pp ce oe a16 a0 o7 o0 v dd gnd v pp ce oe a16 a0 o7 o0 1y3 1y2 1y1 1y0 2g 1g 74hc139 msm27c101 msm27c101 msm27c101 msm27c101 av dd agnd p2.0 p1.6 p1.5 p1.4 p1.3 p1.2 p1.1 p3.0 p2.1 p2.0 p3.1 p1.0 msm83c154 reset reset test2 test1 i5/si i4 i3 i6/sd nar cpu application circuit in microcontroller interface mode using four 1-mbit eproms (parallel input interface) (msm6650)
40/45 ? semiconductor msm6650 family fedl6650-03 (unit : mm) package dimensions dip18-p-300-2.54 package material lead frame material pin treatment package weight (g) oki electric industry co., ltd. rev. no./last revised epoxy resin 42 alloy solder plating ( 3 5 m m) 1.30 typ. 2/dec. 11, 1996
41/45 ? semiconductor msm6650 family fedl6650-03 (unit : mm) notes for mounting the surface mount type package the sop, qfp, tsop, tqfp, lqfp, soj, qfj (plcc), shp, and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact okis responsible sales person on the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). sop24-p-430-1.27-k package material lead frame material pin treatment package weight (g) oki electric industry co., ltd. rev. no./last revised epoxy resin 42 alloy solder plating ( 3 5 m m) 0.58 typ. 5/oct. 13, 1998 mirror finish
42/45 ? semiconductor msm6650 family fedl6650-03 (unit : mm) dip20-p-300-2.54-w1 package material lead frame material pin treatment package weight (g) oki electric industry co., ltd. rev. no./last revised epoxy resin 42 alloy solder plating ( 3 5 m m) 1.50 typ. 2/dec. 11, 1996
43/45 ? semiconductor msm6650 family fedl6650-03 (unit : mm) notes for mounting the surface mount type package the sop, qfp, tsop, tqfp, lqfp, soj, qfj (plcc), shp, and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact okis responsible sales person on the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). qfp64-p-1420-1.00-bk package material lead frame material pin treatment package weight (g) oki electric industry co., ltd. rev. no./last revised epoxy resin 42 alloy solder plating ( 3 5 m m) 1.25 typ. 4/nov. 28, 1996 mirror finish
44/45 ? semiconductor msm6650 family fedl6650-03 (unit : mm) sdip64-p-750-1.778 package material lead frame material pin treatment package weight (g) oki electric industry co., ltd. rev. no./last revised epoxy resin cu alloy solder plating ( 3 5 m m) 8.70 typ. 2/dec. 11, 1996
45/45 ? semiconductor msm6650 family fedl6650-03 notice 1. the information contained herein can change without notice owing to product and/or technical improvements. before using the product, please make sure that the information being referred to is up-to-date. 2. the outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. when planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. when designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. neither indemnity against nor license of a third partys industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. no responsibility is assumed by us for any infringement of a third partys right which may result from the use thereof. 6. the products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). these products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. certain products in this document may need government approval before they can be exported to particular countries. the purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. no part of the contents contained herein may be reprinted or reproduced without our prior permission. copyright 2000 oki electric industry co., ltd.

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