description the ammc-3040 is a broadband double-balanced mixer (dbm) with an integrated high-gain lo amplifer. this mmic can be used as either an up converter or down converter in microwave or millimeter wave applications. if desired, the lo amplifer can be biased to function as a frequency multiplier to enable second harmonic mixing of the lo input. the mixer section ofthe ammc-3040 is fabricated using a suspended metal system to create a unique, broadside-coupled balun structure (patent pending) to achieve exceptional bandwidth. the mmic provides repeatable conversion loss without tuning, mak - ing it highly suitable for automated assembly processes. for improved reliability and moisture protection, the die is passivated at the active areas. ammc-3040 absolute maximum ratings [1] symbol parameters/conditions units min. max. v d1, 2, 3, 4 positive drain voltage v 5 v g1, 2, 3, 4 gate voltage v -3.0 0.5 i dd total drain current ma 550 t ch operating channel temp. c +160 t b operating backside temp. c -55 t stg storage case temp. c -65 +165 t max maximum assembly temp. c +300 (60 sec max) note: 1. operation in excess of any one of these conditions may result in permanent damage to this device. features ? high iip3: +23 dbm ? wide bandwidth ? rf: 18-36 ghz ? lo: 18-36 ghz ? if: dc-3 ghz ? fundamental or subharmonic mixing ? up or down converter ? conversion loss: 9.5 db ? p1db: +17 dbm ? low lo drive power: +2 dbm ? usable to 42 ghz applications ? point-to-point radio ? lmds ? satcom ammc-3040 18 - 36 ghz double-balanced mixer with integrated lo amplifer/multiplier data sheet note: these devices are esd sensitive. the following precautions are strongly recommended: ensure that an esd approved carrier is used when dice are transported from one destination to another. personal grounding is to be worn at all times when handling these devices. chip size: 2520 x 760 m (99.2 x 29.9 mils) chip size tolerance: 10 m ( 0.4 mils) chip thickness: 100 10 m (4 0.4 mils) pad dimensions: 75 x 75 m (3 0.4 mils)
2 ammc-3040 dc specifcations/physical properties [1] symbol parameters and test conditions units min. typical max. v d1, 2, 3, 4 drain supply operating voltage v 2 3.5 5 i d1 first stage drain supply current, v dd = 3.5 v, v g1 = -0.5 v ma 50 i d2, 3, 4 total drain supply current for stages 2, 3 and 4 (v dd = 3.5 v, v gg = -0.5 v) ma 225 v g1, 2, 3, 4 gate supply operating voltages (i dd = 250 ma) v -0.5 v p pinch-of voltage (v dd = 3.5 v, i dd < 10 ma v -1.5 ch-b thermal resistance [2] (backside temp. t b = 25c) c/w 49 ammc-3040 rf specifcations zo = 50 f , tb = 25 c, if output = 2 ghz, lo input power = +2 dbm, rf input power = -20 dbm, except as noted. vdd = 3.5 v, vdd = 4.5 v, idd = 250 ma idd = 150 ma symbol parameters and test conditions units typ. max. typ. lc conversion loss, down conversion [1] db 9.5 12 10 lc conversion loss, up conversion [2] db 10 10.5 isol l-r lo - rf isolation at rf frequency = 22 ghz [3] db 31 32 p -1 db input power at 1 db conversion loss compression, down conversion dbm 17 17 iip3 input 3rd order intercept point, down conversion at rf frequency = 22 ghz [4] dbm 23 22 ammc-3040 typical performance zo = 50 f, tb = 25c, if = 2 ghz, lo input power = +2 dbm, rf input power = -20 dbm, except as noted. figure 2. conversion loss, down conversion. v d = 3.5 v, i d = 250 ma, lo freq. = rf C if figure 1. conversion loss, up conversion. v d = 3.5 v, i d = 250 ma, lo freq = rf + if notes: 1. measured in wafer form with t chuck = 25c. (except ch-bs.) 2. channel-to-backside thermal resistance ( ch-b) = 58c/f at tchannel (tc)=150c as measured using the liquid crystal method. thermal resis - tance at backside temperature (t b ) = 25 c calculated from measured data. notes: 1. 100% on-wafer rf testing is done at rf frequency = 18, 22, and 32 ghz. 2. if input = 2 ghz, rf input power = -20 dbm, rf freq = lo + if. 3. does not include lo amplifer gain of ~20 db. 4. ?f = 2 mhz, rf input power = -5 dbm. rf frequency (ghz) conversion loss (db) 20 42 22 24 26 28 30 32 34 36 38 40 14 12 10 8 6 4 2 0 lo = - 4 dbm lo = 0 dbm lo = 4 dbm rf frequency (ghz) conversion loss (db) 20 42 22 24 26 28 30 32 34 36 38 40 14 13 12 11 10 9 8 lo = - 4 dbm lo = 0 dbm lo = 4 dbm
3 figure 6. conversion loss vs. lo input power, down conversion. v d = 3.5 v, i d = 250 ma, lo freq = rf - if figure 5. conversion loss vs. lo input power, up conversion. v d = 3.5 v, i d = 250 ma, lo freq = rf + if figure 4. conversion loss, down conversion. v d = 4.5 v, i d = 150 ma, lo freq = rf - if figure 3. conversion loss, up conversion. v d = 4.5 v, i d = 150 ma, lo freq = rf + if figure 7. input power at 1 db conversion loss compression, down conversion. v d = 3.5 v, i d = 250 ma, lo freq = rf - if figure 8. input power at 1 db conversion loss compression, up conversion. v d = 3.5 v, i d = 250 ma, lo freq = rf + if rf frequency (ghz) conversion loss (db) 18 20 22 24 26 28 30 32 34 14 13 12 11 10 9 8 lo = 0 dbm lo = 2 dbm lo = 4 dbm rf frequency (ghz) conversion loss (db) 18 20 22 24 26 28 30 32 34 14 13 12 11 10 9 8 lo = 0 dbm lo = 2 dbm lo = 4 dbm rf frequency (ghz) conversion loss (db) -4 -3 -2 -1 0 1 2 3 4 5 6 12 11 10 9 8 7 6 23 ghz 35 ghz lo input power (dbm) conversion loss (db) -4 -3 -2 -1 0 1 2 3 4 5 6 12 11 10 9 8 7 6 23 ghz 35 ghz rf frequency (ghz) p1db (dbm) 18 40 20 22 24 26 28 30 32 34 36 38 20 18 16 14 12 10 lo = - 2 dbm lo = 0 dbm lo = 2 dbm lo = 4 dbm rf frequency (ghz) p1db (dbm) 18 40 20 22 24 26 28 30 32 34 36 38 25 20 15 10 5 0
4 figure 10. input power at 1 db conversion loss compression, up conversion. v d = 4.5 v, i d = 150 ma, lo freq = rf + if figure 9. input power at 1 db conversion loss compression, down conversion. v d = 4.5 v, i d = 150 ma, lo freq = rf - if figure 12. input 3rd order intercept point, down conversion. v d = 4.5 v, i d = 150 ma, lo freq = rf C if figure 11. input 3rd order intercept point, down conversion. v d = 3.5 v, i d = 250 ma, lo freq = rf - if figure 14. lo-rf isolation, down conversion. v d = 4.5 v, i d = 150 ma. note: does not include lo bufer amplifer gain of ~ 18 db, lo freq = rf C if figure 13. lo-rf isolation, down conversion. v d = 3.5 v, i d = 250 ma. note: does not include lo bufer amplifer gain of ~ 20 db, lo freq = rf - if rf frequency (ghz) p1db (dbm) 18 20 22 24 26 28 30 32 34 25 20 15 10 5 0 lo = 0 dbm lo = 2 dbm lo = 4 dbm rf frequency (ghz) p1db (dbm) 18 20 22 24 26 28 30 32 34 25 20 15 10 5 0 lo = 0 dbm lo = 2 dbm lo = 4 dbm rf frequency (ghz) iip3 (dbm) 20 42 22 24 26 28 30 32 34 36 38 40 25 20 15 10 5 0 rf frequency (ghz) iip3 (dbm) 18 20 22 24 26 28 30 32 34 25 20 15 10 5 0 rf frequency (ghz) isolation (db) 20 42 22 24 26 28 30 32 34 36 38 40 40 35 30 25 20 15 10 5 0 rf frequency (ghz) isolation (db) 18 20 22 24 26 28 30 32 34 36 40 35 30 25 20 15 10 5 0
5 figure 15. ammc-3040 bond pad locations, dimensions in microns figure 16. ammc-3040 assembly diagram (note: to assure stable operation bias supply feeds should be bypassed to ground with a capacitor, cb 100 pf typical.) biasing for fundamental mixing the recommended dc bias condition for the ammc- 3040 lo amplifer when used as a fundamental frequen - cy mixer is with all four drains connected to a single 3.5 to 4.5 v supply and all four gates connected to an adjust - able negative supply voltage as shown in figure 16(a). the gate voltage is adjusted for a total drain supply cur - rent of typically 150 to 250 ma. the second, third, and fourth stage dc drain bias lines are connected internally and therefore require only a single bond wire. a separate bond wire is needed for the frst stage dc drain bias, v d1 . the third and fourth stage dc gate bias lines are con - nected internally. a total of three dc gate bond wires are required: one for v g1 , one for v g2 , and one for the v g3 /v g4 connection. the internal matching circuitry at the rf in - put creates a 50-ohm dc and rf path to ground. any dc voltage applied to the rf input must be maintained below 1 volt, otherwise, a blocking capacitor should be used. the rf output is ac coupled. no ground bond wires are needed since the ground con - nection is made by means of plated through via holes to the backside of the chip. g o l d p l a t e d s h i m ( o p t i o n a l ) t o v g g d c g a t e s u p p l y f e e d ( a ) f u n d a m e n t a l l o . s i n g l e d r a i n a n d s i n g l e g a t e s u p p l y a s s e m b l y f o r u s i n g t h e l o a m p l i f i e r i n f u n d a m e n t a l f r e q u e n c y m i x e r a p p l i c a t i o n s . ( b ) s u b - h a r m o n i c l o . s e p a r a t e f i r s t - s t a g e g a t e b i a s s u p p l y t o u s e t h e l o a m p l i f i e r a s a m u l t i p l i e r f o r a p p l i c a t i o n a s a s u b - h a r m o n i c m i x e r . t o v d d d c d r a i n s u p p l y f e e d 1 0 0 p f 1 0 0 p f i f 0 . 6 p f ~ 5 0 0 m l o n g w i r e l o r f c b c b g o l d p l a t e d s h i m ( o p t i o n a l ) t o v g g d c g a t e s u p p l y f e e d t o v g g d c g a t e s u p p l y f e e d t o v d d d c d r a i n s u p p l y f e e d 1 0 0 p f 1 0 0 p f 1 0 0 p f i f 0 . 6 p f ~ 5 0 0 m l o n g w i r e l o r f c b c b c b 4 8 0 9 6 l o 0 3 0 0 r f v g 4 7 6 0 0 9 8 5 6 8 1 3 2 0 2 0 1 8 2 5 2 0 2 0 1 8 1 7 2 0 v g 1 v g 2 i f 8 9 4 v g 3 i f 1 4 7 5 v d 4 1 1 4 1 v d 3 9 1 4 v d 2 7 0 0 v g 2 4 2 0 8 2 0 7 6 0 v d 1
for product information and a complete list of distributors, please go to our website: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies limited in the united states and other countries. data subject to change. copyright ? 2005-2008 avago technologies limited. all rights reserved. obsoletes 5989-3932en av02-1040en - june 24, 2008 ordering information: ammc-3040-w10 = 10 devices per tray AMMC-3040-W50 = 50 devices per tray biasing for sub-harmonic mixing the lo amplifer in the ammc-3040 can also be used as a frequency doubler. optimum conversion efciency as a doubler is obtained with an input power level of 3 to 8 dbm. frequency multiplication is achieved by reducing the bias on the frst stage fet to efciently generate har - monics. the remaining three stages are then used to provide amplifcation. while many bias methods could be used to generate and amplify the desired harmonics within the ammc- 3040s lo amplifer, the following information is sug - gested as a starting point for subharmonic mixing applications. frequency doubling is accomplished by biasing the frst stage fet at pinch-of by setting v g1 = v p C1.1 volts. the remaining three stages are biased for normal amplifcation, e.g., v gg is adjusted such that i d2 + i d3 + i d4 250 ma. the drain voltage, vdd, for all four stages should be 3.5 to 4.5 volts. the assembly diagram shown in figure 16(b) can be used as a guideline. in all cases, cb 100 pf to assure stability. if output port the if output port is located near the middle of the die, allowing this connection to be made from either side of the chip for maximum layout fexibility. the lo and rf signals are refectively terminating at the if port by connecting a 20-mil (500 m) long bond wire from the if output pad on the mmic to a shunt 0.6 pf chip capacitor mounted of- chip as indicated in figure 16. assembly techniques the backside of the ammc-3040 chip is rf ground. for microstripline applications, the chip should be attached directly to the ground plane (e.g., circuit carrier or heat - sink) using electrically conductive epoxy [1,2] . for best performance, the topside of the mmic should be brought up to the same height as the circuit sur - rounding it. this can be accomplished by mounting a gold plated metal shim (same length and width as the mmic) under the chip, which is of the correct thickness to make the chip and adjacent circuit coplanar. the amount of epoxy used for chip and or shim at - tachment should be just enough to provide a thin fllet around the bottom perimeter of the chip or shim. the ground plane should be free of any residue that may jeopardize electrical or mechanical attachment. for use on coplanar circuits, the chip can be mounted directly on the topside ground plane of the circuit as long as care is taken to ensure adequate heat sinking. multiple vias underneath the chip will significantly improve heat conduction. the location of the rf, lo, and if bond pads is shown in figure 15. note that all rf input and output ports are in a ground-signal-ground confguration. the if port is located near the middle of the die, which allows for maximum layout fexibility since the if connection can be made from either side of the chip. rf connections should be kept as short as reasonable to minimize performance degradation due to series inductance. a single bond wire is sufcient for all signal connections. however, double-bonding with 0.7 mil gold wire or the use of gold mesh is recommended for best performance, especially near the high end of the frequency range. thermosonic wedge bonding is the preferred method for wire attachment to the bond pads. gold mesh can be attached using a 2 mil round tracking tool and a tool force of approximately 22 grams with an ultrasonic power of roughly 55 db for a duration of 76 8 ms. a guided wedge at an ultrasonic power level of 64 db can be used for the 0.7 mil wire. the recommended wire bond stage temperature is 150 2c. caution should be taken to not exceed the absolute maximum ratings for assembly temperature and time. the chip is 100 m thick and should be handled with care. this mmic has exposed air bridges on the top surface and should be handled by the edges or with a custom collet (do not pick up die with vacuum on die center.) this mmic is also static sensitive and esd handling precautions should be taken. notes: 1. ablebond 84-1 lm1 silver epoxy is recommended. 2. eutectic attach is not recommended and may jeopardize reliability of the device.
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