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Datasheet File OCR Text: |
this is information on a product in full production. january 2013 doc id 022111 rev 6 1/25 1 stm6519 4-pin smart reset? datasheet - production data features operating voltage range 2 v to 5.5 v low supply current 1 a integrated test mode single smart reset? push-button input with fixed extended reset setup delay (t src ) from 0.5 s to 10 s in 0.5 s steps (typ.), option with internal input pull-up resistor push-button controlled reset pulse duration ? option 1: fully push-button controlled, no fixed or minimum pulse width guaranteed ? option 2: defined output reset pulse duration (t rec ), factory-programmed single reset output ? active-low or active-high ? push-pull or open drain with optional pull-up resistor fixed smart reset input logic voltage levels operating temperature: -40 c to +85 c udfn4 package 1.00 mm x 1.45 mm and udfn6 package 1.00 mm x 1.45 mm ecopack ? 2 (rohs compliant, halogen- free) applications mobile phones, smartphones, pdas e-books mp3 players games portable navigation devices any application that requires delayed reset push-button response for improved system stability udfn6 1.00 mm x 1.45 mm udfn4 1.00 mm x 1.45 mm www.st.com
contents stm6519 2/25 doc id 022111 rev 6 contents 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.2 logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.3 pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 power supply (v cc ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2 power-up sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.3 ground (v ss ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.4 smart reset input (sr ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.5 reset output (rst ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.6 rst output undervoltage behavior (for open-drain option) . . . . . . . . . . . . 8 4 typical application diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8 dc and ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 9 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 10 tape and reel information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 11 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 12 package marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 13 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 stm6519 list of tables doc id 022111 rev 6 3/25 list of tables table 1. signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 2. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 3. operating and measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 4. dc and ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 5. udfn4, 1.00 mm x 1.45 mm x 0.50 mm, 0.65 mm pitch package mechanical data . . . . . 18 table 6. udfn6, 1.00 mm x 1.45 mm x 0.50 mm, 0.50 mm pitch package mechanical data . . . . . 19 table 7. ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 8. package marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 9. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 list of figures stm6519 4/25 doc id 022111 rev 6 list of figures figure 1. stm6519 logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. udfn4 pin connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. udfn6 pin connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. stm6519 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 5. typical application diagram - input, output and stm6519 device in one voltage domain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 6. typical application diagram - stm6519 device in a different voltage domain than input and output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 7. typical application diagram in different voltage domains - sr input in v bat domain like v cc totally disables the test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 8. rst output without t rec option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 9. rst output with t rec option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 10. supply current (i cc ) vs. temperature (t a ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 11. smart reset delay (t src ) vs. temperature (t a ), t src = 4.0 s (typ.) . . . . . . . . . . . . . . . . . . 12 figure 12. test mode entry voltage (v test ) vs. temperature (t a ). . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 13. initial test mode time (t src-ini ) vs. temperature (t a ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 14. udfn4, 1.00 mm x 1.45 mm x 0.50 mm, 0.65 mm pitch package outline . . . . . . . . . . . . . 17 figure 15. footprint recommendation for udfn4, 1.00 mm x 1.45 mm x 0.50 mm, 0.65 mm pitch . . 18 figure 16. udfn6, 1.00 mm x 1.45 mm x 0.50 mm, 0.50 mm pitch package outline . . . . . . . . . . . . . 19 figure 17. footprint recommendation for udfn6 1.00 mm x 1.45 mm x 0.50 mm, 0.50 mm pitch. . . 20 figure 18. carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 19. pin 1 orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 20. package marking (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 stm6519 description doc id 022111 rev 6 5/25 1 description the smart reset tm devices provide a useful feature which ensures that inadvertent short reset push-button closures do not cause system resets. this is done by implementing an extended smart reset input delay time (t src ), which ensures a safe reset and eliminates the need for a specific dedicated reset button. this reset configuration provides versatility and allows the application to distinguish between a software generated interrupt and a hard system reset. when the input push-button is connected to the microcontroller interrupt input, and is closed for a short time, the processor can only be interrupted. if the system still does not respond pro perly, continuing to keep the push-buttons closed for the extended setup time t src causes a hard reset of the processor through the reset output. the stm6519 has one smart reset input (sr ) with preset delayed smart reset setup time (t src ). the reset output (rst ) is asserted after the smart reset input is held active for the selected t src delay time. the rst output remains asserted either until the sr input goes to inactive logic level (i.e. neither fixed nor minimum reset pulse width is set) or the output reset pulse duration is fixed for t rec (i.e. factory-programmed). the device fully operates over a broad v cc range from 2.0 v to 5.5 v. 1.1 test mode after pulling sr up to v test (v cc + 1.4 v) or above, the counter starts to count the initial shortened t src-ini (42 ms, typ.). after t src-ini expires, the rst output either goes down for t rec (if t rec option is used) or stays low as long as overvoltage on sr is detected (if t rec option is not used). this is feedback, and the user only knows that the device is locked in test mode. each time the sr input is connected to ground in test mode, a shortened t src-short (t src /128) is used instead of regular t src (0.5 s - 10 s). in this way the device can be quickly tested without repeating test mode triggering. return to normal mode is possible by performing a new startup of the device (i.e. v cc goes to 0 v and back to its original state). the advantages of this solution are its high glitch immunity, user feedback regarding entry into test mode, and testability within the full v cc range. description stm6519 6/25 doc id 022111 rev 6 1.2 logic diagram figure 1. stm6519 logic diagram 1.3 pin connections figure 2. udfn4 pin connections (top view) figure 3. udfn6 pin connections (top view) 1. not connected (not bonded); should be connected to v ss . 3 4 - 2 3 4 ' . $ 6 # # 3 2 ! - 6 3 3 3 2 6 # # 2 3 4 5 $ & |