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n-channel mosfet 30v dual asymmetric AON7932 q1 q2 30v 30v i d (at v gs =10v) 26a 35a r ds(on) (at v gs =10v) <20m w <12m w r ds(on) (at v gs = 4.5v) <30m w <15m w 100% uis tested 100% rg tested absolute maximum ratings t a =25c unless otherwise noted the AON7932 is designed to provide a high efficienc y synchronous buck power stage with optimal layout an d board space utilization. it includes two specializ ed mosfets in a dual power dfn3x3a package. the q1 "high side" mosfet is designed to minimize switchin g losses. the q2 "low side" mosfet use advance trenc h technology with a monolithically integrated schotty to provide excellent r ds(on) and low gate charge. the AON7932 is well suited for use in compact dc/dc converter applications. v ds top view bottom view symbol v ds v gs i dm i as , i ar e as , e ar t j , t stg parameter symbol typ q1 max q1 typ q2 max q2 t 10s 40 50 40 50 steady-state 70 90 70 90 steady-state r q jc 4.5 5.4 4.2 5 maximum junction-to-case c/w c/w maximum junction-to-ambient a d r q ja maximum junction-to-ambient a c/w 18 t a =70c t a =25c i dsm t c =100c power dissipation b p d t c =25c max q2 16 20 12 35 power dissipation a p dsm t a =70c t a =25c parameter units units 17 16 14 a mj w 6.5 v v a 30 5.3 absolute maximum ratings t a =25c unless otherwise noted a i d t c =25c t c =100c 70 8.1 22 26 max q1 gate-source voltage drain-source voltage continuous drain current thermal characteristics avalanche energy l=0.1mh c 110 6.6 avalanche current c continuous drain current pulsed drain current c 0.9 0.9 23 junction and storage temperature range -55 to 150 c 25 9 10 1.4 1.4 w general description features www.freescale.net.cn 1 / 11
symbol min typ max units bv dss 30 v v ds =30v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.4 1.9 2.4 v i d(on) 70 a 16 20 t j =125c 24 29 23 30 m w g fs 33 s v sd 0.75 1 v i s 20 a c iss 300 380 460 pf c oss 110 160 210 pf c rss 7 13 22 pf r g 0.7 1.5 2.3 w q g (10v) 5.4 6.5 nc q g (4.5v) 2.3 nc q gs 1.3 nc q gd 1 nc t d(on) 10 ns t 3 ns maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time v =10v, v =15v, r =2.3 w , gate resistance v gs =0v, v ds =0v, f=1mhz reverse transfer capacitance total gate charge v gs =10v, v ds =15v, i d =6.6a gate source charge gate drain charge total gate charge on state drain current i s =1a,v gs =0v v ds =5v, i d =6.6a v gs =4.5v, i d =5.3a forward transconductance diode forward voltage v gs =10v, v ds =5v v gs =10v, i d =6.6a r ds(on) static drain-source on-resistance i dss m a v ds =v gs i d =250 m a v ds =0v, v gs = 20v zero gate voltage drain current gate-body leakage current m w v gs =0v, v ds =15v, f=1mhz switching parameters q1 electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions drain-source breakdown voltage i d =250 m a, v gs =0v t r 3 ns t d(off) 15 ns t f 5 ns t rr 6.8 8.5 10.2 ns q rr 12.8 16 19.2 nc body diode reverse recovery charge i f =6.6a, di/dt=500a/ m s turn-on rise time turn-off delaytime v gs =10v, v ds =15v, r l =2.3 w , r gen =3 w turn-off fall time i f =6.6a, di/dt=500a/ m s body diode reverse recovery time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initial t j =25 c. d. the r q ja is the sum of the thermal impedence from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. the maximum current rating is limited by package . h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with ta=25 c. n-channel mosfet 30v dual asymmetric AON7932 www.freescale.net.cn 2 / 11 q1-channel: typical electrical and thermal characteristics 17 5 2 10 0 18 0 5 10 15 20 25 0 0.5 1 1.5 2 2.5 3 3.5 4 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 10 15 20 25 30 0 3 6 9 12 15 r ds(on) (m w w w w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 1.8 2 0 25 50 75 100 125 150 175 200 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =5.3a v gs =10v i d =6.6a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 20 40 60 80 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =2.5v 4v 10v 3.5v 7v 4.5v 40 voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c (note e) 10 15 20 25 30 35 40 2 4 6 8 10 r ds(on) (m w w w w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =6.6a 25 c 125 c n-channel mosfet 30v dual asymmetric AON7932 www.freescale.net.cn 3 / 11 q1-channel: typical electrical and thermal characteristics 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased 1ms 100us dc r ds(on) limited t j(max) =150 c t c =25 c 10 m s 0 2 4 6 8 10 0 1 2 3 4 5 6 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 100 200 300 400 500 600 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction - to - c oss c rss v ds =15v i d =6.6a t j(max) =150 c t c =25 c figure 9: maximum forward biased safe operating area (note f) figure 10: single pulse power rating junction - to - case (note f) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 z q q q q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r q jc =5.4 c/w n-channel mosfet 30v dual asymmetric AON7932 www.freescale.net.cn 4 / 11 q1-channel: typical electrical and thermal characteristics 17 5 2 10 0 18 1.0 10.0 100.0 0.000001 0.00001 0.0001 0.001 i ar (a) peak avalanche current time in avalanche, t a (s) figure 12: single pulse avalanche capability (note c) 0 5 10 15 20 25 30 0 25 50 75 100 125 150 power dissipation (w) t case ( c) figure 13: power de-rating (note f) 0 5 10 15 20 25 30 0 25 50 75 100 125 150 current rating i d (a) t case ( c) figure 14: current de - rating (note f) t a =25 c 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 15: single pulse power rating junction - to - t a =25 c t a =150 c t a =100 c t a =125 c 40 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 z q q q q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse figure 14: current de - rating (note f) figure 15: single pulse power rating junction - to - ambient (note h) r q ja =90 c/w n-channel mosfet 30v dual asymmetric AON7932 www.freescale.net.cn 5 / 11 symbol min typ max units bv dss 30 v v ds =30v, v gs =0v 0.5 t j =55c 500 i gss 100 na v gs(th) gate threshold voltage 1.1 1.6 2.1 v i d(on) 110 a 10 12 t j =125c 15 18 12 15 m w g fs 50 s v sd 0.45 0.7 v i s 30 a c iss 810 1020 1230 pf c oss 77 111 150 pf c rss 45 75 130 pf r g 0.5 1 1.5 w q g (10v) 19 23 nc q g (4.5v) 9 nc q gs 4 nc q gd 3 nc t d(on) 11 ns t 5 ns maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time v =10v, v =15v, r =1.8 w , gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge i s =1a,v gs =0v gate source charge gate drain charge v gs =10v, v ds =15v, i d =8.1a reverse transfer capacitance on state drain current i d =10ma, v gs =0v diode forward voltage v ds =v gs i d =250 m a v ds =0v, v gs = 12v v gs =10v, v ds =5v gate-body leakage current static drain-source on-resistance i dss q2 electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions drain-source breakdown voltage zero gate voltage drain current ma r ds(on) m w v ds =5v, i d =8.1a v gs =0v, v ds =15v, f=1mhz switching parameters total gate charge forward transconductance v gs =4.5v, i d =6.5a v gs =10v, i d =8.1a t r 5 ns t d(off) 29 ns t f 6 ns t rr 4 5.4 7 ns q rr 4 5.3 7 nc body diode reverse recovery charge i f =8.1a, di/dt=500a/ m s turn-on rise time turn-off delaytime v gs =10v, v ds =15v, r l =1.8 w , r gen =3 w turn-off fall time i f =8.1a, di/dt=500a/ m s body diode reverse recovery time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initial t j =25 c. d. the r q ja is the sum of the thermal impedence from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. n-channel mosfet 30v dual asymmetric AON7932 www.freescale.net.cn 6 / 11 q2-channel: typical electrical and thermal characteristics 17 5 2 10 0 18 0 20 40 60 80 100 0 1 2 3 4 5 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 0 4 8 12 16 20 0 3 6 9 12 15 r ds(on) (m w w w w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 1.8 2 0 25 50 75 100 125 150 175 200 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =6.5a v gs =10v i d =8.1a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 20 40 60 80 100 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) 3v 10v vgs=2.5v 3.5v 40 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c (note e) 0 5 10 15 20 25 30 35 40 2 4 6 8 10 r ds(on) (m w w w w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =8.1a 25 c 125 c n-channel mosfet 30v dual asymmetric AON7932 www.freescale.net.cn 7 / 11 q2-channel: typical electrical and thermal characteristics 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased 10 m s 1ms dc r ds(on) limited t j(max) =150 c t c =25 c 100 m s 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction - to - 0 2 4 6 8 10 0 4 8 12 16 20 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 1000 1200 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss c oss c rss v ds =15v i d =8.1a t j(max) =150 c t c =25 c 40 figure 9: maximum forward biased safe operating area (note f) figure 10: single pulse power rating junction - to - case (note f) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 z q q q q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r q jc =5 c/w n-channel mosfet 30v dual asymmetric AON7932 www.freescale.net.cn 8 / 11 q2-channel: typical electrical and thermal characteristics 17 5 2 10 0 18 1 10 100 0.000001 0.00001 0.0001 0.001 i ar (a) peak avalanche current time in avalanche, t a (s) figure 12: single pulse avalanche capability (note c) 0 5 10 15 20 25 30 0 25 50 75 100 125 150 power dissipation (w) t case ( c) figure 13: power de-rating (note f) 0 10 20 30 40 50 0 25 50 75 100 125 150 current rating i d (a) t case ( c) figure 14: current de - rating (note f) t a =25 c 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 15: single pulse power rating junction - to - t a =25 c t a =150 c t a =100 c t a =125 c 40 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 100 1000 z q q q q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note g) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse figure 14: current de - rating (note f) figure 15: single pulse power rating junction - to - ambient (note g) r q ja =90 c/w n-channel mosfet 30v dual asymmetric AON7932 www.freescale.net.cn 9 / 11 q2-channel: typical electrical and thermal characteristics 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 0 50 100 150 200 i r (a) temperature (c) figure 17: diode reverse leakage current vs. junction temperature v ds =15v v ds =30v 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 50 100 150 200 v sd (v) temperature (c) figure 18: diode forward voltage vs. junction temperature i s =1a 10a 20a 5a 0 2 4 6 8 10 0 4 8 12 16 0 5 10 15 20 25 30 i rm (a) q rr (nc) i s (a) figure 18: diode reverse recovery charge and peak di/dt=800a/ m s 125oc 125oc 25oc 25oc q rr i rm 0 0.5 1 1.5 2 2.5 3 3.5 4 0 2 4 6 8 10 0 5 10 15 20 25 30 s t rr (ns) i s (a) figure 19: diode reverse recovery time and di/dt=800a/ m s 125oc 125oc 25oc 25oc t rr s s figure 18: diode reverse recovery charge and peak current vs. conduction current 0 3 6 9 12 15 0 2 4 6 8 0 200 400 600 800 1000 i rm (a) q rr (nc) di/dt (a/ m mm m s) figure 20: diode reverse recovery charge and peak current vs. di/dt 125oc 125oc 25oc 25oc i s =20a q rr i rm figure 19: diode reverse recovery time and softness factor vs. conduction current 0 0.5 1 1.5 2 2.5 3 3.5 4 2 4 6 8 10 0 200 400 600 800 1000 s t rr (ns) di/dt (a/ m mm m s) figure 21: diode reverse recovery time and softness factor vs. di/dt 125oc 25oc 25oc 125oc i s =20a t rr s n-channel mosfet 30v dual asymmetric AON7932 www.freescale.net.cn 10 / 11 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off id + l vds bv unclamped inductive switching (uis) test circuit & waveforms vds dss 2 e = 1/2 li ar ar vdd vgs vgs rg dut - + vdc vgs id vgs i ig vgs - + vdc dut l vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar di/dt i rm rr vdd vdd q = - idt t rr n-channel mosfet 30v dual asymmetric AON7932 www.freescale.net.cn 11 / 11 |
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