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  ? semiconductor components industries, llc, 2012 november, 2012 ? rev. 5 1 publication order number: mcr12/d MCR12DG, mcr12mg, mcr12ng silicon controlled rectifiers reverse blocking thyristors designed primarily for half-wave ac control applications, such as motor controls, heating controls, and power supplies; or wherever half ? wave silicon gate ? controlled devices are needed. features ? blocking voltage to 800 volts ? on ? state current rating of 12 amperes rms at 80 c ? high surge current capability ? 100 amperes ? rugged, economical to ? 220ab package ? glass passivated junctions for reliability and uniformity ? minimum and maximum values of igt, vgt an ih specified for ease of design ? high immunity to dv/dt ? 100 v/  sec minimum at 125 c ? these are pb ? free devices maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit peak repetitive off ? state voltage (note 1 ) (t j = ? 40 to 125 c, sine wave, 50 to 60 hz, gate open) mcr12d mcr12m mcr12n v drm, v rrm 400 600 800 v on-state rms current (180 conduction angles; t c = 80 c) i t(rms) 12 a peak non-repetitive surge current (1/2 cycle, sine wave 60 hz, t j = 125 c) i tsm 100 a circuit fusing consideration (t = 8.33 ms) i 2 t 41 a 2 sec forward peak gate power (pulse width 1.0  s, t c = 80 c) p gm 5.0 w forward average gate power (t = 8.3 ms, t c = 80 c) p g(av) 0.5 w average on-state current (180 conduction angles; t c = 80 c) i t(av) 7.8 a forward peak gate current (pulse width 1.0  s, t c = 90 c) i gm 2.0 a operating junction temperature range t j ? 40 to +125 c storage temperature range t stg ? 40 to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. v drm and v rrm for all types can be applied on a continuous basis. ratings apply for zero or negative gate voltage; positive gate voltage shall not be applied concurrent with negative potential on the anode. blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. scrs 12 amperes rms 400 thru 800 volts to ? 220 case 221a ? 09 style 3 1 http://onsemi.com marking diagram a = assembly location y = year ww = work week x = d, m, or n g = pb ? free package aka = diode polarity 2 3 device package shipping ordering information MCR12DG to ? 220ab (pb ? free) 50 units / rail mcr12ng to ? 220ab (pb ? free) 50 units / rail mcr12mg to ? 220ab (pb ? free) 50 units / rail k g a pin assignment 1 2 3 anode gate cathode 4 anode ay ww mcr12xg aka
MCR12DG, mcr12mg, mcr12ng http://onsemi.com 2 thermal characteristics characteristic symbol value unit thermal resistance, junction ? to ? case junction ? to ? ambient r  jc r  ja 2.2 62.5 c/w maximum lead temperature for soldering purposes 1/8 from case for 10 seconds t l 260 c electrical characteristics (t j = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics peak repetitive forward or reverse blocking current (v d = rated v drm and v rrm ; gate open) t j = 25 c t j = 125 c i drm , i rrm ? ? ? ? 0.01 2.0 ma on characteristics peak forward on ? state voltage (note 2) (i tm = 24 a) v tm ? ? 2.2 v gate trigger current (continuous dc) (v d = 12 v; r l = 100  ) i gt 2.0 8.0 20 ma holding current (v d = 12 v, gate open, initiating current = 200 ma) i h 4.0 20 40 ma latch current (v d = 12 v, i g = 20 ma) i l 6.0 25 60 ma gate trigger voltage (continuous dc) (v d = 12 v; r l =100  ) v gt 0.5 0.65 1.0 v dynamic characteristics critical rate of rise of off ? state voltage (v d = rated v drm , exponential waveform, gate open, t j = 125 c) dv/dt 100 250 ? v/  s repetitive critical rate of rise of on ? state current ipk = 50 a, pw = 40  sec, dig/dt = 1 a/  sec, igt = 50 ma di/dt ? ? 50 a/  s 2. indicates pulse test: pulse width  2.0 ms, duty cycle  2%. + current + voltage v tm i drm at v drm i h symbol parameter v drm peak repetitive off state forward voltage i drm peak forward blocking current v rrm peak repetitive off state reverse voltage i rrm peak reverse blocking current v tm peak on state voltage i h holding current voltage current characteristic of scr anode + on state reverse blocking region (off state) reverse avalanche region anode ? forward blocking region i rrm at v rrm (off state) 90 180 figure 1. typical rms current derating figure 2. on ? state power dissipation 8 0 i t(rms) , rms on ? state current (amps) 125 120 i t(av) , average on ? state current (amps) 38 0 8 4 2 0 t c , case temperature ( c) p 115 105 12 3 12 6 10 20 , average power dissipation (watts) (av) dc 180 90 60 dc 30 5 45 110 4 100 90 95 67 12 14 67 12 91011 30 12 910 11 16 18
MCR12DG, mcr12mg, mcr12ng http://onsemi.com 3 figure 3. typical on ? state characteristics figure 4. typical gate trigger current versus junction temperature 3.0 0.5 v t , instantaneous on ? state voltage (volts) 100 10 1 0.1 t j , junction temperature ( c) ? 10 ? 40 20 2 0 2.5 i gate trigger current (ma) 1.0 2.0 20 50 80 125 , instantaneous on-state current (amps) t maximum @ t j = 25 c maximum @ t j = 125 c 1.5 5356595 ? 25 110 4 6 8 10 12 14 16 18 figure 5. typical holding current versus junction temperature figure 6. typical gate trigger voltage versus junction temperature ? 25 20 ? 40 t j , junction temperature ( c) 10 t j , junction temperature ( c) ? 25 65 ? 40 0.2 20 5 , holding current (ma) i h 50 110 65 5 125 35 50 v gt , gate trigger voltage (volts) 80 1 1.0 ? 10 35 95 100 ? 10 95 80 125 0.3 0.4 0.5 0.6 0.7 0.8 0.9 110 figure 7. typical latching current versus junction temperature 65 125 ? 40 t j , junction temperature ( c) i l , latching current (ma) 10 1 ? 25 5 20 50 95 100 ? 10 35 80 110
MCR12DG, mcr12mg, mcr12ng http://onsemi.com 4 package dimensions to ? 220 case 221a ? 09 issue ag style 3: pin 1. cathode 2. anode 3. gate 4. anode notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.405 9.66 10.28 c 0.160 0.190 4.07 4.82 d 0.025 0.036 0.64 0.91 f 0.142 0.161 3.61 4.09 g 0.095 0.105 2.42 2.66 h 0.110 0.161 2.80 4.10 j 0.014 0.025 0.36 0.64 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.045 0.055 1.15 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 --- 1.15 --- z --- 0.080 --- 2.04 b q h z l v g n a k f 123 4 d seating plane ? t ? c s t u r j on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 mcr12/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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