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n1412hkpc 20121030-s00001 no. a2153-1/15 * i 2 c bus is a trademark of philips corporation. http://onsemi.com semiconductor components industries, llc, 2013 june, 2013 LC75106V overview the LC75106V is a digital echo lsi for karaoke. it has the microcomputer control mode (i 2 c bus control) and non- control mode. therefore, various karaoke systems can be made. this lsi has 2ch mic amplifier (with alc), volume of 2ch mic, echo feed back volume and echo volume. in addition, when the stereo signal internal connected mode has the function of the vocal cancellation etc. the karaoke system can be constructed with this lsi. functions ? 2ch mic amplifier (with built-in auto level control) ? volume of 2ch mic ? with built-in for digital echo memory 32kbit ? feedback volume for digital echo ? digital echo volume ? mic mixing function ? vocal cancellation ? with built-in oscillation circuit ? i 2 c bus control application ? mini component audio and other ordering number : ena2153 ordering number : ena2153 cmos lsi digital echo lsi with built-in mic amplifier
LC75106V no. a2153-2/15 specifications absolute maximum ratings at ta = 25 c, analog gnd = 0v parameter symbol conditions ratings unit maximum power supply voltage v dd max v dd +8.0 to +10.0 v allowable consumption power pd max ta 70 c * 500 mw operating temperature range ta -20 to +70 c storage temperature range tstg -40 to +125 c * mounted reference pcb (114.3mm 76.1mm 1.6mm, glass epoxy resin) dc electrical characteristics ratings at ta = 25 c, v ss = 0v operating condition /ta = 25 c parameter symbol pin name conditions min typ max unit recommended supply voltage v dd v dd 9.0 v range of operating supply voltage v dd opg v dd v dd =9.0v 8.0 10.0 v electric characteristics /ta = 25 c, v dd = 9.0v, fin = 1khz, v in = 1mvrms = 0db, r l = 10k parameter symbol pin name conditions min typ max unit current without signal i dd o v dd 60 ma clock frequency f clk osc osc ex.r=30k 1.72 2.45 3.19 mhz control data hi level voltage v ih scl, sda 2.0 3.5 v control data low level voltage v il scl, sda 0.0 0.5 v control data input pulse width t w scl, sda 1.0 s control data hold time thold scl, sda 1.0 s control data operation frequency fopg scl, sda 500 khz ac electrical characteristics (reference data: no measurement) parameter symbol pin name conditions min typ max unit [mic-amp] input=micin1/micin2, output=micout1/micout2, v in =-48dbv, valc=vref ? 1.414v, mic-amp nf ex.r=680 , alc ex.c=2.2 f mic gain vg m2 micout1/2 mic-amp nf ex.r=680 +34.0 +37.0 +42.0 db max output voltage vo tm micout1/2 mic gain=+38db, thd=1%, filter=a-filter, alc=off 1.75 vrms total harmonic distortion rate1 thd m1 micout1/2 mic gain=+38db, alc=off, v o =-10dbv, filter=a-filter 0.07 0.5 % total harmonic distortion rate 2 thd m2 micout1/2 mic gain=+38db, alc=on, v o =0dbv, v in =-32dbv, filter=a-filter 0.1 1.0 % output noise voltage vno m micout1/2 mic gain=+38db, filt er=a-filter -74.0 -65.0 dbv alc attack time ta a micout1/2 mic gain=+38db, alc=on, v o =0dbv, v in =-32dbv 60 ms alc release time ta r micout1/2 mic gain=+38db, alc=on, v o =0dbv, v in =-32dbv 6.0 s input impedance zi m micin1/2 45 60 75 k output impedance zo m micout1/2 mic-gain=+38db, alc=off, v o =0dbv 0.75 1.5 3.0 k [digital echo] stereo signal outside connection modes, input=sumin, output=echoout, v in =-10dbv, delay time=100ms, mic volume 1/2=0db, feedback volume=- delay time dt echoout f clk =2.45mhz 75 100 125 ms output gain vg e echoout -4.5 -2.0 +0.5 db max output voltage vo e echoout thd=10%, filter=a-filter 1.5 vrms total harmonic distortion rate thd e echoout filter=a-filter 0.7 2.0 % output noise voltage vno e echoout filter=a-filter -65 -55 dbv input impedance zi e sumin 45 60 75 k output impedance zo e echoout delay time=100ms, v o =0dbv 45 60 75 k continued to the next page. stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended oper ating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliabili ty.
LC75106V no. a2153-3/15 continued from the previous page. parameter symbol pin name conditions min typ max unit [stereo line] stereo signal internal connection modes, input=lchin/rchin, output=lchout/rchout, v in =-10dbv, line select=stereo, mic-volume 1/2=echo volume=- output gain vg s lch/rchout -3.5 -1.5 +0.5 db max output voltage vo s lch/rchout thd=1%, filt er=a-filter 1.75 vrms total harmonic distortion rate thd s lch/rchout filter=a -filter 0.03 0.1 % output noise voltage vno s lch/rchout filter=a-f ilter -85.0 -75.0 dbv vocal removal rate lch/rchout -21.5 -17.5 -14.5 input impedance zi s lch/rchin 75 100 125 k output impedance zo s lch/rchout v o =0dbv 0.75 1.5 3.0 k [mic sum-amp] stereo signal outside connection modes, input=in1/in2, output=sumout, v in =-10dbv output gain vg ms sumout +4.0 +5.5 +7.0 db max output voltage vo ms sumout thd=1%, filter=a-filter 1.75 vrms total harmonic distortion rate thd ms sumout filter=a-filter 0.05 0.5 % output noise voltage vno ms sumout filter=a-filter -77.0 -70.0 dbv input impedance zi ms in1/in2 45 60 75 k output impedance zo ms sumout v o =0dbv 1.0 2.0 4.0 k [echo sum-amp] stereo signal outside connection modes, input=sumin/echoin, output=out, v in =-10dbv output gain vg es out +4.0 +5.5 +7.0 db max output voltage vo es out thd=1%, filter=a-filter 1.75 vrms total harmonic distortion rate thd es out filter=a-filter 0.05 0.5 % output noise voltage vno es out filter=a-filter -77.0 -70.0 dbv input impedance zi es sumin/echoin 45 60 75 k output impedance zo es out v o =0dbv 1.0 2.0 4.0 k package dimensions unit:mm (typ) 3247a sanyo : ssop36(275mil) 1 36 18 19 0.8 15.0 0.5 7.6 0.2 0.3 (0.7) 5.6 (1.5) 1.7max 0.1
LC75106V no. a2153-4/15 pin assignment top view block diagram 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 micin1 alc1 micnf1 micout1 vref in1 sumout sumin out feedin echoin echoout lpf1 lpf2 d/a gnd test1 test2 (selin) (lchout) (rchout) (selout) (lchin) (rchin) 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 micin2 alc2 micnf2 micout2 in2 alcdetv vdd n.c aaf3 aaf2 aaf1 nf a/d dc3v osc test4 test3 n.c (filter) (ce) (di) (cl) + - alc + - alc lpf aaf reg. osc a/d d/a logic sram + mic-volume 2 mic-volume 1 + + echo-volume feed-volume line selecter stereo (through) lch mono rch mono l+r /2 vocal cut + + mic-amp1 mic-amp2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 lc75106 micin1 alc1 micnf1 micout1 vref micin2 alc2 micnf2 micout2 in1 in2 alcdetv sumout sumin out feedin echoin e choout lpf1 lpf2 d/a gnd n.c n.c vdd n.c aaf3 aaf2 aaf1 nf a/d dc3v osc test4 test3 n.c (filter) (selin) (lchout) (cs) (sda) (scl) ( rchout) (selout) (lchin) (rchin)
LC75106V no. a2153-5/15 pin descriptions pin no. pin name voltage description equivalent circuit 1 36 micin1 micin2 v dd /2 mic signal input 1 mic signal input 2 2 35 alc1 alc2 auto level control terminal 1 auto level control terminal 2 3 34 micnf1 micnf2 mic feedback signal input terminal 1 mic feedback signal input terminal 2 4 33 micout1 micout2 mic signal output terminal 1 mic signal output terminal 2 5 32 in1 in2 mic volume input terminal 1 mic volume input terminal 2 6 vref internal standard voltage continued to the next page. 1 36 2 35 3 34 4 33 5 32 6
LC75106V no. a2153-6/15 continued from the previous page. pin no. pin name voltage description equivalent circuit 7 sumout/selout [cs terminal = ?l?] mic volume 1/2 sum output [cs terminal = ?h?] selector output terminal 8 sumin/selin [cs terminal = ?l?] delay signal input [cs terminal = ?h?] selector input terminal 9 out/rchout [cs terminal = ?l?] echoin signal, micsum signal sum output [cs terminal = ?h?] rch output 10 feedin/lchout [cs terminal = ?l?] echo feed back signal input [cs terminal = ?h?] lch output 11 echoin echo signal input (echo volume input) 12 echoout echo signal output continued to the next page. 7 8 9 10 11 12
LC75106V no. a2153-7/15 continued from the previous page. pin no. pin name voltage description equivalent circuit 13 14 lpf1 lpf2 lpf input terminal 1 lpf input terminal 2 15 24 d/a a/d terminal for a/d terminal for d/a 16 gnd analog gnd 17 18 nc/rchin nc/lchin rch input terminal lch input terminal 19 sda 0v/3.3v i 2 c bus sda terminal 20 21 scl cs 0v/3.3v i 2 c bus scl terminal mode select terminal 22 osc oscillator circuit adjustment terminal continued to the next page. 13 14 15 24 17 18 19 20 21 22
LC75106V no. a2153-8/15 continued from the previous page. pin no. pin name voltage description equivalent circuit 23 dc3v 3.3v power source for logic block 25 nf terminal for a/d 26 aaf1 aaf input terminal 1 27 28 aaf2 aaf3 aaf input terminal 2 aaf input terminal 3 29 nc/filter filter input terminal 30 v dd supply voltage 31 alcdetv alc setting voltage input terminal 23 25 26 27 28 29 31
LC75106V no. a2153-9/15 sample application circ uit (mic-gain = +38db) stereo signal internal connection modes stereo signal outside connection modes 0.1uf 16v 1000pf 1000pf 50v 4700pf 50v 4700pf 50v 1uf 50v 1uf 50v 33k_ohm 30k_ohm 100_ohm 1k_ohm 0.01uf 50v 680pf 50v 680pf 50v 0.1uf 50v 0.1uf 470uf 35v 100uf 16v 50k_ohm 47uf 16v 680pf50v 2.2uf 16v 0.1uf 16v 56000pf 16v 680_ohm 680_ohm 470uf 16v 0.1uf 1uf 50v 1uf 50v 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 lc75106 micin1 alc1 micnf1 micout1 vref micin2 alc2 micnf2 micout2 in1 in2 alcdetv sumout sumin out feedin echoin echoout lpf1 lpf2 d/a gnd n.c n.c vdd n.c aaf3 aaf2 aaf1 nf a/d dc3v osc test4 test3 n.c (filter) (selin) (lchout) (cs) (sda) (scl) (rchout) (selout) (rchin) (lchin) vdd (9.0v) analog gnd mic1 input mic2 input lch output rch output lch input rch input scl sda key control lsi + + + + 10k_ohm 10k_ohm dc power (3.3v) 1k_ohm 1k_ohm 2.2uf 16v 1uf 50v 1uf 50v 56000pf 16v 680pf50v 2.2uf 16v 2.2uf 16v 0.1uf 16v + +++ + ++ + + + + + 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 lc75106 micin1 alc1 micnf1 micout1 vref micin2 alc2 micnf2 micout2 in1 in2 alcdetv sumout sumin out feedin echoin echoout lpf1 lpf2 d/a gnd n.c n.c vdd n.c aaf3 aaf2 aaf1 nf a/d dc3v osc test4 test3 n.c (filter) (selin) (lchout) (cs) (sda) (scl) (rchout) (selout) (lchin) (rchin) vdd (9.0v) analog gnd echo output mic1 input mic2 input + ++ + 0.1uf 16v 0.1uf 16v 2.2uf 16v 2.2uf 16v 680_ohm 680pf 50v 50k_ohm 2.2uf 16v 56000pf 16v 470uf 16v 0.1uf 16v 0.1uf 1uf 16v 0.1uf 16v 0.1uf 16v 50k_ohm 50k_ohm 1000pf 1000pf 50v 4700pf 50v 4700pf 50v 680pf 50v 680pf 50v 1k_ohm 100_ohm 33k_ohm 30k_ohm 100uf 16v 0.1uf 0.1uf 50v 470uf 35v 50k_ohm 47uf 16v 56000pf 16v 50k_ohm 680_ohm 50k_ohm scl(i2c) sda(i2c) 3.3v 10k_ohm 10k_ohm 1k_ohm 1k_ohm 680pf 50v 2.2uf 16v 10 11 12 13 feedin echoin echoout (lchout) 0.1uf 16v 0.1uf 16v 1000pf lpf1 3 4 5 micnf1 micout1 in1 680pf 50v 56000pf 16v 34 33 32 micnf2 micout2 in2 56000pf 16v 680pf 50v non i2c control = 33k_ohm (pull down) i2c control i2c control i2c control + + + + + +++ ++
LC75106V no. a2153-10/15 control data structure (serial data input) the setting of lc75106 can be controlled with i 2 c bus. all the settings can be controlled by i 2 c bus at the stereo signal internal connect ion modes (cs terminal = ?h?), and all the volumes except the stereo source control can be set at the stereo signal outside connection modes (cs terminal = ?l?). the karaoke system can be made fr om external resistance by doing i 2 c bus line in pull up at the stereo signal outside connection modes. 1) the explanation of i 2 c bus i 2 c bus (inter ic bus) is the bus system which the philips company developed. it does controls such as the start, the stop by two co ntrol signals of sda (serial data) and scl (serial clock). the output of each signal is open drain and forms out of wired or. s; start condition/p; stop condition/ack; acknowledge data is transmitted in the msb first. 1 unit is composed of 8 bits and ack is put back from the slave to confirm. slave ic reads data with rising edge of scl. master ic changes data by falling edge in scl. 2) the control register table1 slave address msb lsb 0 0 1 1 1 0 0 0 note; lc75106 is recepti on exclusive use. it depends and it uses lsb by the ?0? fixation. ? i 2 c data function sub address data binary hex d7 d6 d5 d4 d3 d2 d1 d0 stereo line select/mic1 volume 0000 0001 01 ld2 ld1 ld0 key m1d3 m1d2 m1d1 m1d0 mic2 volume/test 0000 0010 02 m2d3 m2d2 m2d1 m2d0 test3 test2 test1 test0 delay time/echo volume 0000 0011 03 0 dt2 dt1 dt0 0 ed2 ed1 ed0 feed back volume 0000 0100 04 0 fb2 fb1 fb0 0 0 0 0 sda scl s ack ack p
LC75106V no. a2153-11/15 control data description no control part/ data description related data (1) line select ld2 ld1 ld0 ? the data determines line output. cs=?h? ld2 ld1 ld0 0 0 0 stereo output (initial setting) 0 0 1 lch mono output 0 1 0 rch mono output 0 1 1 l+r/2 output 1 0 0 vocal cut output 1 0 1 reserve 1 1 0 reserve 1 1 1 reserve (2) external key control switching data key ? this data determines route where exte rnal key control is used. cs=?h? key external key control 0 invalid (initial setting) 1 valid (3) microphone volume gain setting data m1d3 m1d2 m1d1 m1d0 m2d3 m2d2 m2d1 m2d0 ? the data determines the gain of micin 1/2. m1d3 m1d2 m1d1 m1d0 m2d3 m2d2 m2d1 m2d0 0 0 0 0 0db (initial setting) 0 0 0 1 -2db 0 0 1 0 -4db 0 0 1 1 -6db 0 1 0 0 -8db 0 1 0 1 -10db 0 1 1 0 -12db 0 1 1 1 -14db 1 0 0 0 -16db 1 0 0 1 -18db 1 0 1 0 -20db 1 0 1 1 -23db 1 1 0 0 -26db 1 1 0 1 -29db 1 1 1 0 -32db 1 1 1 1 - (4) delay time setting data dt2 dt1 dt0 ? the data determines delay time for echo. dt2 dt1 dt0 0 0 0 off 0 0 1 75ms (initial setting) 0 1 0 100ms 0 1 1 125ms 1 0 0 150ms 1 0 1 175ms 1 1 0 200ms 1 1 1 reserve continued to the next page.
LC75106V no. a2153-12/15 continued from the previous page. no control part/ data description related data (5) echo volume gain setting data ed2 ed1 ed0 ? the data determines gain of echo output. ed2 ed1 ed0 0 0 0 0db (initial setting) 0 0 1 -2db 0 1 0 -4db 0 1 1 -6db 1 0 0 -9db 1 0 1 -12db 1 1 0 -15db 1 1 1 - (6) feedback volume gain setting data fb2 fb1 fb0 ? the data determines feedback volume for echo. fb2 fb1 fb0 0 0 0 -4db (initial setting) 0 0 1 -6db 0 1 0 -9db 0 1 1 -12db 1 0 0 - 1 0 1 reserve 1 1 0 reserve 1 1 1 reserve (7) lsi test data test3 test2 test1 test0 ? data for lsi testing test3 to test0 shoul d be set to ?0?.
LC75106V no. a2153-13/15 control with external parts lc75106 can adjust the setting with external parts at the stereo signal outside connection modes. (1) delay time setting the delay time changes if the cr oscillation frequency with built-in lc75106 is adjusted. delay time external resistance osc freq note 75ms 30k 2.458mhz 100ms 47k 1.843mhz 120ms 56k 1.536mhz 150ms 75k 1.228mhz 190ms 187k 0.970mhz (2) mic-volume/echo volume setting when mic volume and echo volume are set with external part s, it is possible to set it in the ratio of r1 and r2 as shown in the figure below. gain r1 r2 note -2db 10.284k 39.716k -4db 18.452k 31.548k -6db 24.941k 25.059k -8db 30.095k 19.905k -9db 32.259k 17.741k -10db 34.189k 15.811k -12db 37.441k 12.559k -14db 40.024k 9.976k -15db 41.109k 8.891k -16db 42.076k 7.924k -18db 43.705k 6.295k -20db 45.000k 5.000k -23db 46.460k 3.540k -26db 47.494k 2.506k -29db 48.226k 17.74k -32db 48.744k 1.256k - db 50.000k 0 (3) feed back volume setting to prevent the oscillation, the echo feed back signal input terminal has gain of -4db. therefore, please calculate in consideration of the attenuation of -4db when you set volume. gain r1 r2 note -4db 0 50.000k -6db 10.284k 39.716k -9db 18.452k 31.548k -12db 24.941k 25.059k - db 50.000k 0 4 5 + 0.1uf 50v r2 r1 vref 4 5 + 0.1uf 50v r2 r1 vref
LC75106V no. a2153-14/15 (4) mic amp gain setting mic amplifier gain is adjusted according to the resistance value applied to 3pin and 34pin. and low frequency is cut off by connecting condenser. mic amplifier has built-in alc (auto level control). outp ut level can be controlled by inputting the standard voltage to 31pin. 1) mic amp gain setting ? r1 = 56.2k [mic gain = 38db] r2 = r1/mic gain =56.2k/79.4 680 2) fc setting fc = 1 2 r1 c1 (5) alc control voltage setting 1) alc control voltage setting when the alc detecting voltage is input to 31pin, the alc operation level can be set. the setting method becomes as follows. [v dd = 9.0v/1vrms setting] v dd /2 = 9.0/2 = 4.5 1vrms/2 = 2 * 1 = 1.414v valc setting voltage = 4.5 ? 1.414 = 3.086v (dc) alc setting voltage can be set to put resistance be tween the terminal vref and the terminal gnd. * the voltage of the terminal vref depends on the power-supply voltage and changes. 2) alc attack time/release time setting the attack time and the release time of alc can be set with the capacitor between 2pin - v dd and 35pin - v dd . capacitor attack time release time note 2.2 f about 60ms about 6.0s 1.0 f about 35ms about 2.5s 0.1 f about 16ms about 0.25s 1 4 + + ? r2 r1 vref 3 alc 2 c1 r2 c2
LC75106V no. a2153-15/15 ps on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc mak es no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability ar ising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequentia l or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s techn ical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorize d for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other appli cation in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of persona l injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture o fthe part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws a nd is not for resale in any manner.

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