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| plastic press-fit (3x9mm built-in) 42 alloy snpb (pb : 1mg max) compliant 90smo 89 90smo (+3.3v or +5v fixed models) standard smd clock oscillators standard specifications package data package item outer package sealing terminal lead frame terminal plating rohs item specifications 90smo t 1.000 mhz to 70.000 mhz 90smo(3.3vc) : ? 100 ppm 90smo(ce) : ? 100 ppm 90smo(3.3vd) : ? 50 ppm 90smo(cd) : ? 50 ppm - 10?c to 70?c (standard) - 40?c to 85?c(w) 3.3v dc ? 10% 5v dc ? 10% v ih : 2.0v min. (1 mhz to 30 mhz) v ih : 2.0v min. v il : 0.8v max. (1 mhz to 30 mhz) v il : 0.8v max. v ih : 2.4v min. (30 mhz to 70 mhz) v il : 0.6v max. (30 mhz to 70 mhz) - 0.5v to 7.0v dc - 55?c to 125?c 9 ma max. (1 mhz to 30 mhz) 23 ma max. (1 mhz to 30 mhz) 20 ma max. (30 mhz to 70 mhz) 35 ma max. (30 mhz to 70 mhz) 40% to 60% at 50%v dd level 6 ns max. (20%v dd to 80%v dd level) 8 ns max. (10%v dd to 90%v dd level) v ol : 10%v dd max. v ol : 0.4v max. v oh : 90%v dd min. v oh : 90%v dd min. 30 pf max. (cmos) 50 pf max. (cmos) 100 ns max. 5 ma max. (1 mhz to 30 mhz) 12 ma max. (1 mhz to 30 mhz) 15 ma max. (30 mhz to 70 mhz) 28 ma max. (30 mhz to 70 mhz) 10 ms max. ? 5 ppm max. at 25?c ? 3?c for first year 250?c ? 10?c for 10 seconds 170?c ? 10?c for 1 to 2 minutes (preheating) generic part number frequency range frequency stability ( - 10?c to 70?c) over all conditions operating conditions operating temperature input voltage (v dd ) oe control voltage (pin#1) absolute max. ratings supply voltage storage temperature input current ( 25?c) output ( - 10?c to 70?c) symmetry rise and fall times "0" level "1" level load enable / disable delay time disable current startup time aging reflow condition clk osc crystal clock oscillators 14.0max. 9.80max. 8.65 7.62 4.06 0.51 5.08 0.25min 4.70max. #1 #2 #4 #3 #4 #3 #1 #2 pin 1 connection "l" 2 gnd 3z open or "h" output z : high impedance 4v dd 90smo 90smo ( t 1) final exact part number to be determined with frequency, frequency stability and input voltage. e.g. 90smo(3.3vd) 25.000 mhz. tf t t 90% or 80% v dd 10% or 20% v dd ov dc symmetry=t/t 100(%) 50% v dd tr gnd v oh ("1"level) v ol ("0"level) v dd output waveform v dc power supply cl : including fixture and probe capacitance. v dd v dd cl t est point #2 #3 output tri-state gnd #1 #4 0.01 f ? 0.1 f e/d sw a test circuit 1.27 3.81 1.27 5.80 3.0 3.0 5.08 0.01 f ? 0.1 f soldering pattern a 14.3 10.1 24.0 11.5 12.0 1.6 0.4 5.0 330 1000pcs qty/reel b c d f j l m reel dia. 4.0 0.1 2.0 0.1 1.75 0.1 + 0.1 - 0 1.5 l b f d a c j m t ape specifications actual size 90smo (+3.3v or +5v fixed models) standard smd clock oscillators
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