tl/f/5901 mm54c192/mm74c192 synchronous 4-bit up/down decade counter mm54c193/mm74c193 synchronous 4-bit up/down binary counter february 1988 mm54c192/mm74c192 synchronous 4-bit up/down decade counter mm54c193/mm74c193 synchronous 4-bit up/down binary counter general description these up/down counters are monolithic complementary mos (cmos) integrated circuits. the mm54c192 and mm74c192 are bcd counters, while the mm54c193 and mm74c193 are binary counters. counting up and counting down is performed by two count inputs, one being held high while the other is clocked. the outputs change on the positive-going transition of this clock. these counters feature preset inputs that are set when load is a logical ``0'' and a clear which forces all outputs to ``0'' when it is at a logical ``1''. the counters also have carry and borrow outputs so that they can be cascaded using no ex- ternal circuitry. features y high noise margin 1v guaranteed y tenth power ttl compatible drive 2 lpttl loads y wide supply range 3v to 15v y carry and borrow outputs for n-bit cascading y asynchronous clear y high noise immunity 0.45 v cc (typ.) connection diagram dual-in-line package tl/f/5901 1 top view order number mm54c192, mm74c192, mm54c193 or mm74c193 c 1995 national semiconductor corporation rrd-b30m105/printed in u. s. a.
absolute maximum ratings (note 1) if military/aerospace specified devices are required, please contact the national semiconductor sales office/distributors for availability and specifications. voltage at any pin b 0.3v to v cc a 0.3v operating temperature range (t a ) mm54c154 b 55 cto a 125 c mm74c154 b 40 cto a 85 c storage temperature range (t s ) b 65 cto a 150 c maximum v cc voltage 18v power dissipation (p d ) dual-in-line 700 mw small outline 500 mw operating v cc range 3v to 15v lead temperature (t a ) (soldering, 10 sec.) 260 c dc electrical characteristics min/max limits apply across temperature range unless otherwise noted symbol parameter conditions min typ max units cmos to cmos v in(1) logical ``1'' input voltage v cc e 5v 3.5 v v cc e 10v 8.0 v v in(0) logical ``0'' input voltage v cc e 5v 1.5 v v cc e 10v 2.0 v v out(1) logical ``1'' output voltage v cc e 5v, i o eb 10 m a 4.5 v v cc e 10v, i o eb 10 m a 9.0 v v out(0) logical ``0'' output voltage v cc e 5v, i o e 10 m a 0.5 v v cc e 10v, i o e 10 m a 1.0 v i in(1) logical ``1'' input current v cc e 15v, v in e 15v 0.005 1.0 m a i in(0) logical ``0'' input current v cc e 15v, v in e 0v b 1.0 b 0.005 m a i cc supply current v cc e 15v 0.05 300 m a cmos to lpttl interface v in(1) logical ``1'' input voltage 54c v cc e 4.5v v cc b 1.5 v 74c v cc e 4.75v v cc b 1.5 v v in(0) logical ``0'' input voltage 54c v cc e 4.5v 0.8 v 74c v cc e 4.75v 0.8 v v out(1) logical ``1'' output voltage 54c v cc e 4.5v, i o eb 100 m a 2.4 v 74c v cc e 4.75v, i o eb 100 m a 2.4 v v out(0) logical ``0'' output voltage 54c v cc e 4.5v, i o e 360 m a 0.4 v 74c v cc e 4.75v, i o e 360 m a 0.4 v output drive (see 54c/74c family characteristics data sheet) (short circuit current) i source output source current v cc e 5v, v in(0) e 0v b 1.75 ma t a e 25 c, v out e 0v i source output source current v cc e 10v, v in(0) e 0v b 8ma t a e 25 c, v out e 0v i sink output sink current v cc e 5v, v in(1) e 5v 1.75 ma t a e 25 c, v out e v cc i sink output sink current v cc e 10v, v in(1) e 10v 8ma t a e 25 c, v out e v cc note 1: ``absolute maximum ratings'' are those values beyond which the safety of the device cannot be guaranteed. except for ``operating temperature range'' they are not meant to imply that the devices should be operated at these limits. the table of ``electrical characteristics'' provides conditions for actual device operation. 2
ac electrical characteristics * t a e 25 c, c l e 50 pf, unless otherwise noted symbol parameter conditions min typ max units t pd propagation delay time to q v cc e 5v 250 400 ns from count up or down v cc e 10v 100 160 ns t pd propagation delay time to q v cc e 5v 120 200 ns borrow from count down v cc e 10v 50 80 ns t pd propagation delay time to v cc e 5v 120 200 ns carry from count up v cc e 10v 50 80 ns t s time prior to load that data v cc e 5v 100 160 ns must be present v cc e 10v 30 50 ns t w minimum clear pulse width v cc e 5v 300 480 ns v cc e 10v 120 190 ns t w minimum load pulse width v cc e 5v 100 160 ns v cc e 10v 40 65 ns t pd0 ,t pd1 propagation delay time to q v cc e 5v 300 480 ns from load v cc e 10v 120 190 ns t w minimum count pulse width v cc e 5v 120 200 ns v cc e 10v 35 80 ns f max maximum count frequency v cc e 5v 2.5 4 mhz v cc e 10v 6 10 mhz t r ,t f count rise and fall time v cc e 5v 15 m s v cc e 10v 5 m s c in input capacitance (note 2) 5 pf c pd power dissipation capacitance (note 3) 100 pf * ac parameters are guaranteed by dc correlated testing. note 1: ``absolute maximum ratings'' are those values beyond which the safety of the device cannot be guaranteed. except for ``operating temperature range'' they are not meant to imply that the devices should be operated at these limits. the table of ``electrical characteristics'' provides conditions for actual device operation. note 2: capacitance is guaranteed by periodic testing. note 3: c pd determines the no load ac power consumption of any cmos device. for complete explanation, see 54c/74c family characteristics, application note an-90. cascading packages tl/f/5901 2 guaranteed noise margin as a function of v cc tl/f/5901 3 3
timing diagrams mm54c192/mm74c192 tl/f/5901 4 note 1: clear ouptuts to zero. note 2: load (preset) to binary thirteen. note 3: count up to fourteen, fifteen, carry, zero, one and two. note 4: count down to one, zero, borrow, fifteen, fourteen, and thirteen. mm54c193/mm74c193 tl/f/5901 5 note 1: clear ouptuts to zero. note 2: load (preset) to bcd seven. note 3: count up to eight, nine, carry, zero, one, and two. note 4: count down to one, zero, borrow, nine, eight, and seven. note a: clear overrides load, data, and count inputs. note b: when counting up, count down input must be high; when counting down, count-up input must be high. 4
schematic diagrams mm54c192 synchronous 4-bit up/down decade counter tl/f/5901 6 mm54c193 synchronous 4-bit up/down binary counter tl/f/5901 7 5
mm54c192/mm74c192 synchronous 4-bit up/down decade counter mm54c193/mm74c193 synchronous 4-bit up/down binary counter physical dimensions inches (millimeters) ceramic dual-in-line package (j) order number mm54c192j, mm74c192j, mm54c193j or mm74c193j ns package number j16a molded dual-in-line package (n) order number mm54c192n, mm74c192n, mm54c193n or mm74c193n ns package number n16e life support policy national's products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of national semiconductor corporation. as used herein: 1. life support devices or systems are devices or 2. a critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. national semiconductor national semiconductor national semiconductor national semiconductor corporation europe hong kong ltd. japan ltd. 1111 west bardin road fax: ( a 49) 0-180-530 85 86 13th floor, straight block, tel: 81-043-299-2309 arlington, tx 76017 email: cnjwge @ tevm2.nsc.com ocean centre, 5 canton rd. fax: 81-043-299-2408 tel: 1(800) 272-9959 deutsch tel: ( a 49) 0-180-530 85 85 tsimshatsui, kowloon fax: 1(800) 737-7018 english tel: ( a 49) 0-180-532 78 32 hong kong fran 3 ais tel: ( a 49) 0-180-532 93 58 tel: (852) 2737-1600 italiano tel: ( a 49) 0-180-534 16 80 fax: (852) 2736-9960 national does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and national reserves the right at any time without notice to change said circuitry and specifications.
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