rai o RA8872 character/graphic tft lcd controller specification version 1.1 february 7, 2013 ra i o technology inc. ? copyright raio technology inc. 2010, 2011, 2012, 2013 rai o technology inc. 1/7 www.raio.com.tw
version 1.1 brief specification character/graphic tft lcd controller RA8872 1. description RA8872 is a tft lcd controller which supports the character and graphic mixed display. it is designed to meet the requirement of middle size tft module up to 320x240 pixels with characters or 2d graphic application. with internal ram, RA8872 can supports 65k color for 320x240 dots tft panel, 4k color for 640x240 display , or 4k color fo r 320x240 dots with 2-layers. the embedded cgrom is capable to display the alpha set of international stan dard iso 8859-1/2/3/4. it includes 256x4 characters and can satisfiies almost english or eurpean language family countries. for graphic usage, RA8872 supports a 2d block transfer engine (bte) that is compatible with 2d bitblt function for processing the mass data transfer function. the geometric speed-up engine provides user an easy way to draw the programmable geometric shape by hardware, like line, square and circle. besides, many powerful functions are combined with RA8872, such as screen ro tation function, scroll function, graphic pattern, 2-layer mixed display and font enlargement function. these functi ons will save user a large of software effort during developement period. RA8872 is a powerful and cheap choice for color applicat ion. to reduce the system cost, RA8872 proivde low cost 8080/6800 mcu i/f, a flexible 4-wires touch panel controller, pwm for adjusting panel back-light and some gpios. with the RA8872 design-in, user can achi eve an easy-to-use, low- cost and high performace system compared with the other solution. 2. feature ? support text/graphic mixed display mode. ? support 8/12/16-bits generic rgb tft panel: 2 layers : up to 320x240 pixels, 4k color 1 layer : up to 320x240 pixels, 65k color. ? color depth tft: 256/4k/65k colors. ? supporting mcu interface: 8080/6800 with 8 data bus width. ? internal ddram size: 230kb ? embedded 10kb character rom with font size 8x16 dots and supporting character set of iso8859-1/2/3/4. ? embedded block transfer engine (bte) with 2d function. ? embedded geometric speed-up engine. ? font enlargement x1, x2, x3, x4 for horizontal or vertical direction. ? screen display rotation 90, 180 and 270 for different panel type. ? support font vertical rotation. ? support block scroll for vertical or horizontal direction. ? text cursor for character writing. ? 32x32 pixel graphic cursor function. ? support 256 user-defined 8x16 characters. ? support 32 user-defined patterns of 8x8 pixels. ? 2 programmable pwm for back-light adjusting or other's application. ? embedded 4-wires touch panel controller. ? 6 sets of programmable gpio (gpio0~5). ? clock source: external x?tal clock input with internal pll. ? sleep mode with low power consumption. ? operation voltage: 3.0v~3.6v ? package: lqfp-100pin. rai o technology inc. 2/7 www.raio.com.tw
version 1.1 brief specification character/graphic tft lcd controller RA8872 3. block diagram mpu i/f block register block 2d-bte engine cgrom scroll engine geometric speed-up engine 4-wires touch panel controller db[0:7] rd# / en wr# / rw# cs# rs c86 wait# int# xi xo rst# xp xn yp yn internal dpram test power control pattern/ cursor pwm gpio adc tcon pdat[0:15] hsync vsync pclk de pwm1 pwm2 gpio[0:5] test[0:2] osc/ pll font engine figure 3-1 : internal block diagram 8bits 8080/6800 mpu RA8872 crystal 4-wires touch panel booster (back-light adj.) tft driver tft panel figure 3-2 : system block diagram rai o technology inc. 3/7 www.raio.com.tw
version 1.1 brief specification character/graphic tft lcd controller RA8872 4. pin definition 4-1 mcu interface pin name i/o pin# pin description db[0:7] io 14, 15, 19~ 24 data bus these are data bus for data transfer between mcu and RA8872. rd# / en i 9 enable/read enable when mcu interface (i/f) is 8080 series, this pin is used as data read (rd#), active low. when mcu i/f is 6800 series, this pin is used as enable (en), active high. wr# / rw# i 10 write/read-write when mcu i/f is 8080 series, this pi n is used as data write (wr#), active low. when mcu i/f is 6800 series, this pin is used as data read/write control (rw#). active high for read and active low for write. cs# i 11 chip select input low active chip select pin. rs i 12 command / data select input the pin is used to select comm and/data cycle. rs = 0, data read/write cycle is selected. rs = 1, status read/command write cycle is selected. in 8080 interface, usually it connects to ?a0? address pin. rs wr# access cycle 0 0 data write 0 1 data read 1 0 cmd write 1 1 status read c86 i 13 mcu interface select 0 : 8080 interface is selected. 1 : 6800 interface is selected. int# o 37 interrupt signal output the interrupt output for mcu to i ndicate the status of RA8872. wait# o 36 wait signal output this is a wait output to indicate the RA8872 is in busy state. the RA8872 can?t access mcu cycle when wait# pin is active. it is active low and could be used for mcu to poll busy status by connecting it to i/o port. rai o technology inc. 4/7 www.raio.com.tw
version 1.1 brief specification character/graphic tft lcd controller RA8872 4-2 lcd panel interface pin name i/o pin# pin description pdat[0:15] o 8 5~100 lcd panel data bus data bus output for tft lcd panel driver ic. this data bus must be connected to the corresponding bus of tft-lcd panel. hsync o 81 hsync pulse when generic tft is selected, the signal is used as hsync. vsync o 82 vsync pulse when generic tft is selected, the signal is used as vsync. pclk o 83 pixel clock when generic tft is selected, the signal is used as pclk. de o 84 data enable when generic tft is selected, the signal is used as de. 4-3 touch panel and pwm interface pin name i/o pin# pin description xp a 8 xp signal for touch panel this pin connects to xp switch signal of 4-wires touch panel. xn a 5 xn signal for touch panel this pin connects to xn switch signal of 4-wires touch panel. yp a 6 yp signal for touch panel touch panel control signal. this pin connects to yp switch signal of 4-wires touch panel. it must be connected a 100k ? pull-up resistor when the touch panel function is enable. yn a 7 yn signal for touch panel touch panel control signal. this pin connects to yn switch signal of 4-wires touch panel. pwm1 pwm2 o 33, 34 pwm output pwm output pins. the duty could be programmed by register setting. gpio[0:5] io 64~66, 69~71 general purpose i/o these signals are used as gpio si gnals; user can program it by register. rai o technology inc. 5/7 www.raio.com.tw
version 1.1 brief specification character/graphic tft lcd controller RA8872 4-4 clock and power interface pin name i/o pin# pin description xi i 28 crystal input pin input pin for internal crystal circuit. it should be connected to external crystal to generate the source of pll circuit. that will generate the system clock for RA8872. xo o 29 crystal output pin output pin for internal crystal circuit. rst# i 38 reset signal input this active-low input performs a hardware reset on the RA8872. it is a schmitt-trigger input for enhanced noise immunity; however, care should be taken to ensure that it is not triggered if the supply voltage is lowered. test[0:2] i 40~42 test mode input for chip test function, should be connected to gnd for normal operation. vr1 a 76 reference voltage input this is a reference voltage input. for normal operation, it only need add a 0.1uf capacitor to ground. vr2 a 74 reference voltage output this is a reference voltage output. for normal operation, it only need add a 0.2uf capacitor to ground. adc_vref a 4 adc reference voltage this pin is the reference voltage input of adc. the reference voltage could be generated by RA8872 or from external circuit. ldo_vdd p 27, 79, ldo vdd 3.3v power source for ldo. the internal ldo will generate the 1.8v power output. ldo_gnd p 25, 78 ldo gnd ground signal for internal ldo. ldo_out p 80 ldo output 1.8v power generated by internal ldo. it must connect bypass capacities to prevent power noise. ldo_cap p 30 ldo capacitor input it must connect 1uf bypass capacities to prevent power noise. core_vdd p 17, 57 core vdd core vdd is 1.8v. the core power input that connects to ldo_out. it must connect 1uf bypass capacities to prevent power noise. adc_vdd p 2 adc vdd adc 3.3v power signals. please connect this signal to 3.3v. rai o technology inc. 6/7 www.raio.com.tw
version 1.1 brief specification character/graphic tft lcd controller ra o technology inc. 7/7 www.raio.com.tw RA8872 pin name i/o pin# pin description adc_gnd p 3 adc gnd adc ground signal. please connect this signal to ground. vdd p 18, 32, 61, 77 io vdd 3.3v io power input. gnd p 1, 16, 31, 35, 50, 51, 59 gnd io cell/core ground signals. 5. package raio tm RA8872l3n 1012 date code (year 2010, 12th week) 30 35 40 45 50 30 35 40 45 50 80 85 95 90 100 80 85 95 90 100 gnd nc nc nc nc nc nc nc test2 test1 test0 nc rst# int# wait# gnd pwm2 pwm1 vdd gnd ldo_cap xo xi ldo_vdd nc nc vr2 nc nc gpio5 gpio4 gpio3 nc nc gpio2 gpio1 gpio0 nc nc vdd nc gnd nc core_vdd nc nc nc nc nc gnd vr1 vdd ldo_gnd ldo_vdd ldo_out hsync vsync pclk de pdat0 pdat1 pdat2 pdat3 pdat4 pdat5 pdat6 pdat7 pdat8 pdat9 pdat10 pdat11 pdat12 pdat13 pdat14 pdat15 gnd adc_vdd adc_gnd adc_vref xn yp yn xp rd# wr# cs# rs c86 db0 db1 gnd core_vdd vdd db2 db3 db4 db5 db6 db7 ldo_gnd 5 10 15 20 25 75 70 65 60 55 i
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