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| iru3047 1 rev. 1.0 09/09/02 www.irf.com typical application description the iru3047 ic combines a dual synchronous buck controller and a linear regulator controller, providing a cost-effective, high performance and flexible solution for multi-output applications. the dual synchronous con- troller can be configured as 2-independent or 2-phase controller. in 2-phase configuration, the iru3047 provides a programmable current sharing which is ideal when the output power exceeds any single input power budget. iru3047 provides a separate adjustable output by driv- ing a switch as a linear regulator. this device features an internal 200khz oscillator, under-voltage lockout for all input supplies, an external programmable soft-start func- tion as well as output under-voltage detection that latches off the device when an output short is detected. dual synchronous controller in 20-pin package with 180 8 out-of-phase operation ldo controller with 40ma drive can be configured as 2-independent or 2-phase pwm controller programmable current sharing in 2-phase configu- ration flexible, same or separate supply operation operation from 4v to 25v input internal 200khz oscillator per phase soft-start controls all outputs fixed frequency voltage mode 500ma peak output drive capability short circuit protection for all outputs power good output package order information features dual synchronous pwm controller with current sharing circuitry and ldo controller applications t a (c) device package 0 to 70 iru3047cw 20-pin plastic soic (w) preliminary data sheet data sheet no. pd94252 figure 1 - typical application of iru3047 configured as 2-phase converter. dual-phase power supply ddr memory source sink vtt application graphic card hard disk drive power supplies requiring multiple outputs 12v 5v v out2 pgood c1 c2 l1 c6 r2 q5 l4 q4 q1 c5 c7 3.3v u1 v out1 r8 c16 l3 c17 r5 r9 r7 c10 r1 r4 c9 r3 c8 c3 c4 c13 d1 d2 c11 pgnd v cl v out3 ldrv1 hdrv1 fb1 vp2 fb2 ldrv2 hdrv2 vch1 vch2 vcc gnd comp2 fb3 comp1 ss pgood v ref iru3047 l2 c12 q3 q2 c14
2 rev. 1.0 09/09/02 iru3047 www.irf.com electrical specifications unless otherwise specified, these specifications apply over vcc=5v, vch1=vch2=v cl =12v and t a =0 to 70c. typical values refer to t a =25c. low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature. absolute maximum ratings vcc supply voltage .................................................. 25v v c h1, v c h2 and v cl supply voltage ........................... 30v (not rated for inductive load) storage temperature range ...................................... -65c to 150c operating junction temperature range ..................... 0c to 125c package information 20-pin plastic soic wb (w) u ja =75 8 c/w vcc comp1 comp2 vch2 hdrv2 ldrv2 fb2 pgnd v cl ldrv1 hdrv1 vch1 v out3 fb3 ss fb1 vp2 pgood v ref gnd 4 3 2 1 7 6 5 18 19 20 top view 11 13 12 14 10 15 9 16 8 17 parameter sym test condition min typ max units reference voltage section fb voltage fb voltage line regulation uvlo section uvlo threshold - vcc uvlo hysteresis - vcc uvlo threshold - vccldo uvlo hysteresis - vccldo uvlo threshold - vch1 uvlo hysteresis - vch1 uvlo threshold - vch2 uvlo hysteresis - vch2 uvlo threshold - fb uvlo hysteresis - fb supply current section vcc dynamic supply current vch1 dynamic supply current vch2 dynamic supply current vcc static supply current vch1 static supply current vch2 static supply current 5 4 rev. 1.0 09/09/02 iru3047 www.irf.com figure 2 - block diagram of the iru3047. pin# pin symbol pin description 9,12 10 11 15 16 17 19 20 ldrv2, ldrv1 pgnd v cl v out3 fb3 ss pgood gnd output driver for the synchronous power mosfet . this pin serves as the separate ground for mosfet?s driver and should be connected to the system?s ground plane. supply voltage for the low side output drivers. driver signal for the ldo?s external transistor. ldo?s feedback pin, connected to a resistor divider to set the output voltage of ldo. soft-start pin. the converter can be shutdown by pulling this pin below 0.5v. power good pin. this pin is a collector output that switches low when any of the outputs are outside of the specified under voltage trip point. ground pin. bias generator ldrv2 two phase oscillator 1.25v 3v ramp1 fb3 0.5v por por gnd hdrv2 vch2 ss comp2 1.25v error amp2 pwm comp2 por v out3 25ua reset dom ldrv1 v cl hdrv1 vch1 fb1 comp1 error amp1 pwm comp1 25k reset dom set1 set2 ramp2 64ua max uvlo vch2 3.5v / 3.3v vch1 3.5v / 3.3v 4.2v / 4.0v fb2 40ma ldo controller pgnd vcc 1.25v 1.25v ss > 2v vp2 v ref pgood fb3 fb2 fb1 pgood fb2 monitor shut down r s q s r q vcc 4 17 18 5 1 2 3 6 16 20 14 13 11 12 7 8 9 19 10 15 2v ss 25k 25k 25k 25k 25k block diagram iru3047 5 rev. 1.0 09/09/02 www.irf.com theory of operation introduction the iru3047 is designed for multi-outputs applications. it includes two synchronous buck controllers and a lin- ear regulator controller. the two synchronous controller operates with fixed frequency voltage mode and can be configured as two independent controller or 2-phase con- troller with current sharing. the timing of the ic is pro- vided through an internal oscillator circuit. these are two out of phase oscillators with 200khz switching frequency. independent mode in this mode the iru3047 provides two independent out- puts with either common or different input voltages. the output voltage of the individual channel is set and con- trolled by the output of the error amplifier, this is the amplified error signal from the sensed output voltage and the reference voltage. this voltage is compared to the ramp signal and generates fixed frequency pulses of vari- able duty-cycle, which drives the two n-channel exter- nal mosfets. current sharing mode in the current sharing mode, the two converter?s outputs tied together and provide one single output (see figure 1). in this mode, one control loop acts as a master and sets the output voltage as a regular voltage mode buck controller and the other control loop acts as a slave and monitors the current information for current sharing. the current sharing is programmable and sets by using two external resistors in output currents? path. the slave's error amplifier, error amplifier 2 (see the block diagram) measures the voltage drops across the current sense resistors, the differential of these signals is amplified and compared with the ramp signal and generate the fixed frequency pulses of variable duty cycle to match the output currents. out of phase operation the iru3047 drives its two output stages 180 o out of phase. in 2-phase configuration, the two inductor ripple currents cancel each other and result to a reduction of the output current ripple and contributes to a smaller output capacitors for the same ripple voltage require- ment. in application with single input voltage, the 2-phase con- figuration reduces the input ripple current. this results in much smaller rms current in the input capacitor and reduction of input capacitor. soft-start the iru3047 has a programmable soft start to control the output voltage rise and limit the current surge at the start-up. to ensure correct start-up, the soft-start se- quence initiates when the vcc, vch1 and vch2 rise above their threshold and generates the power on re- set (por) signal. soft-start function operates by sourc- ing an internal current to charge an external capacitor to about 3v. initially, the soft-start function clamps the e/ a?s output of the pwm converter. as the charging volt- age of the external capacitor ramps up, the pwm sig- nals increase from zero to the point the feedback loop takes control. shutdown the converter can be shutdown by pulling the soft-start pin below 0.5v. this can be easily done by using an external small signal transistor. during shutdown the mosfet drivers and the ldo controller turn off. power good the iru3047 provides a power good signal. this is an open collector output and it is pulled low if the output voltages are not within the specified threshold. this pin can be left floating if not used. short-circuit protection the outputs are protected against the short circuit. the iru3047 protects the circuit for shorted output by sens- ing the output voltages. the iru3047 shuts down the pwm signals and ldo controller, when the output volt- ages drops below the set values. under-voltage lockout the under-voltage lockout circuit assures that the mosfet driver outputs and ldo controller remain in the off state whenever the supply voltages drop below set parameters. normal operation resumes once the supply voltages rise above the set values. 6 rev. 1.0 09/09/02 iru3047 www.irf.com application information design example: the following example is a typical application for iru3047 in current sharing mode. the schematic is figure 12 on page 16. pwm section output voltage programming output voltage is programmed by reference voltage and external voltage divider. the fb1 pin is the inverting input of the error amplifier, which is internally referenced to 1.25v. the divider is ratioed to provide 1.25v at the fb1 pin when the output is at its desired value. the output voltage is defined by using the following equation: when an external resistor divider is connected to the output as shown in figure 3. figure 3 - typical application of the iru3047 for programming the output voltage. equation (1) can be rewritten as: if the high value feedback resistors are used, the input bias current of the fb pin could cause a slight increase in output voltage. the output voltage set point can be more accurate by using precision resistor. soft-start programming the soft-start timing can be programmed by selecting the soft start capacitance value. the start up time of the converter can be calculated by using: where: c ss is the soft-start capacitor ( m f) for a start-up time of 75ms, the soft-start capacitor will be 1 m f. choose a ceramic capacitor at 1 m f. boost supply vc to drive the high-side switch it is necessary to supply a gate voltage at least 4v greater than the bus voltage. this is achieved by using a charge pump configuration as shown in figure 1. the capacitor is charged up to approximately twice the bus voltage. a capacitor in the range of 0.1 m f to 1 m f is generally adequate for most applications. sense resistor selection these resistors will determine the current sharing between two channels. the relationship between the master and slave output currents is expressed by: for an equal current sharing, r sen1 =r sen1 choose r sen1 =r sen2 =5m v input capacitor selection the input filter capacitor should be based on how much ripple the supply can tolerate on the dc input line. the ripple current generated during the on time of control mosfet should be provided by input capacitor. the rms value of this ripple is expressed by: where: d is the duty cycle, simply d=v out /v in. i rms is the rms value of the input capacitor current. i out is the output current for each channel. for v in1 =12v, i out1 =6a and d1=0.208 results to: i rms1 =2.43a and for v in2 =5v, i out2 =6a and d2=0.5 results to: i rms2 =3a r 6 = r 5 3 - 1 v out1 v ref ( ) will result to: v out1 = 2.5v v ref = 1.25v r 5 = 1k r 6 = 1k v in1(master) = 12v v in2(slave) = 5v v out1 = 1.5v i out = 12a d v out = 75mv f s = 200khz fb1 iru3047 v out1 r 5 r 6 v out1 = v ref 3 1+ ---(1) ( ) r 6 r 5 i rms = i out d 3 (1-d) ---(4) r sen1 3 i master = r sen2 3 i slave ---(3) t start = 75 3 css (ms) ---(2) iru3047 7 rev. 1.0 09/09/02 www.irf.com for higher efficiency, a low esr capacitor is recom- mended. for v in1 =12v, choose two poscap from sanyo 16tpb47m (16v, 47 m f, 70m v , 1.4a) for v in2 =5v, choose two 6tpb330m (6.3v, 330 m f, 40m v , 3a). output capacitor selection the criteria to select the output capacitor is normally based on the value of the effective series resistance (esr). in general, the output capacitor must have low enough esr to meet output ripple and load transient requirements, yet have high enough esr to satisfy sta- bility requirements. the esr of the output capacitor is calculated by the following relationship: the sanyo tpc series, poscap capacitor is a good choice. the 6tpb470m 470 m f, 6.3v has an esr 40m v . selecting two of these capacitors in parallel, results to an esr of @ 20m v which achieves our low esr goal. the capacitor value must be high enough to absorb the inductor's ripple current. the larger the value of capaci- tor, the lower will be the output ripple voltage. the resulting output ripple current is smaller then each channel ripple current due to the 180 8 phase shift. these currents cancel each other. the cancellation is not the maximum because of the different duty cycle for each channel. inductor selection the inductor is selected based on output power, operat- ing frequency and efficiency requirements. low induc- tor value causes large ripple current, resulting in the smaller size, but poor efficiency and high output noise. generally, the selection of inductor value can be reduced to desired maximum ripple current in the inductor ( d i); the optimum point is usually found between 20% and 50% ripple of the output current. where: v in = maximum input voltage v out = output voltage d i = inductor ripple current f s = switching frequency d t = turn on time d = duty cycle for the buck converter, the inductor value for desired operating ripple current can be determined using the fol- lowing relation: for d i 1 =30% of i 1 , we get l 3 =5.46 m h for d i 2 =30% of i 2 , we get: l 4 =3.47 m h the coilcraft do5022hc series provides a range of in- ductors in different values and low profile for large cur- rents. for l 3 choose do5022p-602hc (6 m h, 7.5a) for l 4 choose do5022p-472hc (4.7 m h, 8.4a) power mosfet selection the selections criteria to meet power transfer require- ments is based on maximum drain-source voltage (v dss ), gate-source drive voltage (v gs ), maximum output cur- rent, on-resistance r ds(on) and thermal management. the mosfet must have a maximum operating voltage (v dss ) exceeding the maximum input voltage (v in ). the gate drive requirement is almost the same for both mosfets. caution should be taken with devices at very low v gs to prevent undesired turn-on of the complemen- tary mosfet, which results a shoot-through current. the total power dissipation for mosfets includes con- duction and switching losses. for the buck converter the average inductor current is equal to the dc load cur- rent. the conduction loss is defined as: the total conduction loss is defined as: esr [ ---(5) d v o d i o where: d v o = output voltage ripple d i o = output current d v o =100mv and d i o =5a, results to esr=20m v v in - v out = l 3 ; d t = d 3 ; d = 1 f s v out v in d i d t l = (v in - v out ) 3 ---(6) v out v in 3d i 3 f s 2 2 p cond (upper switch) = i load 3 r ds(on) 3 d 3q p cond (lower switch) = i load 3 r ds(on) 3 (1 - d) 3q q = r ds(on) temperature dependency p con(total) =p con (upper switch) q +p con (lower switch) q 8 rev. 1.0 09/09/02 iru3047 www.irf.com the r ds(on) temperature dependency should be consid- ered for the worst case operation. this is typically given in the mosfet data sheet. ensure that the conduction losses and switching losses do not exceed the package ratings or violate the overall thermal budget. choose irf7811a for control mosfet and irf7809a for synchronous mosfet. these devices provide low on-resistance in a compact soic 8-pin package. the mosfets have the following data: the total conduction losses for the master channel is: the total conduction losses for the slave channel is: the control mosfet contributes to the majority of the switching losses in synchronous buck converter. the synchronous mosfet turns on under zero-voltage con- dition, therefore the turn on losses for synchronous mosfet can be neglected. with a linear approxima- tion, the total switching loss can be expressed as: figure 4 - switching time waveforms. from irf7811a data sheet we obtain: these values are taken under a certain condition test. for more detail please refer to the irf7811a and irf7809a data sheets. by using equation (7), we can calculate the switching losses. feedback compensation the control scheme for master and slave channels is based on voltage mode control, but the compensation of these two feedback loops is slightly different. the master channel sets the output voltage and its feed- back loop should take care of double pole introduced by the output filter as a regular voltage mode control loop. the goal is to provide a close loop transfer function with the highest 0db crossing frequency and adequate phase margin. the slave feedback loop acts slightly different and its goal is using the current information for current sharing. the master feedback loop sees the output filter. the out- put lc filter introduces a double pole, -40db/decade gain slope above its corner resonant frequency, and a total phase lag of 180 8 (see figure 5). the resonant frequency of the lc filter expressed as follows: figure 5 shows gain and phase of the lc filter. since we already have 180 8 phase shift just from the output filter, the system risks being unstable. figure 5 - gain and phase of lc filter. p sw(master) = 86.4mw p sw(slave) = 36mw p con(master) = 0.498w p con(slave) = 0.5535w irf7811a v dss = 28v i d = 11.2a @ 90 8 c r ds(on) = 12m v @ v gs = 4.5v irf7809a v dss = 20v i d = 14.2a @ 90 8 c r ds(on) = 8.5m v @ v gs = 4.5v for both: q = 1.5 for 150 8 c (junction temperature) where: v ds(off) = drain to source voltage at off time t r = rise time t f = fall time t = switching period i load = load current p sw = i load ---(7) 3 3 v ds(off) 2 f lc(master) = ---(8) 1 2 p lo 3 co t r + t f t irf7811a t r = 4ns t f = 8ns v ds v gs 10% 90% t d (on) t d (off) t r t f gain f lc 0db phase 0 8 f lc -180 8 frequency frequency -40db/decade iru3047 9 rev. 1.0 09/09/02 www.irf.com the master error amplifier is a differential-input transcon- ductance amplifier. the output is available for dc gain control or ac phase compensation. the e/a can be compensated with or without the use of local feedback. when operated without local feedback the transconductance properties of the e/a become evi- dent and can be used to cancel one of the output filter poles. this will be accomplished with a series rc circuit from comp1 pin to ground as shown in figure 6. the esr zero of the lc filter expressed as follows: figure 6 - compensation network without local feedback and its asymptotic gain plot. the transfer function (ve / v out ) is given by: the (s) indicates that the transfer function varies as a function of frequency. this configuration introduces a gain and zero, expressed by: the gain is determined by the voltage divider and e/a's transconductance gain. first select the desired zero-crossover frequency (fo): use the following equation to calculate r4: where: v in(master) = maximum input voltage v osc = oscillator ramp voltage f o1 = crossover frequency for the master e/a f esr = zero frequency of the output capacitor f lc(master) = resonant frequency of output filter g m = error amplifier transconductance r 5 and r 6 = resistor dividers for output voltage programming this results to r 4 =9.8k v . choose r 4 =10k v to cancel one of the lc filter poles, place the zero be- fore the lc filter resonant frequency pole: using equations (12) and (14) to calculate c 9 , we get: one more capacitor is sometimes added in parallel with c 9 and r 4 . this introduces one more pole which is mainly used to supress the switching noise. the additional pole is given by: f o1 > f esr and f o1 [ (1/5 ~ 1/10) 3 f s for: v in(master) = 12v v osc = 1.25v f o1 = 15khz f esr = 8.4khz f lc(master) = 2.1khz r 5 = r 6 = 1k v g m = 600 m mho f p = 2 p 3 r 4 3 c 9 3 c pole c 9 + c pole 1 c 9 = 10000pf choose c 9 = 10000pf v out v ref r 5 r 6 r 4 c 9 ve e/a1 f z h(s) db frequency gain(db) fb1 comp1 f esr = ---(9) 1 2 p3 esr 3 co h(s) = g m 3 ---(10) ( ) 3 r 5 r 6 + r 5 1 + sr 4 c 9 sc 9 |h(s)| = g m 3 3 r 4 ---(11) f z = ---(12) 1 2 p3 r 4 3 c 9 r 5 r 6 3 r 5 r 4 = ---(13) v osc v in(master) f o1 3 f esr f lc 2 r 5 + r 6 r 5 3 3 3 1 g m f z @ 75%f lc(master) f z @ 0.75 3 ---(14) for: lo = 6 m h co = 940 m f fz = 1.57khz r 4 = 10k v 1 2 p l o 3 c o 10 rev. 1.0 09/09/02 iru3047 www.irf.com the pole sets to one half of switching frequency which results in the capacitor c pole: for a general solution for unconditionally stability for any type of output capacitors, in a wide range of esr values we should implement local feedback with a compensa- tion network. the typically used compensation network for voltage-mode controller is shown in figure 7. figure 7 - compensation network with local feedback and its asymptotic gain plot. in such configuration, the transfer function is given by: the error amplifier gain is independent of the transcon- ductance under the following condition: by replacing z in and z f according to figure 7, the trans- former function can be expressed as: v e 1 - g m z f 1 + g m z in v out = as known, transconductance amplifier has high imped- ance (current source) output, therefore, consider should be taken when loading the e/a output. it may exceed its source/sink output current capability, so that the ampli- fier will not be able to swing its output voltage over the necessary range. the compensation network has three poles and two ze- ros and they are expressed as follows: cross over frequency: the stability requirement will be satisfied by placing the poles and zeros of the compensation network according to following design rules. the consideration has been taken to satisfy condition (15) regarding transconduc- tance error amplifier. 1) select the crossover frequency: 2) select r 7 , so that r 7 >> 3) place first zero before lc?s resonant frequency pole. 2 g m fo < f esr and fo [ (1/10 ~ 1/6) 3 f s f z1 @ 75% f lc c 11 = 1 2 p 3 f z1 3 r 7 c pole = @ p 3 r 4 3 f s - 1 c 9 1 1 p 3 r 4 3 f s for f p << f s 2 f p1 = 0 1 2 p3 c 10 3 (r 6 + r 8 ) f z2 = @ 1 2 p3 c 10 3 r 6 f z1 = 1 2 p3 r 7 3 c 11 f p3 = @ 1 2 p3 r 7 3 f p2 = 1 2 p3 r 8 3 c 10 1 2 p3 r 7 3 c 12 c 12 3 c 11 c 12 +c 11 ( ) v out v ref r 5 r 6 r 8 c 10 c 12 c 11 r 7 ve f z 1 f z 2 f p 2 f p 3 z f z in frequency gain(db) h(s) db fb1 e/a1 comp1 g m z f >> 1 and g m z in >>1 ---(15) h(s)= sr 6 (c 12 +c 11 ) 1+sr 7 3 (1+sr 8 c 10 ) 1 (1+sr 7 c 11 ) 3 [1+sc 10 (r 6 +r 8 )] 3 c 12 c 11 c 12 +c 11 [ ( )] where: v in = maximum input voltage v osc = oscillator ramp voltage lo = output inductor co = total output capacitors f o1 = r 7 3 c 10 3 3 v in v osc 1 2 p3 lo 3 co ---(16) iru3047 11 rev. 1.0 09/09/02 www.irf.com f p3 = f s 2 4) place third pole at the half of the switching frequency. c 12 > 50pf if not, change r 7 selection. 5) place r 7 in equation (16) and calculate c 10 : 6) place second pole at esr zero. f p2 = f esr check if r 8 > if r 8 is too small, increase r 7 and start from step 2. 7) place second zero around the resonant frequency. f z2 = f lc 8) use equation (1) to calculate r 5 : these design rules will give a crossover frequency ap- proximately one-tenth of the switching frequency. the higher the band width, the potentially faster the load tran- sient speed. the gain margin will be large enough to provide high dc-regulation accuracy (typically -5db to - 12db). the phase margin should be greater than 45 8 for overall stability. the slave error amplifier is a differential-input transcon- ductance amplifier as well, the main goal for the slave feed back loop is to control the inductor current to match the masters inductor current as well provides highest bandwidth and adequate phase margin for overall stabil- ity. 1 g m the transfer function of power stage is expressed by: as shown the transfer function is a function of inductor current. the transfer function for the compensation network is given by equation (18), when using a series rc circuit as shown in figure 8. figure 8 - the pi compensation network for slave channel. the loop gain function is: select a zero crossover frequency (f o2 ) one-tenth of the switching frequency: f o2 = 20khz where: v in = input voltage v out = output voltage l 2 = output inductor v osc = oscillator peak voltage c 12 = 1 2 p 3 r 7 3 f p3 c 10 [ 3 2 p 3 lo 3 f o 3 co r 7 v osc v in r 8 = 1 2 p 3 c10 3 f p2 r 6 = - r 8 1 2 p 3 c10 3 f z2 r 5 = 3 r 6 v ref v out - v ref l 2 l 1 c 2 r 2 r s2 r s1 ve i l2 i l1 e/a2 fb2 comp2 vp2 f o2 = f s 10 g(s) = = ---(17) i l2 (s) ve(s) v in - v out sl 2 3 v osc d(s)= = g m 3 3 ---(18) ( ) ( ) ve(s) r s2 3 i l2 (s) r s1 r s2 1 + sc 2 r 2 sc 2 h(s)=[g(s) 3 d(s) 3 r s2 ] 3 h(s)=r s2 3 ( ) r s1 r s2 g m 3 v in -v out sl 2 3 v osc ( ) 1+sr 2 c 2 sc 2 ( ) 3 12 rev. 1.0 09/09/02 iru3047 www.irf.com from (19), r 2 can be express as: set the zero of compensator to be half of f lc(slave) , the compensator capacitor, c 2 , can be calculated as: using equations (20) and (21) we get the following val- ues for r 2 and c 2 . c 2 = 1023pf; choose c 2 = 1000pf r 2 = 123k; choose r 2 = 130k layout consideration the layout is very important when designing high fre- quency switching converters. layout will affect noise pickup and can cause a good design to perform with less than expected results. start to place the power components, make all the con- nection in the top layer with wide, copper filled areas. the inductor, output capacitor and the mosfet should be close to each other as possible. this helps to reduce the emi radiated by the power traces due to the high switching currents through them. place input capacitor directly to the drain of the high-side mosfet, to reduce the esr replace the single input capacitor with two par- allel units. the feedback part of the system should be kept away from the inductor and other noise sources, and be placed close to the ic. in multilayer pcb use one layer as power ground plane and have a control cir- cuit ground (analog ground), to which all signals are ref- erenced. the goal is to localize the high current path to a separate loop that does not interfere with the more sensitive analog control function. these two grounds must be connected together on the pc board layout at a single point. ---(19) h(fo)=g m 3 r s1 3 r 2 3 =1 v in - v out 2 p3 fo 3 l 2 3 v osc r 2 = 3 2 p3 f o2 3 l 2 3 v osc v in(slave) - v out ---(20) 1 g m 3 r s1 f lc(slave) = 1 2 p l 2 3 c out fz = f lc(slave) 2 c 2 = ---(21) 1 2 p 3 r 2 3 fz iru3047 13 rev. 1.0 09/09/02 www.irf.com typical application dual input: 5v and 12v to 1.5v @ 16a 3.3v to 2.5v @ 2a figure 9 - typical application of iru3047, configured as a 2-phase converter in current sharing mode. 12v 5v 2.5v @ 2a pgood c13 47uf q3 3.3v u1 c29 0.1uf c34 c9 1uf pgnd v cl v out3 ldrv1 hdrv1 fb1 vp2 fb2 ldrv2 hdrv2 vch1 vch2 vcc gnd comp2 fb3 comp1 ss pgood v ref iru3047 q2 irf7457 q1 irf7460 r6 10 v r7 1k r10 1k c18 47uf r21 16.5k 6.8nf c24 r16 29.4k 2200pf c30 1uf q5 irf7457 q4 irf7460 c2 33uf c1 33uf c5 330uf c31 330uf c6 1uf c4 47uf c32 47uf l1 1uh l2 1uh c3 0.1uf d1 bat54s c23 1uf l4 3.3uh l3 2.2uh r17 r3 5m v 5m v r8 200 r12 1k c10,c11,c12 3x 150uf c15 1uf c19,c20,c21 3x 150uf 1.5v @ 16a c8 1uf r19 4.7 v c26 470pf c14 470pf r5 4.7 v irlr2703 14 rev. 1.0 09/09/02 iru3047 www.irf.com figure 10 - typical application for iru3047 configured as two independent controllers. typical application 12v to 1.8v @ 8a 5v to 2.5v @ 8a 3.3v to 2.5v @ 2a 12v 5v 2.5v @ 2a pgood c1 33uf l1 c6 47uf r2 1k l4 q1 c5 1uf c7 47uf 3.3v u1 1.8v @ 8a r8 1k c16 2x 150uf l3 c17 2x 150uf r7 442 v c10 0.1uf r1 r4 c9 2200uf r3 c8 2200pf c3 1uf c4 1uf d1 d2 pgnd v cl v out3 ldrv1 hdrv1 fb1 vp2 ldrv2 hdrv2 vch1 vch2 vcc gnd comp2 fb3 comp1 ss pgood v ref iru3047 c14 2x 47uf 1uh c11 0.1uf 4.7uh 3.9uh 2.5v @ 8a r9 1k c12 2x 150uf r5 1k fb2 1k 19k 22k irlr2703 q2 irf7460 q3 irf7457 c13 1uf q5 irf7457 q4 irf7457 l2 1uh c2 33uf iru3047 15 rev. 1.0 09/09/02 www.irf.com typical application figure 11 - typical application for iru3047 configured for ddr memory application. 12v 5v 1.8v @ 2a pgood c1 33uf l1 c6 47uf r2 1k l3 q1 c5 1uf c7 47uf 3.3v u1 v ddq = 2.5v @ 4a r8 1k c16 330uf l2 c17 2x 150uf r7 442 v c10 0.1uf r1 r4 c9 5600pf r3 c8 3900pf c3 1uf c4 1uf pgnd v cl v out3 ldrv1 hdrv1 fb1 vp2 ldrv2 hdrv2 vch1 vch2 vcc gnd comp2 fb3 comp1 ss pgood v ref iru3047 c14 150uf 1uh 5.6uh 4.7uh v tt = 1.25v @ 4a c12 330uf fb2 442 10k 16.2k irlr2703 1/2 q2 irf7313 c13 1uf 1/2 q3 irf7313 1/2 q3 irf7313 r9 1k r5 1k v ddq 1/2 q2 irf7313 1/2 d1 bat54a 1/2 d1 bat54a 16 rev. 1.0 09/09/02 iru3047 www.irf.com demo-board application dual input: 5v and 12v to 1.5v @ 12a figure 12 - typical application for iru3047 configured as 2-phase converter in current sharing mode. 2x 470uf poscap 2x 330uf poscap v ref vp2 fb2 vcc comp1 comp2 vch2 hdrv2 ldrv2 pgnd gnd pgood fb1 ss / en fb3 v out 3 vch1 hdrv1 ldrv1 v cl 2x 47uf, 16v poscap d1 q4 irf7811a r8 2.15 r2 2.15 c2 0.1uf l3 6uh r13 r12 1k 2.5v@12a pwr ok 0v c4 1uf c7 0.22uf r1 1k l4 4.7uf c18 c17 0v q1 irf7809a r4 c3 0.1uf 2.15 r3 2.15 q2 irf7811a d2 c11 c12 5v r14 5m v iru3047 r103 10k r105 130k c100 10000pf c101 1000pf 1/2 d100 1/2 d100 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 l2, 1uh c24 1uf c21 1uf c23 1uf c22 33uf 16v tant c104 1uf c103 1uf 5m v q3 irf7809a c9 c10 12v l1, 1uh c20 33uf 16v tant c14 470pf r16 4.7 v c13 470pf r15 4.7 v iru3047 17 rev. 1.0 09/09/02 www.irf.com ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information data and specifications subject to change without notice. 02/01 ref desig description value qty part# manuf web site (www.) 2 2 1 2 1 2 1 1 2 6 1 1 2 2 2 2 2 1 2 4 2 2 1 1 q1, q3 q2, q4 u1 d1, d2 d100 * l1, l2 l3 l4 c2,c3 c4,21,23,24, 103,104 c7 c101 c9,c10 c11,c12 c13,c14 c17,c18 c20,c22 c100 r1,r12 r2,3,4,8 r13,r14 r15,r16 r103 r105 mosfet mosfet controller diode diode inductor inductor inductor cap, ceramic cap, ceramic cap, ceramic cap, ceramic cap, poscap cap, poscap cap, poscap cap, poscap cap, tantulum cap, ceramic resistor resistor resistor resistor resistor resistor irf7809a irf7811a iru3047 bat54s bat54a or 1n4148 ds1608c-102 d05022p-602hc d05022p-472hc ecj-3yb1e105k ecj-2vf1c105z ecj-3yb1e225k ecj-2vb1h102k 16tpb47m 6tpb330m ecj-2vc1h471j 6tpb470m ec-t1cd336r erj-m1wsf5mou ir ir ir ir ir any coilcraft coilcraft coilcraft panasonic panasonic panasonic panasonic sanyo sanyo panasonic sanyo panasonic 20v, 8.5m v , 14a 28v, 12m v , 11a synchronous pwm fast switching fast switching 1 m h, 3a 6 m h, 7.5a 4.7 m h, 8.4a 0.1 m f, y5v, 25v 1 m f, y5v, 16v 0.22 m f, y5v, 25v 1000pf, x7r, 50v 47 m f, 16v 330 m f, 6.3v 470pf, x7r, 50v 470 m f, 6v, 40m v 33 m f, 16v 10000pf 1k, 1% 2.15 v 5m v , 1w, 1% 4.7 v 10k 130k irf.com coilcraft.com maco.panasonic.co.jp sanyo.com/industrial maco.panasonic.co.jp sanyo.com/industrial maco.panasonic.co.jp demo-board application application parts list * use this diode for (source/sink, no load) applications when the inductor current goes negative and for the fast load transient from full output load to no load. 18 rev. 1.0 09/09/02 iru3047 www.irf.com (w) soic package 20-pin surface mount, wide body note: all measurements are in millimeters. min 12.598 1.018 0.33 7.40 2.032 0.10 0.229 10.008 0 8 0.406 0.63 2.337 max 12.979 1.524 0.508 7.60 2.64 0.30 0.32 10.654 8 8 1.270 0.89 2.642 0.66 ref 20-pin symbol a b c d e f g i j k l r t i k detail-a detail-a r pin no. 1 0.51 6 0.020 x 45 8 t a b d l j c f g h e iru3047 19 rev. 1.0 09/09/02 www.irf.com pkg desig w package description soic, wide body parts per tube 38 parts per reel 1000 package shipment method pin count 20 t & r orientation fig a ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information data and specifications subject to change without notice. 02/01 feed direction figure a 1 1 1 |
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