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integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 1 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer g eneral d escription the ics8305 is a low skew, 1-to-4, differential/ lvcmos-to-lvcmos/lvttl fanout buffer and a member of the hiperclocks? family of high performance clock solutions from ics. the ics8305 has selectable clock inputs that accept either differential or single ended input levels. the clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/ deassertion of the clock enable pin. outputs are forced low when the clock is disabled. a separate output enable pin controls whether the outputs are in the active or high imped- ance state. guaranteed output and part-to-part skew characteristics make the ics8305 ideal for those applications demanding well defined performance and repeatability. hiperclocks? ic s b lock d iagram p in a ssignment gnd oe v dd clk_en clk nclk clk_sel lvcmos_clk 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 q0 v ddo q1 gnd q2 v ddo q3 gnd ics8305 16-lead tssop 4.4mm x 3.0mm x 0.92mm package body g package top view f eatures ? four lvcmos/lvttl outputs ? selectable differential or lvcmos/lvttl clock inputs ? clk, nclk pair can accept the following differential input levels: lvpecl, lvds, lvhstl, hcsl, sstl ? lvcmos_clk supports the following input types: lvcmos, lvttl ? maximum output frequency: 350mhz ? output skew: 35ps (maximum) ? part-to-part skew: 700ps (maximum) ? additive phase jitter, rms: 0.04ps (typical) ? power supply modes: core/output 3.3v/3.3v 3.3v/2.5v 3.3v/1.8v 3.3v/1.5v ? 0c to 70c ambient operating temperature ? available in both standard and lead-free rohs complaint packages lvcmos_clk clk nclk clk_sel q0 q1 q2 q3 0 1 clk_en oe d q le 0 1
integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 2 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer t able 1. p in d escriptions t able 2. p in c haracteristics l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a m s t i n u c n i e c n a t i c a p a c t u p n i 4f p r p u l l u p r o t s i s e r p u l l u p t u p n i 1 5k r n w o d l l u p r o t s i s e r n w o d l l u p t u p n i 1 5k c d p e c n a t i c a p a c n o i t a p i s s i d r e w o p ) t u p t u o r e p ( 1 1f p r t u o e c n a d e p m i t u p t u o 7 r e b m u ne m a ne p y tn o i t p i r c s e d 3 1 , 9 , 1d n gr e w o p. d n u o r g y l p p u s r e w o p 2e ot u p n ip u l l u p . e t a t s e c n a d e p m i h g i h n i e r a s t u p t u o , w o l n e h w . e l b a n e t u p t u o . s l e v e l e c a f r e t n i l t t v l / s o m c v l . e v i t c a e r a s t u p t u o , h g i h n e h w 3v d d r e w o p. n i p y l p p u s r e w o p 4n e _ k l ct u p n ip u l l u p e r a s k c o l c t u p t u o e h t , w o l n e h w . e l b a n e k c o l c g n i z i n o r h c n y s . d e l b a n e e r a s k c o l c t u p t u o , h g i h n e h w . d e l b a s i d . s l e v e l e c a f r e t n i l t t v l / s o m c v l 5k l ct u p n in w o d l l u p. t u p n i k c o l c l a i t n e r e f f i d g n i t r e v n i - n o n 6k l c nt u p n i / p u l l u p n w o d l l u p v . t u p n i k c o l c l a i t n e r e f f i d g n i t r e v n i d d . g n i t a o l f t f e l n e h w t l u a f e d 2 / 7l e s _ k l ct u p n ip u l l u p . s t u p n i k l c n , k l c s t c e l e s , h g i h n e h w . t u p n i t c e l e s k c o l c . t u p n i k l c _ s o m c v l s t c e l e s , w o l n e h w . s l e v e l e c a f r e t n i l t t v l / s o m c v l 8k l c _ s o m c v lt u p n in w o d l l u p. t u p n i k c o l c l t t v l / s o m c v l 6 1 , 4 1 , 2 1 , 0 10 q , 1 q , 2 q , 3 qt u p t u o. s l e v e l e c a f r e t n i l t t v l / s o m c v l . s t u p t u o k c o l c 5 1 , 1 1v o d d r e w o p. s n i p y l p p u s t u p t u o : e t o n p u l l u p d n a n w o d l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t r e f e r
integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 3 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer t able 3a. c ontrol i nput f unction t able s t u p n is t u p t u o e on e _ k l cl e s _ k l ce c r u o s d e t c e l e s3 q : 0 q 10 0 k l c _ s o m c v lw o l ; d e l b a s i d 10 1 k l c n , k l cw o l ; d e l b a s i d 11 0 k l c _ s o m c v ld e l b a n e 11 1 k l c n , k l cd e l b a n e 0x x z i h e g d e k c o l c t u p n i g n i l l a f d n a g n i s i r a g n i w o l l o f d e l b a n e r o d e l b a s i d e r a s t u p t u o k c o l c e h t , s e h c t i w s n e _ k l c r e t f a : e t o n . 1 e r u g i f n i n w o h s s a f igure 1. clk_en t iming d iagram enabled disabled nclk clk, lvcmos_clk clk_en q0:q3
integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 4 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer t able 4a. p ower s upply dc c haracteristics , v dd = v ddo = 3.3v5%, t a = 0c to 70c t able 4b. lvcmos/lvttl dc c haracteristics , v dd = v ddo = 3.3v5%, t a = 0c to 70c a bsolute m aximum r atings supply voltage, v dd 4.6v inputs, v i -0.5v to v dd + 0.5 v outputs, v o -0.5v to v dd + 0.5v package thermal impedance, ja 89c/w (0 lfpm) storage temperature, t stg -65c to 150c note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional operation of product at these conditions or any conditions be- yond those listed in the dc characteristics or ac character- istics is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d e g a t l o v y l p p u s r e w o p5 3 1 . 33 . 35 6 4 . 3v v o d d e g a t l o v y l p p u s t u p t u o 5 3 1 . 33 . 35 6 4 . 3v 5 7 3 . 25 . 25 2 6 . 2v 5 6 . 18 . 15 9 . 1v 5 2 4 . 15 . 15 7 5 . 1v i d d t n e r r u c y l p p u s r e w o p 1 2a m i o d d t n e r r u c y l p p u s t u p t u o 5a m l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i t u p n i e g a t l o v h g i h e o , l e s _ k l c , n e _ k l c2v d d 3 . 0 +v k l c _ s o m c v l2v d d 3 . 0 +v v l i t u p n i e g a t l o v w o l e o , l e s _ k l c , n e _ k l c3 . 0 -8 . 0v k l c _ s o m c v l3 . 0 -3 . 1v i h i t u p n i t n e r r u c h g i h e o , l e s _ k l c , n e _ k l cv d d v = n i v 5 6 4 . 3 =5a k l c _ s o m c v lv d d v = n i v 5 6 4 . 3 =0 5 1a i l i t u p n i t n e r r u c w o l e o , l e s _ k l c , n e _ k l cv d d v , v 5 6 4 . 3 = n i v 0 =0 5 1 -a k l c _ s o m c v lv d d v , v 5 6 4 . 3 = n i v 0 =5 -a v h o 1 e t o n ; e g a t l o v h g i h t u p t u o v o d d % 5 v 3 . 3 =6 . 2v v o d d % 5 v 5 . 2 =8 . 1v v o d d v 5 1 . 0 v 8 . 1 =5 . 1v v o d d % 5 v 5 . 1 =v o d d 3 . 0 -v v l o 1 e t o n ; e g a t l o v w o l t u p t u o v o d d % 5 v 3 . 3 =5 . 0v v o d d % 5 v 5 . 2 =5 . 0v v o d d v 5 1 . 0 v 8 . 1 =4 . 0v v o d d % 5 v 5 . 1 =5 3 . 0v i l z o w o l t n e r r u c e t a t s i r t t u p t u o 5 -a i h z o h g i h t n e r r u c e t a t s i r t t u p t u o 5a 0 5 h t i w d e t a n i m r e t s t u p t u o : 1 e t o n v o t o d d . t i u c r i c t s e t d a o l t u p t u o , n o i t a m r o f n i t n e m e r u s a e m r e t e m a r a p e e s . 2 /
integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 5 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer t able 4c. d ifferential dc c haracteristics , v dd = v ddo = 3.3v5%, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u i h i t n e r r u c h g i h t u p n i k l c nv n i v = d d v 5 6 4 . 3 =0 5 1a k l cv n i v = d d v 5 6 4 . 3 =0 5 1a i l i t n e r r u c w o l t u p n i k l c nv n i v , v 0 = d d v 5 6 4 . 3 =0 5 1 -a k l cv n i v , v 0 = d d v 5 6 4 . 3 =5 -a v p p e g a t l o v t u p n i k a e p - o t - k a e p 5 1 . 03 . 1v v r m c ; e g a t l o v t u p n i e d o m n o m m o c 2 , 1 e t o n 5 . 0 + d n gv d d 5 8 . 0 -v s n o i t a c i l p p a d e d n e e l g n i s r o f : 1 e t o n , v s i k l c n , k l c r o f e g a t l o v t u p n i m u m i x a m e h t d d . v 3 . 0 + v s a d e n i f e d s i e g a t l o v e d o m n o m m o c : 2 e t o n h i . t able 5a. ac c haracteristics , v dd = v ddo = 3.3v 5%, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f x a m y c n e u q e r f t u p t u o 0 5 3z h m p t h l , y a l e d n o i t a g a p o r p h g i h o t w o l ; k l c _ s o m c v l a 1 e t o n ; k l c n , k l c b 1 e t o n 5 7 . 15 7 . 2s n t ) o ( k s6 , 2 e t o n ; w e k s t u p t u oe g d e g n i s i r e h t n o d e r u s a e m5 3s p t ) p p ( k s6 , 3 e t o n ; w e k s t r a p - o t - t r a p 0 0 7s p t t i j ; s m r , r e t t i j e s a h p e v i t i d d a r e f f u b , n o i t c e s r e t t i j e s a h p e v i t i d d a o t r e f e r 5 e t o n 4 0 . 0s p t r t / f 4 e t o n ; e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 0 10 0 7s p c d oe l c y c y t u d t u p t u o k l c n / k l c = f e r5 45 5% , k l c _ s o m c v l = f e r ? z h m 0 0 3 5 45 5% t n e 4 e t o n ; e m i t e l b a n e t u p t u o 5s n t s i d 4 e t o n ; e m i t e l b a s i d t u p t u o 5s n t a d e r u s a e m s r e t e m a r a p l l a? z h m 0 5 3. e s i w r e h t o d e t o n s s e l n u v e h t m o r f d e r u s a e m : a 1 e t o n d d v o t t u p n i e h t f o 2 / o d d . t u p t u o e h t f o 2 / v o t t n i o p g n i s s o r c t u p n i l a i t n e r e f f i d e h t m o r f d e r u s a e m : b 1 e t o n o d d . t u p t u o e h t f o 2 / . s n o i t i d n o c d a o l l a u q e h t i w d n a e g a t l o v y l p p u s e m a s e h t t a s t u p t u o n e e w t e b w e k s s a d e n i f e d : 2 e t o n v t a d e r u s a e m o d d . 2 / d n a s e g a t l o v y l p p u s e m a s e h t a g n i t a r e p o s e c i v e d t n e r e f f i d n o s t u p t u o n e e w t e b w e k s s a d e n i f e d : 3 e t o n v t a d e r u s a e m s i t u p t u o e h t , e c i v e d h c a e n o t u p n i f o e p y t e m a s e h t g n i s u . s n o i t i d n o c d a o l l a u q e h t i w o d d . 2 / . n o i t c u d o r p n i d e t s e t t o n . n o i t a z i r e t c a r a h c y b d e e t n a r a u g e r a s r e t e m a r a p e s e h t : 4 e t o n . k c o l c t u p n i e n o y l n o g n i v i r d : 5 e t o n . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 6 e t o n
integrated circuit s y s t e m s , i n c . 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 6 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer t able 5c. ac c haracteristics , v dd = 3.3v 5%, v ddo = 1.8v -0.15v, t a = 0c to 70c t able 5b. ac c haracteristics , v dd = 3.3v 5%, v ddo = 2.5v 5%, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f x a m y c n e u q e r f t u p t u o 0 5 3z h m p t h l , y a l e d n o i t a g a p o r p h g i h o t w o l ; k l c _ s o m c v l a 1 e t o n ; k l c n , k l c b 1 e t o n 8 . 19 . 2s n t ) o ( k s6 , 2 e t o n ; w e k s t u p t u oe g d e g n i s i r e h t n o d e r u s a e m5 3s p t ) p p ( k s6 , 3 e t o n ; w e k s t r a p - o t - t r a p 0 0 8s p t i j t ; s m r , r e t t i j e s a h p e v i t i d d a r e f f u b , n o i t c e s r e t t i j e s a h p e v i t i d d a o t r e f e r 5 e t o n 4 0 . 0s p t r t / f 4 e t o n ; e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 0 10 0 7s p c d oe l c y c y t u d t u p t u o k l c n / k l c = f e r4 46 5% , k l c _ s o m c v l = f e r ? z h m 0 0 3 4 46 5% t n e 4 e t o n ; e m i t e l b a n e t u p t u o 5s n t s i d 4 e t o n ; e m i t e l b a s i d t u p t u o 5s n t a d e r u s a e m s r e t e m a r a p l l a? z h m 0 5 3. e s i w r e h t o d e t o n s s e l n u v e h t m o r f d e r u s a e m : a 1 e t o n d d v o t t u p n i e h t f o 2 / o d d . t u p t u o e h t f o 2 / v o t t n i o p g n i s s o r c t u p n i l a i t n e r e f f i d e h t m o r f d e r u s a e m : b 1 e t o n o d d . t u p t u o e h t f o 2 / v t a d e r u s a e m . s n o i t i d n o c d a o l l a u q e h t i w d n a e g a t l o v y l p p u s e m a s e h t t a s t u p t u o n e e w t e b w e k s s a d e n i f e d : 2 e t o n o d d . 2 / d n a s e g a t l o v y l p p u s e m a s e h t a g n i t a r e p o s e c i v e d t n e r e f f i d n o s t u p t u o n e e w t e b w e k s s a d e n i f e d : 3 e t o n v t a d e r u s a e m s i t u p t u o e h t , e c i v e d h c a e n o t u p n i f o e p y t e m a s e h t g n i s u . s n o i t i d n o c d a o l l a u q e h t i w o d d . 2 / . n o i t c u d o r p n i d e t s e t t o n . n o i t a z i r e t c a r a h c y b d e e t n a r a u g e r a s r e t e m a r a p e s e h t : 4 e t o n . k c o l c t u p n i e n o y l n o g n i v i r d : 5 e t o n . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 6 e t o n l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f x a m y c n e u q e r f t u p t u o 0 5 3z h m p t h l , y a l e d n o i t a g a p o r p h g i h o t w o l ; k l c _ s o m c v l a 1 e t o n ; k l c n , k l c b 1 e t o n 5 9 . 15 6 . 3s n t ) o ( k s6 , 2 e t o n ; w e k s t u p t u oe g d e g n i s i r e h t n o d e r u s a e m5 3s p t ) p p ( k s6 , 3 e t o n ; w e k s t r a p - o t - t r a p 0 0 9s p t i j t ; s m r , r e t t i j e s a h p e v i t i d d a r e f f u b , n o i t c e s r e t t i j e s a h p e v i t i d d a o t r e f e r 5 e t o n 4 0 . 0s p t r t / f 4 e t o n ; e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 0 10 0 7s p c d oe l c y c y t u d t u p t u o k l c n / k l c = f e r4 46 5% , k l c _ s o m c v l = f e r ? z h m 0 0 3 4 46 5% t n e 4 e t o n ; e m i t e l b a n e t u p t u o 5s n t s i d 4 e t o n ; e m i t e l b a s i d t u p t u o 5s n . b 5 e l b a t n i s e t o n e e s
integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 7 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer t able 5d. ac c haracteristics , v dd = 3.3v 5%, v ddo = 1.5v 5%, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f x a m y c n e u q e r f t u p t u o 0 5 3z h m p t h l , y a l e d n o i t a g a p o r p h g i h o t w o l ; k l c _ s o m c v l a 1 e t o n ; k l c n , k l c b 1 e t o n 24s n t ) o ( k s6 , 2 e t o n ; w e k s t u p t u oe g d e g n i s i r e h t n o d e r u s a e m5 3s p t ) p p ( k s6 , 3 e t o n ; w e k s t r a p - o t - t r a p 1s n t i j t ; s m r , r e t t i j e s a h p e v i t i d d a r e f f u b , n o i t c e s r e t t i j e s a h p e v i t i d d a o t r e f e r 5 e t o n 4 0 . 0s p t r t / f 4 e t o n ; e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 0 20 0 9s p c d oe l c y c y t u d t u p t u o ? z h m 6 6 15 45 5% z h m 6 6 1 > ?2 48 5% t n e 4 e t o n ; e m i t e l b a n e t u p t u o 5s n t s i d 4 e t o n ; e m i t e l b a s i d t u p t u o 5s n . b 5 e l b a t n i s e t o n e e s
integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 8 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer a dditive p hase j itter input/output additive phase jitter at 155.52mhz = 0.04ps typical 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 100 1k 10k 100k 1m 10m 100m the spectral purity in a band at a specific offset from the funda- mental compared to the power of the fundamental is called the dbc phase noise. this value is normally expressed using a phase noise plot and is most often the specified plot in many applications. phase noise is defined as the ratio of the noise power present in a 1hz band at a specified offset from the fun- damental frequency to the power value of the fundamental. this ratio is expressed in decibels (dbm) or a ratio of the power in as with most timing specifications, phase noise measurements have issues. the primary issue relates to the limitations of the equipment. often the noise floor of the equipment is higher than the noise floor of the device. this is illustrated above. the de- the 1hz band to the power in the fundamental. when the re- quired offset is specified, the phase noise is called a dbc value, which simply means dbm at a specified offset from the funda- mental. by investigating jitter in the frequency domain, we get a better understanding of its effects on the desired application over the entire time record of the signal. it is mathematically possible to calculate an expected bit error rate given a phase noise plot. vice meets the noise floor of what is shown, but can actually be lower. the phase noise is dependant on the input source and measurement equipment. o ffset f rom c arrier f requency (h z ) ssb p hase n oise dbc/h z
integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 9 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer p arameter m easurement i nformation o utput s kew t sk(o) v ddo 2 v ddo 2 qx qy 3.3v c ore /1.5v o utput l oad ac t est c ircuit d ifferential i nput l evel 3.3v c ore /3.3v o utput l oad ac t est c ircuit scope qx lvcmos v cmr cross points v pp gnd clk nclk v dd -1.65v5% 1.65v5% 3.3v c ore /2.5v o utput l oad ac t est c ircuit 3.3v c ore /1.8v o utput l oad ac t est c ircuit -1.25v5% 1.25v5% scope qx lvcmos -0.9v0.075v 0.9v0.075v v dd v ddo 2.4v0.09v scope qx lvcmos v dd v ddo 2.05v5% v dd , v ddo gnd gnd gnd scope qx lvcmos v dd v ddo gnd -0.75v5% 0.75v5% 2.55v5%
integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 10 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer p art - to -p art s kew o utput r ise /f all t ime clock outputs 20% 80% 80% 20% t r t f nclk clk q0:q3 t pd v ddo 2 ? ? v dd 2 p ropagation d elay pulse width t period t pw t period odc = v ddo 2 q0:q3 lvcmos_clk o utput d uty c ycle /p ulse w idth /p eriod t sk(pp) v ddo 2 v ddo 2 qx qy part 1 part 2
integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 11 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer a pplication i nformation f igure 2. s ingle e nded s ignal d riving d ifferential i nput figure 2 shows how the differential input can be wired to accept single ended levels. the reference voltage v_ref = v dd /2 is generated by the bias resistors r1, r2 and c1. this bias circuit should be located as close as possible to the input pin. the ratio w iring the d ifferential i nput to a ccept s ingle e nded l evels of r1 and r2 might need to be adjusted to position the v_ref in the center of the input voltage swing. for example, if the input clock swing is only 2.5v and v dd = 3.3v, v_ref should be 1.25v and r2/r1 = 0.609. v_ref r1 1k c1 0.1u r2 1k single ended clock input clk nclk vdd i nputs : clk i nput : for applications not requiring the use of a clock input, it can be left floating. though not required, but for additional protection, a 1k resistor can be tied from the clk input to ground. clk/nclk i nput : for applications not requiring the use of the differential input, both clk and nclk can be left floating. though not required, but for additional protection, a 1k resistor can be tied from clk to ground. lvcmos c ontrol p ins : all control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. a 1k resistor can be used. r ecommendations for u nused i nput and o utput p ins o utputs : lvcmos o utput : all unused lvcmos output can be left floating. we recommend that there is no trace attached.
integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 12 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer f igure 3c. h i p er c lock s clk/nclk i nput d riven by 3.3v lvpecl d river f igure 3b. h i p er c lock s clk/nclk i nput d riven by 3.3v lvpecl d river f igure 3d. h i p er c lock s clk/nclk i nput d riven by 3.3v lvds d river 3.3v r1 50 r3 50 zo = 50 ohm lvpecl zo = 50 ohm hiperclocks clk nclk 3.3v input r2 50 zo = 50 ohm input hiperclocks clk nclk 3.3v r3 125 r2 84 zo = 50 ohm 3.3v r4 125 lvpecl r1 84 3.3v d ifferential c lock i nput i nterface the clk /nclk accepts lvds, lvpecl, lvhstl, sstl, hcsl and other differential signals. both v swing and v oh must meet the v pp and v cmr input requirements. figures 3a to 3e show inter- face examples for the hiperclocks clk/nclk input driven by the most common driver types. the input interfaces suggested f igure 3a. h i p er c lock s clk/nclk i nput d riven by ics h i p er c lock s lvhstl d river here are examples only. please consult with the vendor of the driver component to confirm the driver termination requirements. for example in figure 3a, the input termination applies for ics hiperclocks lvhstl drivers. if you are using an lvhstl driver from another vendor, use their termination recommendation. 1.8v r2 50 input lvhstl driver ics hiperclocks r1 50 lvhstl 3.3v zo = 50 ohm zo = 50 ohm hiperclocks clk nclk f igure 3e. h i p er c lock s clk/nclk i nput d riven by 3.3v lvpecl d river with ac c ouple zo = 50 ohm r3 125 hiperclocks clk nclk 3.3v r5 100 - 200 3.3v r2 84 3.3v r6 100 - 200 input r5,r6 locate near the driver pin. zo = 50 ohm r1 84 r4 125 c2 lvpecl c1 zo = 50 ohm r1 100 3.3v lvds_driv er zo = 50 ohm receiv er clk nclk 3.3v
integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 13 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer lvcmos receiv er r1 43 vdd r5 1k lvcmos receiv er vdd=3.3v vdd r4 1k zo = 50 (u1,11) ro ~ 7 ohm 3,.3v lvcmos (u1,15) (u1,3) vdd r3 43 r2 43 c2 0.1u u1 ics8305 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 gnd oe vdd clk_en clk nclk clk_sel lvcmos_clk gnd q3 vddo q2 gnd q1 vddo q0 zo = 50 vdd zo = 50 c1 0.1u r6 1k c3 0.1u s chematic e xample this application note provides general design guide using ics8305 lvcmos buffer. figure 3 shows a schematic example of the ics8305 lvcmos clock buffer. in this example, the input f igure 4. e xample ics8305 lvcmos c lock o utput b uffer s chematic is driven by an lvcmos driver. clk_en is set at logic low to select lvcmos_clk input.
integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 14 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer r eliability i nformation t ransistor c ount the transistor count for ics8305 is: 459 t able 6. ja vs . a ir f low t able for 16 l ead tssop ja by velocity (linear feet per minute) 0 200 500 single-layer pcb, jedec standard test boards 137.1c/w 118.2c/w 106.8c/w multi-layer pcb, jedec standard test boards 89.0c/w 81.8c/w 78.1c/w note: most modern pcb designs use multi-layered boards. the data in the second row pertains to most designs.
integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 15 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer p ackage o utline - g s uffix for 16 l ead tssop t able 7. p ackage d imensions reference document: jedec publication 95, mo-153 l o b m y s s r e t e m i l l i m m u m i n i mm u m i x a m n6 1 a- -0 2 . 1 1 a5 0 . 05 1 . 0 2 a0 8 . 05 0 . 1 b9 1 . 00 3 . 0 c9 0 . 00 2 . 0 d0 9 . 40 1 . 5 ec i s a b 0 4 . 6 1 e0 3 . 40 5 . 4 ec i s a b 5 6 . 0 l5 4 . 05 7 . 0 0 8 a a a- -0 1 . 0
integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 16 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer t able 8. o rdering i nformation while the information presented herein has been checked for both accuracy and reliability, integrated circuit systems, incorpor ated (ics) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patent s, or licenses are implied. this product is intended for use in normal commercial applications. any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ics. ics reserves the right to change any circuitry or specifications without notice. ics does not authorize or warrant any ics product for use in life support devices or critical medical instruments. the aforementioned trademark, hiperclocks is a trademark of integrated circuit systems, inc. or its subsidiaries in the united states and/or other countries. r e b m u n r e d r o / t r a pg n i k r a me g a k c a pg n i g a k c a p g n i p p i h se r u t a r e p m e t g a 5 0 3 8 s c ig a 5 0 3 8 s c ip o s s t d a e l 6 1e b u tc 0 7 o t c 0 t g a 5 0 3 8 s c ig a 5 0 3 8 s c ip o s s t d a e l 6 1l e e r & e p a t 0 0 5 2c 0 7 o t c 0 f l g a 5 0 3 8 s c id b tp o s s t " e e r f - d a e l " d a e l 6 1e b u tc 0 7 o t c 0 t f l g a 5 0 3 8 s c id b tp o s s t " e e r f - d a e l " d a e l 6 1l e e r & e p a t 0 0 5 2c 0 7 o t c 0 . t n a i l p m o c s h o r e r a d n a n o i t a r u g i f n o c e e r f - b p e h t e r a r e b m u n t r a p e h t o t x i f f u s " f l " n a h t i w d e r e d r o e r a t a h t s t r a p : e t o n
integrated circuit systems, inc. 8305ag www.icst.com/products/hiperclocks.html rev. c november 17, 2005 17 ics8305 l ow s kew , 1- to -4, m ultiplexed d ifferential / lvcmos- to -lvcmos/lvttl f anout b uffer t e e h s y r o t s i h n o i s i v e r v e re l b a te g a pe g n a h c f o n o i t p i r c s e de t a d a8 t4 1 m o r f o p y t r e b m u n r e d r o / t r a p d e t c e r r o c - e l b a t n o i t a m r o f n i g n i r e d r o . t g a 5 0 3 8 s c i o t t g a 5 0 3 8 8 s c i 4 0 / 0 2 / 1 b c 5 t - a 5 t6 & 5 7 . s e l b a t s c i t s i r e t c a r a h c c a o t r e t t i j e s a h p e v i t i d d a d e d d a . n o i t c e s r e t t i j e s a h p e v i t i d d a d e d d a 4 0 / 6 2 / 2 b1 t2 . n o i t p i r c s e d n e _ k l c d e t c e r r o c - e l b a t n o i t p i r c s e d n i p 4 0 / 6 / 2 1 c a 4 t b 4 t d 5 t 8 t 1 4 4 7 0 1 1 1 6 1 d n a t e l l u b e d o m y l p p u s o t t u p t u o v 5 . 1 d e d d a - n o i t c e s s e r u t a e f . t e l t t u b e e r f - d a e l d e d d a v d e d d a - e l b a t s c i t s i r e t c a r a h c c d y l p p u s r e w o p o d d . v 5 . 1 v d e d d a - e l b a t s c i t s i r e t c a r a h c c d s o m c v l h o v / l o . v 5 . 1 . e l b a t s c i t s i r e t c a r a h c c a v 5 . 1 / v 3 . 3 d e d d a . g n i w a r d t i u c r i c t s e t c a d a o l t u p t u o v 5 . 1 / v 3 . 3 d e d d a d e d d a . s n i p t u p t u o d n a t u p n i d e s u n u r o f s n o i t a d n e m m o c e r . r e b m u n t r a p e e r f - d a e l d e d d a 5 0 / 7 1 / 1 1

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