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r03ds0030ej0400 rev.4.00 page 1 of 13 apr 15, 2011 the mark shows major revised points. the revised points can be easily searched by copying an "" in the pdf file and specifying it in the "find what:" field. preliminary data sheet pd120nxx series three-terminal low-dropout positive-voltage regulator (output current: 0.3 a) description the pd120nxx series provides low-voltage output regulators wi th the output current capacit ance of 0.3 a. the output voltage varies according to the product (1.5 v, 1.8 v, 2.5 v, or 3.3 v). the circuit current is low due to the cmos structure, so the power consumption in the ics can be reduced. moreover, sinc e ics are mounted in the small package of the pd120nxx series, this contributes to the miniaturization of the application set. features ? output current: 0.3 a ? on-chip overcurrent protection circuit ? on-chip thermal protection circuit ? small circuit operation current: 60 a typ. applications digital tv, audio, hdd, dvd, etc. pin configurations (marking side) sc-62 gnd gnd output input 3 2 1 sc-74a gnd n.c. gnd output input 123 54 block diagram input output gnd overcurrent protection circuit thermal protection circuit error amp. reference voltage circuit r03ds0030ej0400 rev.4.00 apr 15, 2011
pd120nxx series chapter title r03ds0030ej0400 rev.4.00 page 2 of 13 apr 15, 2011 ordering information part number package output voltage marking pd120n15ta sc-74a 1.5 v k71 pd120n15t1b sc-62 1.5 v 7d pd120n18ta sc-74a 1.8 v k72 pd120n18t1b sc-62 1.8 v 7e pd120n25ta sc-74a 2.5 v k73 pd120n25t1b sc-62 2.5 v 7f pd120n33ta sc-74a .3.3 v k74 pd120n33t1b sc-62 3.3 v 7g remark -e1 or -e2 is suffixed to the end of the part number of taping products, and -a, -at, - ay or -az to that of pb- free products. see the table below for details. part number note1 package package type pd120nxxta-a note2 sc-74a ? unit pd120nxxta-at note2 sc-74a ? unit pd120nxxta-e1-a note2 sc-74a ? 8 mm wide embossed taping ? pin 1 on take-up side ? 3000 pcs/reel (max.) pd120nxxta-e1-at note2 sc-74a ? 8 mm wide embossed taping ? pin 1 on take-up side ? 3000 pcs/reel (max.) pd120nxxta-e2-a note2 sc-74a ? 8 mm wide embossed taping ? pin 1 on draw-out side ? 3000 pcs/reel (max.) pd120nxxta-e2-at note2 sc-74a ? 8 mm wide embossed taping ? pin 1 on draw-out side ? 3000 pcs/reel (max.) pd120nxxt1b-ay note3 sc-62 ? unit pd120nxxt1b-az note3 sc-62 ? unit pd120nxxt1b-e1-ay note3 sc-62 ? 12 mm wide embossed taping ? pin 1 on take-up side ? 1000 pcs/reel (max.) pd120nxxt1b-e1-az note3 sc-62 ? 12 mm wide embossed taping ? pin 1 on take-up side ? 1000 pcs/reel (max.) pd120nxxt1b-e2-ay note3 sc-62 ? 12 mm wide embossed taping ? pin 1 on draw-out side ? 1000 pcs/reel (max.) pd120nxxt1b-e2-az note3 sc-62 ? 12 mm wide embossed taping ? pin 1 on draw-out side ? 1000 pcs/reel (max.) notes 1. xx stands for symbols that indicate the output voltage. 2. pb-free (this product does not contain pb in external electrode and other parts.) 3. pb-free (this product does not contain pb in external electrode.)
pd120nxx series chapter title r03ds0030ej0400 rev.4.00 page 3 of 13 apr 15, 2011 absolute maximum ratings (t a = 25c, unless otherwise specified.) rating parameter symbol pd120nxxta pd120nxxt1b unit input voltage v in ? 0.3 to +6 v power dissipation note1 p t 180/510 note2 400/2000 note3 mw operating ambient temperature t a ?40 to +85 c operating junction temperature t j ?40 to +150 c storage temperature t stg ?55 to +150 c thermal resistance (junction to ambient) r th(j-a) 695/245 note2 315/62.5 note3 c/w note 1. internally limited. when the operatin g junction temperature rises over 150 c, the internal circuit shuts down the output voltage. 2. mounted on ceramic substrate of 75 mm 2 x 0.7 mm 3. mounted on ceramic substrate of 16 cm 2 x 0.7 mm caution product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. that is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. typical connection d 2 d 1 c in c out input output pd120nxx c in : 0.1 f or higher. set this value according to the length of the line between the regulator and input pin. be sure to connect c in to prevent parasitic oscillation. if using a laminated ceramic capacitor, it is necessary to ensure that c in is 0.1 f or higher for the voltage and temperature range to be used. c out : 10 f or higher. be sure to connect c out to prevent oscillation and improve excessive load regulation. place c in and c out as close as possible to the ic pins (within 2 cm). be sure to use the capacitor of 10 f or higher of capacity values and 1 to 8 of equivalent series resistance under an operating condition. d 1 : if the output pin has a higher volta ge than the input pin, connect a diode. d 2 : if the output pin has a lower voltage than the gnd pin, connect a schottky barrier diode. caution make sure that no voltage is applied to the output pin from external.
pd120nxx series chapter title r03ds0030ej0400 rev.4.00 page 4 of 13 apr 15, 2011 recommended operating conditions parameter symbol type number min. typ. max. unit pd120n15 3.0 5.5 v pd120n18 3.2 5.5 v pd120n25 4.5 5.5 v input voltage v in pd120n33 4.5 5.5 v output current i o all 0 0.3 a operating ambient temperature t a all ? 40 + 85 c operating junction temperature t j all ? 40 + 125 c caution use of conditions other th an the above-listed recommended opera ting conditions is not a problem as long as the absolute maximum rati ngs are not exceeded. however, sin ce the use of such conditions diminishes the margin of safety, careful evaluation is required befo re such conditions are used. moreover, using the max. value fo r all the recommended operating c onditions is not guaranteed to be safe. electrical characteristics ? pd120n15 (t j = 25 c, v in = 5.0 v, i o = 0.15 a, c in = 0.1 f, c out = 10 f, unless otherwise specified.) parameter symbol conditions min. typ. max. unit v o1 1.47 1.5 1.53 v output voltage v o2 3.0 v v in 5.5 v, 0 a i o 0.3 a 1.455 ? 1.545 v line regulation reg in 3.0 v v in 5.5 v ? 1 30 mv load regulation reg l 0 a i o 0.3 a ? 2 30 mv quiescent current i bias i o = 0 a ? 60 120 a quiescent current change i bias 3.0 v v in 5.5 v ? ? 25 a output noise voltage v n 10 hz f 100 khz ? 100 ? v r.m.s. ripple rejection r?r f = 1 khz, 3.0 v v in 5.5 v ? 63 ? db i o = 0.15 a ? 0.6 0.9 v dropout voltage v dif i o = 0.3 a ? 1.0 ? v short circuit current i oshort v in = 5 v ? 0.2 ? a peak output current i opeak v in = 5 v 0.3 ? ? a temperature coefficient of output voltage v o / t i o = 0 a, 0 c t j 125 c ? ? 0.03 ? mv/ c pd120n18 (t j = 25 c, v in = 5.0 v, i o = 0.15 a, c in = 0.1 f, c out = 10 f, unless otherwise specified.) parameter symbol conditions min. typ. max. unit v o1 1.764 1.8 1.836 v output voltage v o2 3.2 v v in 5.5 v, 0 a i o 0.3 a 1.746 ? 1.854 v line regulation reg in 3.2 v v in 5.5 v ? 1 30 mv load regulation reg l 0 a i o 0.3 a ? 2 30 mv quiescent current i bias i o = 0 a ? 60 120 a quiescent current change i bias 3.2 v v in 5.5 v ? ? 25 a output noise voltage v n 10 hz f 100 khz ? 120 ? v r.m.s. ripple rejection r?r f = 1 khz, 3.2 v v in 5.5 v ? 63 ? db dropout voltage v dif i o = 0.15 a ? 0.4 0.65 v short circuit current i oshort v in = 5 v ? 0.2 ? a peak output current i opeak v in = 5 v 0.3 ? ? a temperature coefficient of output voltage v o / t i o = 0 a, 0 c t j 125 c ? ? 0.06 ? mv/ c
pd120nxx series chapter title r03ds0030ej0400 rev.4.00 page 5 of 13 apr 15, 2011 pd120n25 (t j = 25 c, v in = 5.0 v, i o = 0.15 a, c in = 0.1 f, c out = 10 f, unless otherwise specified.) parameter symbol conditions min. typ. max. unit v o1 2.45 2.5 2.55 v output voltage v o2 4.5 v v in 5.5 v, 0 a i o 0.3 a 2.425 ? 2.575 v line regulation reg in 4.5 v v in 5.5 v ? 1 30 mv load regulation reg l 0 a i o 0.3 a ? 2 30 mv quiescent current i bias i o = 0 a ? 60 120 a quiescent current change i bias 4.5 v v in 5.5 v ? ? 25 a output noise voltage v n 10 hz f 100 khz ? 170 ? v r.m.s. ripple rejection r?r f = 1 khz, 4.5 v v in 5.5 v ? 60 ? db dropout voltage v dif i o = 0.15 a ? 0.3 0.7 v short circuit current i oshort v in = 5 v ? 0.2 ? a peak output current i opeak v in = 5 v 0.3 ? ? a temperature coefficient of output voltage v o / t i o = 0 a, 0 c t j 125 c ? ? 0.07 ? mv/ c pd120n33 (t j = 25 c, v in = 5.0 v, i o = 0.15 a, c in = 0.1 f, c out = 10 f, unless otherwise specified.) parameter symbol conditions min. typ. max. unit v o1 3.234 3.3 3.366 v output voltage v o2 4.5 v v in 5.5 v, 0 a i o 0.3 a 3.201 ? 3.399 v line regulation reg in 4.5 v v in 5.5 v ? 1 30 mv load regulation reg l 0 a i o 0.3 a ? 2 30 mv quiescent current i bias i o = 0 a ? 60 120 a quiescent current change i bias 4.5 v v in 5.5 v ? ? 25 a output noise voltage v n 10 hz f 100 khz ? 220 ? v r.m.s. ripple rejection r?r f = 1 khz, 4.5 v v in 5.5 v ? 60 ? db dropout voltage v dif i o = 0.15 a ? 0.2 0.6 v short circuit current i oshort v in = 5 v ? 0.2 ? a peak output current i opeak v in = 5 v 0.3 ? ? a temperature coefficient of output voltage v o / t i o = 0 a, 0 c t j 125 c ? ? 0.06 ? mv/ c
pd120nxx series chapter title r03ds0030ej0400 rev.4.00 page 6 of 13 apr 15, 2011 typical characteristics p d vs. t a ( pd120nxxta) p d vs. t a ( pd120nxxt1b) p d - internal power consumption - w 0 0.1 0.2 0.3 0.4 0.5 0.6 0 20406080100 (mounted on ceramic substrate of 75 mm 2 x 0.7 (without heatsink) 245c/w 695c/w t a - operating ambient temperature - c p d - internal power consumption - w 0 0.5 1 1.5 2 2.5 0 20406080100 62.5c/w 315c/w (mounted on ceramic substrate of 16 cm 2 x 0.7 (without heatsink) t a - operating ambient temperature - c v o vs. t j v o vs. t j v o - output voltage variation - mv -10 -5 0 5 10 -50 0 50 100 150 i o = 0.15 a pd120n18 pd120n15 t j - operating junction temperature - c v o - output voltage variation - mv -10 -5 0 5 10 -50 0 50 100 150 i o = 0.15 a pd120n25 pd120n33 t j - operating junction temperature - c v o vs. v in ( pd120n15) v o vs. v in ( pd120n18) v o - output voltage - v 0 0 1 2 12345 6 t j = 25?c i o = 5 ma i o = 150 ma i o = 300 ma v in - input voltage - v v o - output voltage - v 0 0 1 2 12 345 6 t j = 25?c i o = 5 ma i o = 150 ma i o = 300 ma v in - input voltage - v
pd120nxx series chapter title r03ds0030ej0400 rev.4.00 page 7 of 13 apr 15, 2011 v o vs. v in ( pd120n25) v o vs. v in ( pd120n33) v o - output voltage - v 0 0 1 2 3 4 12 3 45 6 t j = 25?c i o = 5 ma i o = 150 ma i o = 300 ma v in - input voltage - v v o - output voltage - v 0 0 1 2 3 5 4 123456 t j = 25?c i o = 5 ma i o = 150 ma i o = 300 ma v in - input voltage - v i bias (i bias(s) ) vs. v in ( pd120n15) i bias (i bias(s) ) vs. v in ( pd120n18) i bias - quiescent current - a 0 0 200 400 600 800 1000 1234 5 6 t j = 25?c i o = 300 ma i o = 150 ma i o = 5 ma v in - input voltage - v i bias - quiescent current - a 0 0 200 400 600 800 1000 123456 t j = 25?c i o = 300 ma i o = 150 ma i o = 5 ma v in - input voltage - v i bias (i bias(s) ) vs. v in ( pd120n25) i bias (i bias(s) ) vs. v in ( pd120n33) i bias - quiescent current - a 0 0 200 400 600 800 1000 123456 t j = 25?c i o = 300 ma i o = 150 ma i o = 5 ma v in - input voltage - v i bias - quiescent current - a 0 0 200 400 600 800 1000 1234 56 t j = 25?c i o = 300 ma i o = 150 ma i o = 5 ma v in - input voltage - v
pd120nxx series chapter title r03ds0030ej0400 rev.4.00 page 8 of 13 apr 15, 2011 v dif vs. t j i opeak vs. v dif ( pd120n15) v dif - dropout voltage - v 0 0.2 0.4 0.6 0.8 1 -25 0 25 50 75 100 125 150 i o = 0.15 a pd120n15 pd120n25 pd120n18 pd120n33 t j - operating junction temperature - c i opeak - peak output current - a 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 012345 t j = 0c t j = 25c t j = 125c v dif - dropout voltage - v i opeak vs. v dif ( pd120n18) i opeak vs. v dif ( pd120n25) i opeak - peak output current - a 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 012345 t j = 0c t j = 25c t j = 125c v dif - dropout voltage - v i opeak - peak output current - a 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 01234 t j = 0c t j = 25c t j = 125c v dif - dropout voltage - v i opeak vs. v dif ( pd120n33) r?r vs. f i opeak - peak output current - a 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0123 t j = 0c t j = 25c t j = 125c v dif - dropout voltage - v r?r - ripple rejection - db 0 10 20 30 40 50 60 70 80 10 100 1000 10000 100000 t j = 25c i o = 0.15 a pd120n25 pd120n15 f - frequency - hz
pd120nxx series chapter title r03ds0030ej0400 rev.4.00 page 9 of 13 apr 15, 2011 r?r vs. f v dif vs. i o r?r - ripple rejection - db 0 10 20 30 40 50 60 70 80 10 100 1000 10000 100000 t j = 25c i o = 0.15 a pd120n33 pd120n18 f - frequency - hz v dif - dropout voltage - v 0 0.2 0.4 0.6 0.8 1 0 0.05 0.1 0.15 0.2 0.25 0.3 pd120n15 pd120n18 pd120n25 pd120n33 i o - output current - a v o vs. i o ( pd120n15) v o vs. i o ( pd120n18) v o - output voltage - v 0 0 1 2 3 200 400 600 800 i o - output current - a v o - output voltage - v 0 0 1 2 3 200 400 600 800 i o - output current - a v o vs. i o ( pd120n25) v o vs. i o ( pd120n33) v o - output voltage - v 0 0 1 2 3 4 200 400 600 800 i o - output current - a v o - output voltage - v 0 0 1 2 3 4 5 200 400 600 800 i o - output current - a
pd120nxx series chapter title r03ds0030ej0400 rev.4.00 page 10 of 13 apr 15, 2011 package drawings (unit: mm) sc-74a 5 pin plastic mini mold b a c 0.95 (t.p.) 2.9 0.2 0.3 s5ta-95-15a item millimeters b r k m l detail of lead end j c d f n d 0.32 + 0.05 ? 0.02 e f 1.4 max. 0.05 0.05 g 1.1 + 0.2 ? 0.1 h 2.8 0.2 i 1.5 + 0.2 ? 0.1 j 0.65 + 0.1 ? 0.15 k 0.16 + 0.1 ? 0.06 m n r5 5 s m s g e a h i l 0.4 0.2 0.19 0.1
pd120nxx series chapter title r03ds0030ej0400 rev.4.00 page 11 of 13 apr 15, 2011 sc-62 1.6 0.2 1.5 0.1 0.8 min. 2.5 0.1 4.0 0.25 3.0 typ. 1.5 typ. 4.5 0.1 0 .41 +0.03 ?0.05 0 .47 0.06 0 .42 0.06 0 .42 0.06
pd120nxx series chapter title r03ds0030ej0400 rev.4.00 page 12 of 13 apr 15, 2011 recommended soldering conditions the pd120nxx series should be soldered and mounted under the following recommended conditions. for soldering methods and conditions other than thos e recommended below, contact a renesas electronics sales representative. for technical in formation, see the following website. semiconductor device mount manual (http ://www.renesas.com/pr od/package/manual/) surface mount device pd120n15ta-a, pd120n18ta-a, pd120n25ta-a, pd120n33ta-a: sc-74a note1 pd120n15ta-at, pd120n18ta-at, pd120n25ta-at, pd120n33ta-at: sc-74a note1 pd120n15t1b-ay, pd120n18t1b-ay, pd120n25t1b-ay, pd120n33t1b-ay: sc-62 note2 pd120n15t1b-az, pd120n18t1b-az, pd120n25t1b-az, pd120n33t1b-az: sc-62 note2 process conditions symbol infrared ray reflow peak temperature: 260 c or below (package surface temperature), reflow time: 60 seconds or less (at 220c or higher), maximum number of reflows pr ocesses: 3 times or less. ir60-00-3 partial heating method pin temperature: 350c or below, heat time: 3 seconds or less (per each side of the device). p350 notes 1. pb-free (this product does not contain pb in external electrode and other parts.) 2. pb-free (this product does not contain pb in external electrode.) caution do not use different soldering met hods together (except for partial heating). remark flux: rosin-based flux with low chlorine content (chlorine 0.2 wt% or below) is recommended. reference documents user?s manual usage of three term inal regulators document no.g12702e note information voltage regulator of smd document no.g11872e note semiconductor package mount manual http://www.renesas.com/ prod/package/index.html note published by the former nec electronics corporation.
pd120nxx series chapter title r03ds0030ej0400 rev.4.00 page 13 of 13 apr 15, 2011 notes for cmos devices (1) voltage application waveform at input pin: waveform distortion due to input noise or a reflected wave may cause malfunction. if the input of the cm os device stays in the area between vil (max) and vih (min) due to noise, etc., the device may malfunction. ta ke care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between vil (max) and vih (min). (2) handling of unused input pins: unconnected cm os device inputs can be cause of malfunction. if an input pin is unconnected, it is possible that an inte rnal input level may be generated due to noise, etc., causing malfunction. cmos devices behave differently th an bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using pull-up or pull-down circuitry. each unused pin should be connected to vdd or gnd via a resist or if there is a possibility that it will be an output pin. all handling related to unused pins must be judged separately for each device and according to related specifications governing the device. (3) precaution against esd: a str ong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately de grade the device operation. steps mu st be taken to stop generation of static electricity as much as possible, and quickly di ssipate it when it has occurred. environmental control must be adequate. when it is dry, a humidifier should be used. it is recommended to avoid using insulators that easily build up static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work benches and floors should be grounded. the operator shoul d be grounded using a wrist strap. semiconductor devices must not be touched with bare hands. simila r precautions need to be taken for pw boards with mounted semiconductor devices. (4) status before initialization: power-on does not nec essarily define the initial status of a mos device. immediately after the power source is turned on, devic es with reset functions have not yet been initialized. hence, power-on does not gu arantee output pin levels, i/o settings or c ontents of registers. a device is not initialized until the reset signal is received. a re set operation must be executed immediately after power-on for devices with reset functions. (5) power on/off sequence: in the case of a device that uses different power supplies for the internal operation and external interface, as a rule, switch on t he external power supply after switching on the internal power supply. when switching the powe r supply off, as a rule, switch off the external power supply and then the internal power supply. use of the reverse powe r on/off sequences may result in the application of an overvoltage to the internal elements of the device, causing malfunction and degradation of internal elements due to the passage of an abnormal current. the correct power on/off sequence must be judged separately for each device and according to related specifications governing the device. (6) input of signal during power off state : do not input signals or an i/o pull-up power supply while the device is not powered. the current injection that results from input of such a signal or i/o pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. input of signals dur ing the power off state must be judged separately for each device and according to related specifications governing the device.
all trademarks and registered trademarks are t he property of their respective owners. c - 1 revision history pd120nxx series data sheet description rev. date page summary ? jun 2007 ? previous no. : s17145ej3v0ds00 4.00 apr 15, 2011 throughout addition of pb-free products (-at, -ay) pp.4, 5 modification of absolute maximum ratings output noise voltage 10 khz f 100 khz -> 10 hz f 100 khz
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(note 2) "renesas electronics product(s)" means any product developed or manufactured by or for renesas electronics. http://www.renesas.com refer to "http://www.renesas.com/" for the latest and detailed information. renesas electronics america inc. 2880 scott boulevard santa clara, ca 95050-2554, u.s.a. tel: +1-408-588-6000, fax: +1-408-588-6130 renesas electronics canada limited 1101 nicholson road, newmarket, ontario l3y 9c3, canada tel: +1-905-898-5441, fax: +1-905-898-3220 renesas electronics europe limited dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, u.k tel: +44-1628-585-100, fax: +44-1628-585-900 renesas electronics europe gmbh arcadiastrasse 10, 40472 dsseldorf, germany tel: +49-211-65030, fax: +49-211-6503-1327 renesas electronics (china) co., ltd. 7th floor, quantum plaza, no.27 zhichunlu haidian district, beijing 100083, p.r.china tel: +86-10-8235-1155, fax: +86-10-8235-7679 renesas electronics (shanghai) co., ltd. unit 204, 205, azia center, no.1233 lujiazui ring rd., pudong district, shanghai 200120, china tel: +86-21-5877-1818, fax: +86-21-6887-7858 / -7898 renesas electronics hong kong limited unit 1601-1613, 16/f., tower 2, grand century place, 193 prince edward road west, mongkok, kowloon, hong kong tel: +852-2886-9318, fax: +852 2886-9022/9044 renesas electronics taiwan co., ltd. 7f, no. 363 fu shing north road taipei, taiwan tel: +886-2-8175-9600, fax: +886 2-8175-9670 renesas electronics singapore pte. ltd. 1 harbourfront avenue, #06-10, keppel bay tower, singapore 098632 tel: +65-6213-0200, fax: +65-6278-8001 renesas electronics malaysia sdn.bhd. unit 906, block b, menara amcorp, amcorp trade centre, no. 18, jln persiaran barat, 46050 petaling jaya, selangor darul ehsan, malaysia tel: +60-3-7955-9390, fax: +60-3-7955-9510 renesas electronics korea co., ltd. 11f., samik lavied' or bldg., 720-2 yeoksam-dong, kangnam-ku, seoul 135-080, korea tel: +82-2-558-3737, fax: +82-2-558-5141 sales offices ? 2011 renesas electronics corporation. all rights reserved. colophon 1.0

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