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  tqm8 29007 0.6 - 1.0 ghz ?w digital variable gain amplifier data sheet: rev f 0 4 /2 7 /12 - 1 of 12 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? applications 28- pin 6x6mm leadless smt package ? 3g / 4g wireless infrastruct ure ? cdma, wcdma, lte ? repeaters ? ism infrastructure product features functional block diagram ? 0. 6 - 1.0 ghz frequency range ? 3 1.5 db maximum gain at 0.9 ghz ? 31.5 db gain range in 0.5 db steps ? + 40 dbm output ip3 ? + 2 4 .3 dbm output p1db ? 2.1 db noise fi gure at max. gain state ? fully internally matched module ? integrated blocking capacitors, bias inductors ? 3 - wire spi control programming le data clk nc gnd rfin gnd 1 2 3 4 5 6 7 21 20 19 18 17 16 15 gnd gnd gnd gnd gnd rfout gnd 28 27 26 25 24 23 22 8 9 10 11 12 13 14 vcc_amp1/ gnd gnd gnd gnd gnd vcc_amp2 dsa amp1 backside paddle - gnd s p i dc biasing matching dc biasing amp2 general description pin configuration the tqm8 29007 is a digital variable gain amplifier (dvga) featuring hig h linearity performance in a fully integrated module . the amplifier module features the integration of a low noise amplifier gain block, a digital - step attenuator (dsa), along with a high linearity ?w amplifier. the module has the added features of integ rating all matching components with bias chokes and blocking capacitors. the internal dsa offers 0.5 db step, 6 - bit, and 31.5 db range and is controlled with a serial periphery interface (spi tm ). the tqm8 29007 feat ures va riable gain from 0 to 3 1. 5 db at 0.9 ghz, has + 40 dbm output ip3, and + 2 4 .3 dbm p1db. the amplifier also has a very low 2.1 db noise figure (at maximum gain) allowing it to be an ideal d vga for both receiver and transmitter applications. the amplifier operates from a single +5v supply and is available in a compact 28 - pin 6x6 mm leadless smt package. the TQM829007 is pin compatible with the tqm879006 (1.4 - 2.7ghz, 0.25w dvga) and tqm8 7900 8 (1.5 - 2.7 ghz, 0.5 w dvga). this allows one to size the right type of device for specific system level requirements as well as making the dvga family ideal for applications where a common pcb layout is used for different frequency bands. ordering i nfo rmation part no. description tqm8 29007 0. 6 - 1.0 ghz digital variable gain amp tqm8 29007 - pcb fully assembled eval uation b o a rd includes usb control board (evh) standard t/r size = 25 00 pieces on a 13 reel . pin # symbol 1 l e 2 data 3 clk 4, 22 nc 6 rfin 8 vcc_amp1 14 vcc_amp2 16 rfout 28 vcc_spi all other pins gnd
tqm8 29007 0.6 - 1.0 ghz ?w digital variable gain amplifier data sheet: rev f 0 4 /2 7 /12 - 2 of 12 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? specifications absolute maximum ratings parameter rating storage temperature - 55 to 150 o c rf input power, cw, 50 , t = 25oc +12 dbm v cc (pins 8, 14, 28) + 5.5 v di gital i nput voltage v cc + 0.5v operation of this device outside the parameter ranges given above may cause permanent damage. recommended operating conditions parameter min typ max unit s v cc (pins 8, 14, 28) 4.75 5 5.25 v case temperature - 40 85 o c junction temperature, t j 1 7 0 o c t j specified for >10 6 hours mttf electrical specifications are measured at specified test conditions. specifications are not guaranteed over all recommended operating conditions. electrical specifications test c onditions unless otherwise noted: 25 oc, v cc = +5v , maximum gain state . parameter conditions min typ max unit s operational freq range 6 00 1000 mhz test frequency 900 mhz gain 28.5 31.7 db gain control range 0.5 db step size 31 . 5 db accuracy e rror all states, 3 wire spi, 6 states (0.5 + 5 % of attenuation setting) max db control interface 3 - wire serial interface 6 bit input return loss 16 db output return loss 22 db output p1db + 2 4 .3 dbm output ip3 pout = +11 dbm/tone , ? f = 1mhz spacing +36.5 + 40 db m noise figure 2. 1 db i/o impedance 50 ? supply voltage +5 v supply current 130 1 7 4 215 ma thermal resistance, t jc module (junction to case) 36.7 o c/w
tqm8 29007 0.6 - 1.0 ghz ?w digital variable gain amplifier data sheet: rev f 0 4 /2 7 /12 - 3 of 12 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? application circuit (tqm8 29007- pcb) spi_le gnd spi_vcc gnd vcc_amp1 spi_data spi_clk nc gnd rf_in c1 0 ? gnd gnd gnd gnd gnd nc gnd gnd gnd gnd gnd gnd rf_out c2 0 ? gnd gnd gnd gnd vcc_amp 2 c8 0.1uf j2 rf output j1 rf input j3-1 j3-2 j3-3 j3-4 j3-5 j3-6 j3-7 j3-8 j3-9 j3-10 j3-11 j3-12 j3-13 j3-14 j3-15 j3-16 j3-19 j3-17 j3-18 j3-20 c12 4.7uf c13 4.7uf spi_vcc data clk le vcc_amp gnd gnd u1 6x6_ 28pin fb1 0 ? fb2 0 ? 1 2 3 4 5 6 7 21 20 19 18 17 16 15 8 9 10 11 12 13 14 28 27 26 25 24 23 22 notes : 1. for pcb board layout, see page 9 for more information. 2. all components are of 0603 size unless stated otherwise. 3. for spi timing diagram, see page 6. 4. 0 ? jumpers may be replaced with copper traces in the target application layout. 5. different ground pi ns are used for spi (digital) and analog supply voltages. 6. the primary rf microstrip characteristic line impedance is 50 ?. 7. the single power supply is used to provide supply voltage to amp1 and amp2. bill of materia l: tq m829007- pcb reference desg. value description manufac turer part number u1 0.6 C 1.0 ghz ? w dvga triquint tq m829007 c8 0.1 uf cap, chip, 0603, 16 v, x7r, 10 % various c12, c13 4.7 uf cap, chip, 0603, 6.3 v, x5r, 20 % various c1, c2, fb1, fb2 0 res, chip, 0603, 1/16w, 5% various c4 do not place
tqm8 29007 0.6 - 1.0 ghz ?w digital variable gain amplifier data sheet: rev f 0 4 /2 7 /12 - 4 of 12 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? typical performance , max imum g a in s tate note: 1. the evaluation board can be used with triquints usb inte rface board. refer to triquint s website for more information. typical performance p lots - 5 0 5 10 15 20 25 30 35 0.6 0.7 0.8 0.9 1.0 1.1 gain (db) frequency (ghz) gain vs. freq over attenuation states 0db 0.5db 1db 2db 4db 8db 16db 31.5db temp. = 25 o c 24 26 28 30 32 34 0.6 0.7 0.8 0.9 1.0 1.1 gain (db) frequency (ghz) gain vs. freq over temperature maximum gain state +85 c +25 c ?40 c - 25 - 20 - 15 - 10 - 5 0 0.6 0.7 0.8 0.9 1.0 1.1 s11 (db) frequency (ghz) s11 vs. freq over attenuation states 0db 0.5db 1db 2db 4db 8db 16db 31.5db temp. = 25 o c - 25 - 20 - 15 - 10 - 5 0 0.6 0.7 0.8 0.9 1.0 1.1 s11 (db) frequency (ghz) s11 vs. freq over temperature maximum gain state +85 c +25 c ?40 c frequency g hz 0.6 0.7 0.8 0.9 1.0 gain db 30.5 31 31.5 31.7 31.6 input return loss db 10 10.5 12 16 20 output return loss db 8 1 0 14 22 18 output p1db dbm +24.6 +2 4.5 +24.3 +24.3 +24.4 output ip3 @ pout = 11 dbm/tone , ? f = 1 mhz dbm +40 + 39.5 +39.3 +39.5 +38.7 noise figure db 2.2 2.2 2.0 2.1 2.1 supply voltage v +5 supply current ma 174
tqm8 29007 0.6 - 1.0 ghz ?w digital variable gain amplifier data sheet: rev f 0 4 /2 7 /12 - 5 of 12 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? - 25 - 20 - 15 - 10 - 5 0 0.6 0.7 0.8 0.9 1.0 1.1 s22 (db) frequency (ghz) s22 vs. freq over attenuation states 0db 0.5db 1db 2db 4db 8db 16db 31.5db temp. = 25 o c - 25 - 20 - 15 - 10 - 5 0 0.6 0.7 0.8 0.9 1.0 1.1 s22 (db) frequency (ghz) s22 vs. freq over temperature maximum gain state +85 c +25 c ?40 c 30 35 40 45 50 0.6 0.7 0.8 0.9 1.0 oip3 (dbm) frequency (ghz) oip3 vs. frequency 1 mhz tone spacing pout /tone = 11dbm maximum gain state +85 c +25 c ?40 c 25 30 35 40 45 50 0 4 8 12 16 oip3 (dbm) attenuation state (db) oip3 vs. attenuation state 1 mhz tone spacing pout /tone = 11dbm frequency : 900 mhz +85 c +25 c ?40 c 22 23 24 25 26 27 0.6 0.7 0.8 0.9 1.0 p1db (dbm) frequency (ghz) p1db vs. frequency +85 c +25 c ?40 c maximum gain state 0.0 1.0 2.0 3.0 4.0 0.6 0.7 0.8 0.9 1.0 nf (db) frequency (ghz) noise figure vs. frequency +85 c +25 c ?40 c maximum gain state
tqm8 29007 0.6 - 1.0 ghz ?w digital variable gain amplifier data sheet: rev f 0 4 /2 7 /12 - 6 of 12 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? serial control interface serin (msb in first 6 - bit word) control logic truth table 6 - bit control word to dsa m sb l sb attenuation state d5 d4 d3 d2 d1 d0 1 1 1 1 1 1 reference : il 1 1 1 1 1 0 0.5 db 1 1 1 1 0 1 1 db 1 1 1 0 1 1 2 db 1 1 0 1 1 1 4 db 1 0 1 1 1 1 8 db 0 1 1 1 1 1 16 db 0 0 0 0 0 0 31.5 db any combination of the possible 64 states will provide an attenuation of approximately the sum of bits selected serial control interface timing diagram clk is disabled when le is high serin clk le d5-d0 msb-lsb d5-d0 msb-lsb t sdsup t sdhld t lesup t lepw t plo
tqm8 29007 0.6 - 1.0 ghz ?w digital variable gain amplifier data sheet: rev f 0 4 /2 7 /12 - 7 of 12 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? serial control timing characteristics test conditions: 25oc parameter condition min max units clock frequency 50% duty cycle 10 mhz le setup time, t lesup a fter last clk rising edge 10 ns le pulse width, t lepw 30 ns serin set - up time, t sdsup b efore clk rising edge 10 ns serin hold - time, t sdhld a fter clk rising edge 10 n s le pulse spacing t le le to le pulse spacing 630 n s propagation delay t plo l e to parallel output valid 30 ns serial control dc logic characteristics test conditions: 25oc parameter condition min max units input low voltage, v il 0 0.8 v input high voltage, v ih 2.4 vcc v input current, i ih / i i l on serin, le and clk - 10 + 10 a
tqm8 29007 0.6 - 1.0 ghz ?w digital variable gain amplifier data sheet: rev f 0 4 /2 7 /12 - 8 of 12 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? detailed device description the tqm8 29007 is a 50 ? internally matched digital variable gain amplifier (dvga) featuring high linearity over the entire gain control range . the amplifier module features the integratio n of a low noise amplifier gain block, a digital - step attenuator , along with a high linearity ?w amplifier as shown in the functional diagram below. the module is unconditionally stable. internal blocking capacitors and bias structures keep external part s count to a minimum. the d vga has an operational frequency range from 0.6 C 1.0 ghz . for any further technical questions, please email to sjcapplications.engineering@tqs.com . functional sch ematic diagram amp1 dsa spi amp2 m m dc bias dc bias le data clk pin 1 pin 6 pin 16 pin 2 pin 3 pin 14 pin 8 dc block dc block dc block dc block where m = matching network . chain analysis table the chain analysis of dvga module is shown below in the table. this table provides the typical performance of individual stages in the module as well as overall module performance. indivi dual stage performance overall performance function amp1 dsa amp2 gain (db) 1 4.5 - 1. 2 18. 4 31.7 nf (db) 2.0 1. 2 2.1 2.1 oip3 (dbm) 40.6 5 6 39.5 39.5 p1db (dbm) 21.4 28.8 24.3 24.3 icc (ma) 85 2.0 87 17 4
tqm8 29007 0.6 - 1.0 ghz ?w digital variable gain amplifier data sheet: rev f 0 4 /2 7 /12 - 9 of 12 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? detailed device description amp1 amp1 i s a wide band low noise amplifier gain block in dvga module. the amplifier provides 1 4. 5 db gain, 2.0 db noise figure, +40.6 dbm oip3 at 0.9 ghz while only drawing 85 ma current. external dc blocks and biasing is not required. amp1 is dc blocked internal ly and is connected internally to t wo bypass capacitors ( 100 pf , 0.1 uf) followed by 68 nh inductor inside the module as shown in the figure below. 100 pf 0.1 uf amp1 68 nh pin 6 pin 8 to dsa (internal) dc block dc block dsa (digital step attenuator) dvga has a serial digital step attenuator that is controlled with 6 - bit ser ial periphery interface (spi tm ) and has 0.5 db step size with 31.5 db attenuation range. this 50 - ohm rf dsa maintains high attenuation accuracy over frequency and temperature. 000000 represents maximum attenuation state. external bypass capacitors are needed to compensate the inductance effect associated with long transmission lines on the evaluation board. amp2 amp2 is high linearity ? - w amplifier in dvga module. the amplifier provides 18. 4 db gain, +2 4.3 dbm p1db, + 39.5 dbm oip3 at 0.9 ghz whi le o nly drawing 87 ma current. the amplifier is tuned over 0.6 C 1.0 g hz bandwidth using internal matching components. amp2 is dc blocked internally and is connected internally to two bypass capacitors ( 100 pf, 0.1 uf) followed by a 47 nh inductor inside the module as shown in the figure below. external dc blocks and biasing is not required. 100 pf 0.1 uf amp2 dc block 47 nh pin 16 pin 14 from dsa (internal) dc block m m
tqm8 29007 0.6 - 1.0 ghz ?w digital variable gain amplifier data sheet: rev f 0 4 /2 7 /12 - 10 of 12 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? pin configuration and description pin symbol description 1 le serial l atch enable i nput. when le is high, latch is clear and content of spi control the attenu ator. when le is low, data in spi is latched. 2 data serial data input . the data and clock pins allow the data to be entered serially into spi and is independent of latch state. 3 clk serial clock input . 4 , 22 n/c no connec t or open. this pin is not co nnected in this module 6 rf in in put, matched to 50 ohms. internal ly dc block ed . 8 v cc _amp1 supply voltage to amp1 . this pin is connected internally to 2 bypass capacitors ( 100 pf, 0. 1 uf ) followed by a 68 nh inductor inside the module . 14 v cc _amp2 supp ly voltage to amp 2 . this pin is connected internally to 2 bypass capacitors (100 pf, 0. 1 uf) followed by a 47 nh inductor inside the module . 16 rfout output matched to 50 ohms . internal ly dc block ed . 28 v cc _spi supply voltage for spi and dsa chip. this pin is connected to 0.1 uf bypass capacitor internally . all other pins gnd rf/dc ground connection applications information pc board layout top rf layer is .014 nelco n4000 - 13 material , ? r (typical) = 3.7 , 4 total layers (0.062 thick) for mechanical rigidity. metal layers are 1 - oz copper. microstrip line details: width = .030, spacing = .0 3 6. the pad pattern shown has been developed and tested for optimized assembly at triquint semi conductor. the pcb land pattern has been developed to accommodate lead and package tolerances. since sur face mount processes vary from supplier to supplier , careful process development is recommended. for further technical information, refer to www.triquint.com
tqm8 29007 0.6 - 1.0 ghz ?w digital variable gain amplifier data sheet: rev f 0 4 /2 7 /12 - 11 of 12 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? mechanical information package information and dimensions this package is rohs - complia nt. the package bottom finish is electrolytic plated au over ni . it is compatible with both lead - free (maximum 260 c reflow temperature) and lead (maximum 245 c reflow temperature) soldering processes. also recommend adding active fluxes of 2% during solder reflow. the component will be laser marked with tqm8 2 900 7 product label with an alphanumeric lot code on the top surface of the package. pcb mounting pattern notes: 1. all dimensions are in millimeters. angles are in degrees. 2. use 1 oz. copper minimum for top and bottom layer metal. 3. vias are required under the backside paddle of this device for proper rf/dc grounding and thermal dissipation. we recommend a 0.35mm (#80/.0135") diameter bit for drilling via holes and a final plated thru diameter of 0.25mm (0.10). 4. ensure good package backside paddle solder attach for reliable operation and best electrical performance.
tqm8 29007 0.6 - 1.0 ghz ?w digital variable gain amplifier data sheet: rev f 0 4 /2 7 /12 - 12 of 12 - disclaimer: subject to change without notice ? 20 12 triquint semiconductor, inc. connecting the digital world to the global network ? product compliance information esd information esd rating: class 1c value: passes 1000 v to < 2000 v test: human body model (hbm) standard: jedec standard jesd22 - a114 esd rating: class iv value: passes 1000 v test: charged device model (cdm) standard: jedec standard jesd22 - c101 solderability compatible with both lead - free (maximum 260 c reflow temperature) and tin/lead (maximum 245 c reflow temperature) soldering processes. this part is compliant with eu 2002/95/ec rohs directive (restrictions on the use of certain hazardous substances in electrical and electronic equipment). this pro duct also has the following attributes: ? halogen free (chlorine, bromine) ? antimony free ? tbbp - a (c 15 h 12 br 4 0 2 ) free ? pfos free ? svhc free msl rating level 3 at +260 c convection reflow the part is rated moisture sensitivity level 3 at 260c per jedec standa rd ipc/jedec j - std - 020. contact information for the latest specifications, additional product information, worldwide sales and distribution locations, and information ab out triquint: web: www.triquint.com t el: +1.503.615.9000 email: info - sales@tqs.com fax: +1.503.615.8902 for technical questions and application information: email: sjcapplications.eng ineering@tqs.com important notice the information contained herein is believed to be reliable . triquint makes no warranties regarding the information contain ed herein . triquint assumes no responsibility or liability whatsoever for any of the inform ation contained her ein. triquint assumes no responsibility or liability whatsoever for the use of the information contained herein. the information contained herein is provided "as is, where is" and with all faults, and the entire risk associated with su ch information is entirely with the user. all information contained herein is subject to change without notice. customers should obtain and verify the latest relevant information before placing orders for triquint products. the information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual pro perty rights, whether with regard to such information itself or anything descri bed by such information. triquint products are not warranted or authorized for use as critical components in medical, life - saving, or life - sustaining applications, or other applications where a failure would reasonably be expected to cause severe persona l injury or death.


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