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seiko instruments inc. 1 the s-93c46a/56a/66a is high speed, low power 1k/2k/4k-bit e 2 prom with a wide operating voltage range. it is organized as 64-word 16-bit, 128- word 16-bit, 256-word 16-bit, respectivly. each is capable of sequential read, at which time addresses are automatically incremented in 16-bit blocks. the instruction code is compatible with the nm93cs46/56/66. ? pin assignment 8-pin dip top view v cc do nc test sk di gnd cs 1 2 3 4 5 6 7 8 s-93c46adp-1a s-93c56adp-1a s-93c66adp-1a 8-pin tssop top view 1 2 3 4 8 7 6 5 cs sk di do v cc nc test gnd s-93c46aft s-93c56aft s-93c66aft * see ? dimensions s-93c46amfn s-93c56amfn s-93c66amfn 8-pin msop top view 1 2 3 4 8 7 6 5 v cc nc test gnd cs sk di do s-93c46afj s-93c56afj s-93c66afj 8-pin sop1 top view nc gnd test do di sk 6 5 8 7 3 4 1 2 v cc cs sk cs 8-pin sop2 top view v cc test gnd di do 6 5 8 7 3 4 1 2 nc s-93c46adfj s-93c56adfj s-93c66adfj ? pin functions table 1 name pin number function dip sop1 sop2 tssop msop cs 13118 chip select input sk 24227 serial clock input di 35336 serial data input do 46445 serial data output gnd 57554 ground test 68663 test pin (normally kept open) (can be connected to gnd or vcc) nc 71772no connection v cc 82881 power supply figure 1 cmos serial e 2 prom s-93c46a / 56a / 66a ? features y low power consumption standby : 1.0 m a max. (vcc=5.5 v) operating : 0.8 ma max. (vcc=5.5 v) : 0.4 ma max. (vcc=2.5 v) y wide operating voltage range read/write : 1.8 to 5.5 v y sequential read capable y endurance : 10 6 cycles/word y data retention : 10 years y s-93c46a : 1k bits nm93cs46 instruction code compatible y s-93c56a : 2k bits nm93cs56 instruction code compatible y s-93c66a : 4k bits nm93cs66 instruction code compatible rev. 2.2
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 2 ? block diagram memory array data register address decoder mode decode logic clock generator output buffer v cc gnd do di cs sk ? instruction set table 2 instruction start bit op code address data s-93c46a s-93c56a s-93c66a read (read data) 1 10 a 5 to a 0 xa 6 to a 0 a 7 to a 0 d 15 to d 0 output*1 write (write data) 1 01 a 5 to a 0 xa 6 to a 0 a 7 to a 0 d 15 to d 0 input erase (erase data) 1 11 a 5 to a 0 xa 6 to a 0 a 7 to a 0 ? wral (write all)*2 1 00 01xxxx 01xxxxxx 01xxxxxx d 15 to d 0 input eral (erase all)*2 1 00 10xxxx 10xxxxxx 10xxxxxx ? ewen (program enable) 1 00 11xxxx 11xxxxxx 11xxxxxx ? ewds (program disable) 1 00 00xxxx 00xxxxxx 00xxxxxx ? x : doesnt matter. *1 : addresses are continuously incremented. *2 : valid only at vcc = 2.5 v to 5.5 v. ? absolute maximum ratings parameter symbol ratings unit power supply voltage v cc -0.3 to +7.0 v input voltage v in -0.3 to v cc +0.3 v output voltage v out -0.3 to v cc v storage temperature under bias t bias -50 to +95 c storage temperature t stg -65 to +150 c table 3 fi g ure 2
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 3 ? recommended operating conditions table 4 parameter symbol conditions min. typ. max. unit power supply voltage v cc read/write/erase ewen/ewds wral/eral 1.8 2.5 ? ? 5.5 5.5 v v high level input voltage v ih v cc =4.5 to 5.5 v v cc =2.7 to 4.5 v v cc =1.8 to 2.7 v 2.0 0.8 vcc 0.8 vcc ? ? ? vcc vcc vcc v v v low level input voltage v il v cc =4.5 to 5.5 v v cc =2.7 to 4.5 v v cc =1.8 to 2.7 v 0.0 0.0 0.0 ? ? ? 0.8 0.2 vcc 0.15 vcc v v v operating temperature t opr -40 ? +85 c ? pin capacitance table 5 (ta=25 c, f=1.0 mhz, v cc =5 v) parameter symbol conditions min. typ. max. unit input capacitance c in v in =0 v ?? 8pf output capacitance c out v out =0 v ?? 10 pf ? endurance table 6 parameter symbol min. typ. max. unit endurance n w 10 6 ?? cycles/word
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 4 ? dc electrical characteristics parameter smbl conditions v cc =4.5 v to 5.5 vv cc =2.5 v to 4.5 vv cc =1.8 to 2.5 v unit min. typ. max. min. typ. max. min. typ. max. current consumption (read) i cc1 do unloaded ?? 0.8 ?? 0.6 ?? 0.4 ma current consumption (program) i cc2 do unloaded ?? 2.0 ?? 1.5 ?? 1.0 ma parameter smbl conditions v cc =4.5 v to 5.5 v v cc =2.5 to 4.5 v v cc =1.8 to 2.5 v unit min. typ. max. min. typ. max. min. typ. max. standby current consumption i sb cs=gnd do=open connected to v cc or gnd ?? 1.0 0.6 0.4 m a input leakage current i li v in =gnd to v cc ? 0.1 1.0 0.1 1.0 0.1 1.0 m a output leakage current i lo v out =gnd to v cc ? 0.1 1.0 0.1 1.0 0.1 1.0 m a low level output v ol i ol =2.1 ma ?? 0.4 v voltage i ol =100 m a ?? 0.1 0.1 0.1 v high level output v oh i oh =-400 m a 2.4 ?? v voltage i oh =-100 m av cc - 0.7 ?? v cc - 0.7 v i oh =-10 m av cc - 0.7 ?? v cc - 0.7 v cc - 0.2 v write enable latch data hold voltage v dh only when write disable mode 1.5 ?? 1.5 1.5 v table 7 table 8
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 5 ? ac electrical characteristics table 9 input pulse voltage 0.1 v cc to 0.9 v cc output reference voltage 0.5 v cc output load 100pf table 10 parameter smbl v cc =4.5 to 5.5v v cc =2.5 to 4.5 v v cc =1.8 to 2.5v unit min. typ. max. min. typ. max. min. typ. max. cs setup time t css 0.2 0.4 1.0 m s cs hold time t csh 000 m s cs deselect time t cds 0.2 0.2 0.4 m s data setup time t ds 0.1 0.2 0.4 m s data hold time t dh 0.1 0.2 0.4 m s output delay t pd 0.4 1.0 2.0 m s clock frequency f sk 0 2.0 0 0.5 0.25 mhz clock pulse width t skh, t skl 0.25 1.0 2.0 m s output disable time t hz1 , t hz2 0 0.15 0 0.5 0 1.0 m s output enable time t sv 0 0.15 0 0.5 0 1.0 m s programming time t pr 4.0 10.0 4.0 10.0 4.0 10.0 ms figure 3 read timing t skh t cds t css cs valid data valid data di t skl sk t sv t hz2 t csh t hz1 t pd t pd t ds t dh t ds t dh hi-z hi-z hi-z do do (read) (verify) hi-z
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 6 ? operation instructions (in the order of start-bit, instruction, address, and data) are latched to di in synchronization with the rising edge of sk after cs goes high. a start-bit can only be recognized when the high of di is latched to the rising edge of sk when cs goes from low to high, it is impossible for it to be recognized as long as di is low, even if there are sk pulses after cs goes high. any sk pulses input while di is low are called "dummy clocks." dummy clocks can be used to adjust the number of clock cycles needed by the serial ic to match those sent out by the cpu. instruction input finishes when cs goes low, where it must be low between commands during t cds . all input, including di and sk signals, is ignored while cs is low, which is stand-by mode. 1. read the read instruction reads data from a specified address. after a0 is latched at the rising edge of sk, do output changes from a high-impedance state (hi-z) to low level output. data is continuously output in synchronization with the rise of sk. when all of the data (d0) in the specified address has been read, the data in the next address can be read with the input of another sk clock. thus, it is possible for all of the data addresses to be read through the continuous input of sk clocks as long as cs is high. the last address (an yyy a1 a0 = 1 yyy 11) rolls over to the top address (an yyy a1 a0 = 0 yyy 00). figure 5 read timing (s-93c56a) figure 4 read timing (s-93c46a) a 5 a 4 a 3 a 2 a 1 a 0 +1 a 5 a 4 a 3 a 2 a 1 a 0 +2 d 15 d 15 d 14 d 14 d 13 d 14 hi-z d 13 d 0 d 1 d 2 d 15 0 hi-z a 0 a 1 a 2 a 3 a 4 a 5 0 1 1 28 27 26 25 24 23 12 11 10 9 8 7 6 5 4 3 2 1 44 43 42 41 40 39 d 13 d 0 d 1 d 2 cs sk di do a 0 a 6 12 45 29 14 d 15 d 15 d 14 d 14 d 13 d 14 hi-z a 6 a 5 a 4 a 3 a 2 a 1 a 0 +1 d 13 d 0 d 1 d 2 d 15 0 hi-z a 1 a 2 a 3 a 4 a 5 x 0 1 1 28 27 26 25 24 11 10 9 8 7 6 5 4 3 2 1 44 43 42 41 40 a 6 a 5 a 4 a 3 a 2 a 1 a 0 +2 d 13 d 0 d 1 $ 13 cs sk di do
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 7 figure 6 read timing (s-93c66a) 2. write (write, erase, wral, eral) there are four write instructions, write, erase, wral, and eral. each automatically begins writing to the non- volatile memory when cs goes low at the completion of the specified clock input. the write operation is completed in 10 ms (t pr max.), and the typical write period is less than 5 ms. in the s- 93c46a/56a/66a, it is easy to verify the completion of the write operation in order to minimize the write cycle by setting cs to high and checking the do pin, which is low during the write operation and high after its completion. this verify procedure can be executed over and over again. because all sk and di inputs are ignored during the write operation, any input of instruction will also be disregarded. when do outputs high after completion of the write operation or if it is in the high-impedence state (hi-z), the input of instructions is available. even if the do pin remains high, it will enter the high-impedence state upon the recognition of a high of di (start-bit) attached to the rising edge of an sk pulse. (see figure 3). di input should be low during the verify procedure. a 0 a 6 12 45 29 14 d 15 d 15 d 14 d 14 d 13 d 14 hi-z a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 +1 d 13 d 0 d 1 d 2 d 15 0 hi-z a 1 a 2 a 3 a 4 a 5 a 7 0 1 1 28 27 26 25 24 11 10 9 8 7 6 5 4 3 2 1 44 43 42 41 40 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 +2 d 13 d 0 d 1 d 2 13 cs sk di do
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 8 2.1 write this instruction writes 16-bit data to a specified address. after changing cs to high, input a start-bit, op-code (write), address, and 16-bit data. if there is a data overflow of more than 16 bits, only the last 16 bits of the data is considered valid. changing cs to low will start the write operation. it is not necessary to make the data "1" before initiating the write operation. figure 7 write timing (s-93c46a) t cds t pr busy hi-z t sv verify hi-z 1 cs sk di do t hz1 2 345678910 25 1 0 1 d0 ready a5 a4 a3 a2 a1 a0 d15 figure 8 write timing (s-93c56a) t cds t pr busy hi-z t sv verify hi-z 1 cs sk di do t hz1 2 3 4 5 6 7 8 9 10 11 12 27 101 d0 ready x a6a5a4a3a2a1a0d15 figure 9 write timing (s-93c66a) t cds t pr busy hi-z t sv verify hi-z 1 cs sk di do t hz1 2 3 4 5 6 7 8 9 10 11 12 27 1 0 1 d0 ready a7 a6 a5 a4 a3 a2 a1 a0 d15
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 9 2.2 erase this command erases 16-bit data in a specified address. after changing cs to high, input a start-bit, op-code (erase), and address. it is not necessary to input data. changing cs to low will start the erase operation, which changes every bit of the 16-bit data to "1." figure 10 erase timing (s-93c46a) t cds t pr busy hi-z t sv verify hi-z 1 cs sk di do t hz1 2 3456789 11 a0 ready 1 a5 a4 a3 a2 a1 figure 11 erase timing (s-93c56a) t cds t pr busy hi-z t sv verify hi-z 1 cs sk di do t hz1 2 34567891011 11 a0 ready 1 x a6a5a4a3a2a1 figure 12 erase timing (s-93c66a) t cds t pr busy hi-z t sv verify hi-z 1 cs sk di do t hz1 2 34567891011 11 a0 ready 1 a7 a6 a5 a4 a3 a2 a1
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 10 2.3 wral this instruction writes the same 16-bit data into every address. after changing cs to high, input a start-bit, op-code (wral), address (optional), and 16-bit data. if there is a data overflow of more than 16 bits, only the last 16 bits of the data is considered valid. changing cs to low will start the wral operation. it is not necessary to make the data "1" before initiating the wral operation. figure 13 wral timing (s-93c46a) t cds t pr busy hi-z t sv verify hi-z 1 cs sk di do t hz1 2 345678910 25 1 0d0 ready 00 1 4xs d15 t cds t pr busy hi-z t sv verify hi-z 1 cs sk di do t hz1 2 3 4 5 6 7 8 9 10 11 12 27 1 0d0 ready 00 1 6xs d15 figure 14 wral timing (s-93c56a) t cds t pr busy hi-z t sv verify hi-z 1 cs sk di do t hz1 2 3 4 5 6 7 8 9 10 11 12 27 1 0d0 ready 00 1 6xs d15 figure 15 wral timing (s-93c66a)
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 11 2.4 eral this instruction erases the data in every address. after changing cs to high, input a start-bit, op-code (eral), and address (optional). it is not necessary to input data. changing cs to low will start the eral operation, which changes every bit of data to "1." figure 16 eral timing (s-93c46a) t cds 4xs 0 1 0 8 7 6 5 4 3 2 1 cs sk di do 1 0 t pr hi-z t hz1 ready busy t sv verify 9 figure 17 eral timing (s-93c56a) 11 t cds 6xs 0 1 0 8 7 6 5 4 3 2 1 cs sk di do 1 0 t pr hi-z t hz1 ready busy t sv verify 10 9 figure 18 eral timing (s-93c66a) 11 t cds 6xs 0 1 0 8 7 6 5 4 3 2 1 cs sk di do 1 0 t pr hi-z t hz1 ready busy t sv verify 10 9
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 12 3. write enable (ewen) and write disable (ewds) the ewen instruction puts the s-93c46a/56a/66a into write enable mode, which accepts write, erase, wral, and eral instructions. the ewds instruction puts the s-93c46a/56a/66a into write disable mode, which refuses write, erase, wral, and eral instructions. the s-93c46a/56a/66a powers on in write disable mode, which protects data against unexpected, erroneous write operations caused by noise and/or cpu malfunctions. it should be kept in write disable mode except when performing write operations. figure 19 ewen/ewds timing (s-93c46a) 4xs 11=ewen 00=ewds 0 8 7 6 5 4 3 2 1 sk di 1 0 9 standby cs figure 20 ewen/ewds timing (s-93c56a) 6xs 11=ewen 00=ewds 0 8 7 6 5 4 3 2 1 sk di 1 0 11 9 standby cs 10 figure 21 ewen/ewds timing (s-93c66a) 6xs 11=ewen 00=ewds 0 8 7 6 5 4 3 2 1 sk di 1 0 11 9 standby cs 10
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 13 ? receiving a start-bit both the recognition of a start-bit and the verify procedure occur when cs is high . therefore, only after a write operation, in order to accept the next command by having cs go high, the do pin switch from a state of high-impedence to a state of data output; but if it recognizes a start-bit, the do pin returns to a state of high-impedence. ? three-wire interface (di-do direct connection) although the normal configuration of a serial interface is a 4-wire interface to cs, sk, di, and do, a 3-wire interface is also a possibility by connecting di and do. however, since there is a possibility that the do output from the serial memory ic will interfere with the data output from the cpu with a 3-wire interface, install a resistor between di and do in order to give preference to data output from the cpu to di (see figure 22). di sio do cpu s-93c46a / 56a / 66a r : 10k ~ 100k w please refer application note s-29 & s-93c series eeproms tips, tricks & traps for equivalent circuit of each pin. figure 22
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 14 ? ordering information s-93cx6a yy - zz - w p code (distincion for package process) none f s 1a taping specification none (for dip) tb package code dp : dip fj : sop1 dfj : sop2 ft : tssop mfn : msop product name s-93c46a : 1k bits s-93c56a : 2k bits s-93c66a : 4k bits product name package code taping specification p code package/tape/reel drawings none dp008-a -f dp008-e dp none -s dp008-a dp008-e -1a dp008-c s-93c46a none fj008-d s-93c56a fj -tb -f fj008-e s-93c66a dfj -s fj008-d fj008-e none ft008-a ft -tb -f ft008-b -s ft008-a ft008-b mfn -tb none fn008-a note 1) package dimensions of sops whose package codes are fj and dfj are the same in the range of deviation. 2) please contact an sii local office or a local representative for details.
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 15 ? chracteristics 1. dc characteristics 1.1 current consumption (read) i cc1 ambient temperature ta 1.2 current consumption (read) i cc1 ambient temperature ta ta ( c ) 0.4 0.2 v cc =5.5 v f sk =2 mhz data=0101 0 -40 0 85 i cc1 (ma) ta ( c ) 0.4 0.2 v cc =3.3 v f sk =500 khz data=0101 0 -40 0 85 i cc1 (ma) 1.4 current consumption (read) i cc1 power supply voltage v cc 1.3 current consumption (read) i cc1 ambient temperature ta ta ( c ) 0.4 0.2 v cc =1.8 v f sk =10 khz data=0101 0 -40 0 85 i cc1 (ma) 0.4 0.2 0 234 56 7 ta=25 c f sk =1 mhz, 500 khz data=0101 v cc (v) 1.6 current consumption (read) i cc1 clock frequency f sk 1.5 current consumption (read) i cc1 power supply voltage v cc 0.4 0.2 0 23456 7 ta=25 c f sk =100 khz, 10 khz data=0101 v cc (v) 0.4 0.2 0 i cc1 (ma) v cc =5.0 v ta=25 c 1m 2m 10k 100k f sk (hz) 1.8 current consumption (write) i cc2 ambient temperature ta 1.7 current consumption (write) i cc2 ambient temperature ta ta ( c ) 1.0 0.5 v cc =5.5 v 0 -40 0 85 i cc2 (ma) ta ( c ) 1.0 0.5 v cc =3.3 v 0 - 40 0 85 i cc2 (ma) i cc1 (ma) i cc1 (ma) 100khz ~ 10khz ~ 1mhz ~ ~ 500khz
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 16 1.13 input leakage current i li ambient temperature ta 1.10 current consumption (write) i cc2 power supply voltage v cc 1.9 current consumption (write) i cc2 ambient temperature ta ta ( c ) 1.0 0.5 v cc =1.8 v 0 -40 0 85 i cc2 (ma) 1.11 standby current consumption i sb ambient temperature ta 1.12 input leakage current i li ambient temperature ta 1.15 output leakage current i lo ambient temperature ta 1.14 output leakage current i lo ambient temperature ta ta ( c ) 1.0 0.5 v cc =5.5 v do=0 v 0 -40 0 85 i lo ( m a) ta ( c ) 1.0 0.5 v cc =5.5 v do=5.5 v 0 -40 0 85 i lo ( m a) 1.0 0.5 0 234 56 7 ta=25c v cc (v) i cc2 (ma) 10 -6 10 -7 10 -8 10 -9 10 -10 v cc =5.5 v 10 -11 ta ( c ) -40 0 85 ta ( c ) 1.0 0.5 v cc =5.5 v cs, sk, di, test=0 v 0 -40 0 85 i li ( m a) ta ( c ) 1.0 0.5 0 -40 0 85 v cc =5.5 v cs, sk, di, test=5.5 v i sb (a) i li ( m a) 1.16 high level output voltage v oh ambient temperature ta ta ( c ) 4.6 4.4 v cc =4.5 v i oh =-400 m a -40 0 85 v oh (v) 4.2
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 17 1.17 high level output voltage v oh ambient temperature ta 1.19 high level output voltage v oh ambient temperature ta 1.18 high level output voltage v oh ambient temperature ta 1.21 low level output voltage v ol ambient temperature ta 1.20 low level output voltage v ol ambient temperature ta ta ( c ) 2.7 2.6 v cc =2.7 v i oh =-100 m a -40 0 85 v oh (v) 2.5 ta ( c ) 2.5 2.4 v cc =2.5 v i oh =-100 m a -40 0 85 v oh (v) 2.3 ta ( c ) 1.9 1.8 v cc =1.8 v i oh =-10 m a -40 0 85 v oh (v) 1.7 ta ( c ) 0.3 0.2 v cc =4.5 v i ol =2.1 ma -40 0 85 v ol (v) 0.1 ta ( c ) 0.03 0.02 v cc =1.8 v i ol =100 m a -40 0 85 v ol (v) 0.01 1.22 high level output current i oh ambient temperature ta ta ( c ) -20.0 -10.0 v cc =4.5 v v oh =2.4 v 0 -40 0 85 i oh (ma) 1.23 high level output current i oh ambient temperature ta ta ( c ) -4 -2 v cc =2.7 v v oh =2.0 v 0 -40 0 85 i oh (ma) 1.24 high level output current i oh ambient temperature ta ta ( c ) -4 -2 v cc =2.5 v v oh =1.8 v 0 -40 0 85 i oh (ma)
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 18 1.25 high level output current i oh ambient temperature ta 1.27 low level output current i ol ambient temperature ta 1.26 low level output current i ol ambient temperature ta ta ( c ) -1.0 -0.5 v cc =1.8 v v oh =1.6 v 0 -40 0 85 i oh (ma) ta ( c ) 20 10 v cc =4.5 v v ol =0.4 v 0 -40 0 85 i ol (ma) ta ( c ) 1.0 0.5 v cc =1.8 v v ol =0.1 v 0 -40 0 85 i ol (ma) 1.29 input voltage v in (v il ,v ih ) ambient temperature ta 1.28 input voltage v in (v il ,v ih ) power supply voltage v cc ta ( c ) 3.0 2.0 v cc =5.0 v cs , sk , di 0 -40 0 85 3.0 1.5 0 12345 6 ta=25c cs, sk, di v cc (v) v inv (v) 7 v inv (v)
cmos serial e 2 prom s-93c46a / 56a / 66a seiko instruments inc. 19 2. ac characteristics v cc (v) v cc (v) 2.2 program time t pr power supply voltage v cc 2.1 maximum operating frequency f max power supply voltage v cc 2.4 program time t pr ambient temperature ta 2.3 program time t pr ambient temperature ta 2.5 program time t pr ambient temperature ta 10k 234 5 ta=25c f max (hz) 1 4 2 234567 ta=25c t pr (ms) 1 100k 1m 2m ta ( c ) 6 4 v cc =5.0 v -40 0 85 2 t pr (ms) ta ( c ) 6 4 v cc =3.0 v -40 0 85 2 t pr (ms) ta ( c ) 6 4 v cc =1.8 v -40 0 85 2 t pr (ms) 2.6 data output delay time t pd ambient temperature ta ta ( c ) 0.3 0.2 v cc =4.5 v -40 0 85 0.1 t pd ( m s) 2.7 data output delay time t pd ambient temperature ta ta ( c ) 0.6 0.4 v cc =2.7 v -40 0 85 0.2 t pd ( m s) 2.8 data output delay time t pd ambient temperature ta ta ( c ) 1.5 1.0 v cc =1.8 v -40 0 85 0.5 t pd ( m s)

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markings 990603 8-pin dip 8-pin tssop 8-pin msop 93c46a 8-pin sop (1) (2) (3) (4) (5) (6) (7) (7 and 8 are blank) (6 includes blank depending on product type)
the information described herein is subject to change without notice. seiko instruments inc. is not responsible for any problems caused by circuits or diagrams described herein whose related industrial properties, patents, or other rights belong to third parties. the application circuit examples explain typical applications of the products, and do not guarantee the success of any specific mass-production design. when the products described herein are regulated products subject to the wassenaar arrangement or other agreements, they may not be exported without authorization from the appropriate governmental authority. use of the information described herein for other purposes and/or reproduction or copying without the express permission of seiko instruments inc. is strictly prohibited. the products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of seiko instruments inc. although seiko instruments inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may occur. the user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.

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